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authorJeshua Smith <jeshuas@nvidia.com>2023-10-05 16:38:49 +0000
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2023-10-23 18:38:59 +0000
commit309450db268c8721afa102c7c49adccd153b0e88 (patch)
treea0d07666eda509ab49b212852f600293e64fe6f4 /DynamicTablesPkg
parentec7f73436646a9232c6494d1ce23fb38000e10d3 (diff)
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DynamicTablesPkg/AmlLib: Enumerate memory attributes
AmlCodeGenRdQWordMemory's and AmlCodeGenRdDWordMemory's Cacheable and MemoryRangeType parameters treat specific values as having specific meanings as defined by the spec. This change adds enums to map those meanings to their corresponding values. Signed-off-by: Jeshua Smith <jeshuas@nvidia.com> Acked-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Diffstat (limited to 'DynamicTablesPkg')
-rw-r--r--DynamicTablesPkg/DynamicTablesPkg.ci.yaml1
-rw-r--r--DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h49
-rw-r--r--DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c12
-rw-r--r--DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c8
4 files changed, 56 insertions, 14 deletions
diff --git a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
index 1d41d44bbf..d5bb38e397 100644
--- a/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
+++ b/DynamicTablesPkg/DynamicTablesPkg.ci.yaml
@@ -97,6 +97,7 @@
"ARMLTD",
"AMLDBG",
"EISAID",
+ "cacheablity",
"CCIDX",
"CCSIDR",
"countof",
diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
index 510c79a399..71e8539b30 100644
--- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
+++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
@@ -59,6 +59,47 @@ typedef void *AML_DATA_NODE_HANDLE;
#endif // AML_HANDLE
+/** Memory attributes, _MEM (2 bits)
+
+ Possible values are:
+ 0-The memory is non-cacheable
+ 1-The memory is cacheable (DEPRECATED)
+ 2-The memory is cacheable and supports
+ write combining (DEPRECATED)
+ 3-The memory is cacheable and prefetchable
+
+ @par Reference(s):
+ - ACPI 6.5, s6.4.3.5.5 "Resource Type Specific Flags"
+
+**/
+typedef enum {
+ AmlMemoryNonCacheable = 0,
+ AmlMemoryCacheable = 1,
+ AmlMemoryCacheableWriteCombine = 2,
+ AmlMemoryCacheablePrefetch = 3,
+ AmlMemoryCacheablityMax = 4
+} AML_MEMORY_ATTRIBUTES_MEM;
+
+/** Memory attributes, _MTP (2 bits)
+
+ Possible values are:
+ 0-AddressRangeMemory
+ 1-AddressRangeReserved
+ 2-AddressRangeACPI
+ 3-AddressRangeNVS
+
+ @par Reference(s):
+ - ACPI 6.5, s6.4.3.5.5 "Resource Type Specific Flags"
+
+**/
+typedef enum {
+ AmlAddressRangeMemory = 0,
+ AmlAddressRangeReserved = 1,
+ AmlAddressRangeACPI = 2,
+ AmlAddressRangeNVS = 3,
+ AmlAddressRangeMax = 4
+} AML_MEMORY_ATTRIBUTES_MTP;
+
/** Parse the definition block.
The function parses the whole AML blob. It starts with the ACPI DSDT/SSDT
@@ -578,7 +619,7 @@ AmlCodeGenRdDWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
- IN UINT8 Cacheable,
+ IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT32 AddressGranularity,
IN UINT32 AddressMinimum,
@@ -587,7 +628,7 @@ AmlCodeGenRdDWordMemory (
IN UINT32 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
- IN UINT8 MemoryRangeType,
+ IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL
@@ -809,7 +850,7 @@ AmlCodeGenRdQWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
- IN UINT8 Cacheable,
+ IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT64 AddressGranularity,
IN UINT64 AddressMinimum,
@@ -818,7 +859,7 @@ AmlCodeGenRdQWordMemory (
IN UINT64 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
- IN UINT8 MemoryRangeType,
+ IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
index 9ddaddc198..72873709aa 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c
@@ -566,7 +566,7 @@ GeneratePciCrs (
IsPosDecode,
TRUE,
TRUE,
- TRUE,
+ AmlMemoryCacheable,
TRUE,
0,
AddrMapInfo->PciAddress,
@@ -575,7 +575,7 @@ GeneratePciCrs (
AddrMapInfo->AddressSize,
0,
NULL,
- 0,
+ AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
@@ -588,7 +588,7 @@ GeneratePciCrs (
IsPosDecode,
TRUE,
TRUE,
- TRUE,
+ AmlMemoryCacheable,
TRUE,
0,
AddrMapInfo->PciAddress,
@@ -597,7 +597,7 @@ GeneratePciCrs (
AddrMapInfo->AddressSize,
0,
NULL,
- 0,
+ AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
@@ -718,7 +718,7 @@ ReserveEcamSpace (
TRUE,
TRUE,
TRUE,
- FALSE, // non-cacheable
+ AmlMemoryNonCacheable,
TRUE,
0,
AddressMinimum,
@@ -727,7 +727,7 @@ ReserveEcamSpace (
AddressMaximum - AddressMinimum + 1,
0,
NULL,
- 0,
+ AmlAddressRangeMemory,
TRUE,
CrsNode,
NULL
diff --git a/DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c b/DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c
index 9c6700b9e0..0bc1c1d119 100644
--- a/DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c
+++ b/DynamicTablesPkg/Library/Common/AmlLib/CodeGen/AmlResourceDataCodeGen.c
@@ -570,7 +570,7 @@ AmlCodeGenRdDWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
- IN UINT8 Cacheable,
+ IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT32 AddressGranularity,
IN UINT32 AddressMinimum,
@@ -579,7 +579,7 @@ AmlCodeGenRdDWordMemory (
IN UINT32 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
- IN UINT8 MemoryRangeType,
+ IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL
@@ -1161,7 +1161,7 @@ AmlCodeGenRdQWordMemory (
IN BOOLEAN IsPosDecode,
IN BOOLEAN IsMinFixed,
IN BOOLEAN IsMaxFixed,
- IN UINT8 Cacheable,
+ IN AML_MEMORY_ATTRIBUTES_MEM Cacheable,
IN BOOLEAN IsReadWrite,
IN UINT64 AddressGranularity,
IN UINT64 AddressMinimum,
@@ -1170,7 +1170,7 @@ AmlCodeGenRdQWordMemory (
IN UINT64 RangeLength,
IN UINT8 ResourceSourceIndex,
IN CONST CHAR8 *ResourceSource,
- IN UINT8 MemoryRangeType,
+ IN AML_MEMORY_ATTRIBUTES_MTP MemoryRangeType,
IN BOOLEAN IsTypeStatic,
IN AML_OBJECT_NODE_HANDLE NameOpNode, OPTIONAL
OUT AML_DATA_NODE_HANDLE *NewRdNode OPTIONAL