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authorAbner Chang <abner.chang@hpe.com>2020-02-28 22:30:54 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-04-03 17:09:12 +0000
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UnitTestFrameworkPkg: Add RISC-V architecture for RISC-V EDK2 CI.
Add RISC-V architecture to UnitTestFrameworkPkg for RISC-V EDK2 CI. BZ:2562: https://bugzilla.tianocore.org/show_bug.cgi?id=2562 Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Sean Brogan <sean.brogan@microsoft.com> Cc: Bret Barkelew <Bret.Barkelew@microsoft.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Gilbert Chen <gilbert.chen@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
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