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| author | Chasel, Chiu <chasel.chiu@intel.com> | 2019-01-23 16:12:38 +0800 |
|---|---|---|
| committer | Chasel, Chiu <chasel.chiu@intel.com> | 2019-01-28 15:49:13 +0800 |
| commit | 12a0a80b4aeeb9a8435ee785e685e33eb7ee451c (patch) | |
| tree | ae71ffe34866958bcf99660e9c996b71cfb5fe60 /IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | |
| parent | 35897da27ed289f086d2b528800fa60d6ef2407d (diff) | |
| download | edk2-12a0a80b4aeeb9a8435ee785e685e33eb7ee451c.tar.gz edk2-12a0a80b4aeeb9a8435ee785e685e33eb7ee451c.tar.bz2 edk2-12a0a80b4aeeb9a8435ee785e685e33eb7ee451c.zip | |
IntelFsp2Pkg: FSP can utilize bootloader stack
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1485
Current FSP utilizes pre-allocated temporary memory from
boot loader for both heap and stack. To reduce overall
temporary memory usage FSP may share the same stack with
boot loader and only needs a smaller memory for heap,
no separate memory required for stack.
Setting PcdFspHeapSizePercentage to 0 to enable FSP sharing
stack with boot loader, in this case boot loader stack
has to be large enough for FSP to use. Default is 50
(half memory heap and half memory stack) for backward
compatible with original model.
Test: Verified on internal platform and booting successfully
with both modes.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf')
| -rw-r--r-- | IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf index dafe6f5993..0024254e0e 100644 --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf @@ -1,7 +1,7 @@ ## @file
# Sec Core for FSP
#
-# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -38,6 +38,7 @@ Ia32/FspApiEntryM.nasm
Ia32/FspApiEntryCommon.nasm
Ia32/FspHelper.nasm
+ Ia32/ReadEsp.nasm
[Binaries.Ia32]
RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC
|