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authorChasel, Chiu <chasel.chiu@intel.com>2018-09-28 10:31:37 +0800
committerChasel, Chiu <chasel.chiu@intel.com>2018-09-28 10:50:43 +0800
commited5de31189faf5437eaa39236d178543be8baa39 (patch)
treedc239fa06d5487345051ceba5421c41a965ebf7a /IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
parent61d3f1000eaad4f359f1a949c2de2217241344d9 (diff)
downloadedk2-ed5de31189faf5437eaa39236d178543be8baa39.tar.gz
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IntelFsp2(Wrapper)Pkg: Revert from e8208100 to 737f812b
Commit formats had issues so reverted 9 commits from IntelFsp2Pkg and IntelFsp2WrapperPkg. Will re-submit them with correct formats. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf')
-rw-r--r--IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf5
1 files changed, 5 insertions, 0 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
index aff4b23f88..cf6a1918a3 100644
--- a/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
+++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf
@@ -53,9 +53,14 @@
FspSecPlatformLib
[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## UNDEFINED
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize ## CONSUMES
+[FixedPcd]
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry ## CONSUMES
+
[Ppis]
gEfiTemporaryRamSupportPpiGuid ## PRODUCES