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author | Chasel Chiu <chasel.chiu@intel.com> | 2020-04-30 09:28:35 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-05-14 12:34:01 +0000 |
commit | f2cdb268ef04eeec51948b5d81eeca5cab5ed9af (patch) | |
tree | 989349555cc3b783737d9aa2a6a56a67f7e63eac /IntelFsp2Pkg/FspSecCore/SecMain.c | |
parent | ceacd9e992cd12f3c07ae1a28a75a6b8750718aa (diff) | |
download | edk2-f2cdb268ef04eeec51948b5d81eeca5cab5ed9af.tar.gz edk2-f2cdb268ef04eeec51948b5d81eeca5cab5ed9af.tar.bz2 edk2-f2cdb268ef04eeec51948b5d81eeca5cab5ed9af.zip |
IntelFsp2Pkg: Support Multi-Phase SiInit and debug handlers.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2698
To enhance FSP silicon initialization flexibility an optional
Multi-Phase API is introduced and FSP header needs update for
new API offset. Also new SecCore module created for
FspMultiPhaseSiInit API
New ARCH_UPD introduced for enhancing FSP debug message
flexibility now bootloader can pass its own debug handler
function pointer and FSP will call the function to handle
debug message.
To support calling bootloader functions, a FspGlobalData field
added to indicate if FSP needs to switch stack when FSP running
on separate stack from bootloader.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/FspSecCore/SecMain.c')
-rw-r--r-- | IntelFsp2Pkg/FspSecCore/SecMain.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c index 7169afc6c7..c8de52e1d5 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -221,6 +221,12 @@ SecTemporaryRamSupport ( UINTN CurrentStack;
UINTN FspStackBase;
+ //
+ // Override OnSeparateStack to 1 because this function will switch stack to permanent memory
+ // which makes FSP running on different stack from bootloader temporary ram stack.
+ //
+ GetFspGlobalDataPointer ()->OnSeparateStack = 1;
+
if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
CurrentStack = AsmReadEsp();
|