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| author | Antoine Cœur <coeur@gmx.fr> | 2019-07-09 17:10:11 +0800 |
|---|---|---|
| committer | Chasel Chiu <chasel.chiu@intel.com> | 2019-07-09 21:40:00 +0800 |
| commit | f527942e6bdd9f198db90f2de99a0482e9be5b1b (patch) | |
| tree | 0efa7e71a17fd203774a2b02630ca1b09c0a6683 /IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c | |
| parent | 8a842b31b93323ee3dc7631059292d30f6179cd3 (diff) | |
| download | edk2-f527942e6bdd9f198db90f2de99a0482e9be5b1b.tar.gz edk2-f527942e6bdd9f198db90f2de99a0482e9be5b1b.tar.bz2 edk2-f527942e6bdd9f198db90f2de99a0482e9be5b1b.zip | |
FmpDevicePkg: Fix various typos
Fix one typo in FmpDevicePkg.
Signed-off-by: Cœur <coeur@gmx.fr>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c')
| -rw-r--r-- | IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c index 927cee13d3..17e895c345 100644 --- a/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c +++ b/IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -52,8 +52,8 @@ IsDefaultType ( @param[in] BaseAddress Base address.
@param[in] Size Size.
- @retval Zero Alligned.
- @retval Non-Zero Not alligned.
+ @retval Zero Aligned.
+ @retval Non-Zero Not aligned.
**/
UINT32
@@ -217,7 +217,7 @@ Power2MaxMemory ( }
//
- // Compute inital power of 2 size to return
+ // Compute initial power of 2 size to return
//
Result = GetPowerOfTwo64(MemoryLength);
@@ -247,8 +247,8 @@ Power2MaxMemory ( @param[in] BaseAddress Base address.
@param[in] Size Size.
- @retval Zero Alligned.
- @retval Non-Zero Not alligned.
+ @retval Zero Aligned.
+ @retval Non-Zero Not aligned.
**/
UINT32
|