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| author | Kuo, Ted <ted.kuo@intel.com> | 2022-03-14 10:48:00 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-03-17 13:23:28 +0000 |
| commit | 411b3ff6ddb4042374a6e61285dac9f5a227f652 (patch) | |
| tree | cd2291c034d2361e181c31c5665b42acc4e6c4fe /IntelFsp2Pkg | |
| parent | 0531f61376548c8a4d79eaee1dd5f4070ef009bf (diff) | |
| download | edk2-411b3ff6ddb4042374a6e61285dac9f5a227f652.tar.gz edk2-411b3ff6ddb4042374a6e61285dac9f5a227f652.tar.bz2 edk2-411b3ff6ddb4042374a6e61285dac9f5a227f652.zip | |
IntelFsp2Pkg: BaseFspSwitchStackLib Support for X64
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3832
Add BaseFspSwitchStackLib Support for X64.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Diffstat (limited to 'IntelFsp2Pkg')
4 files changed, 147 insertions, 5 deletions
diff --git a/IntelFsp2Pkg/Include/PushPopRegsNasm.inc b/IntelFsp2Pkg/Include/PushPopRegsNasm.inc new file mode 100644 index 0000000000..ec103940d8 --- /dev/null +++ b/IntelFsp2Pkg/Include/PushPopRegsNasm.inc @@ -0,0 +1,67 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Provide macro to push/pop registers in X64
+;
+;------------------------------------------------------------------------------
+
+;-----------------------------------------------------------------------------
+; Macro: PUSHA_64
+;
+; Description: Saves all registers on stack
+;
+; Input: None
+;
+; Output: None
+;-----------------------------------------------------------------------------
+%macro PUSHA_64 0
+ push r8
+ push r9
+ push r10
+ push r11
+ push r12
+ push r13
+ push r14
+ push r15
+ push rax
+ push rcx
+ push rdx
+ push rbx
+ push rsp
+ push rbp
+ push rsi
+ push rdi
+%endmacro
+
+;-----------------------------------------------------------------------------
+; Macro: POPA_64
+;
+; Description: Restores all registers from stack
+;
+; Input: None
+;
+; Output: None
+;-----------------------------------------------------------------------------
+%macro POPA_64 0
+ pop rdi
+ pop rsi
+ pop rbp
+ pop rsp
+ pop rbx
+ pop rdx
+ pop rcx
+ pop rax
+ pop r15
+ pop r14
+ pop r13
+ pop r12
+ pop r11
+ pop r10
+ pop r9
+ pop r8
+%endmacro
+
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf index 3dcf3b9598..6909aec651 100644 --- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf +++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf @@ -15,12 +15,15 @@ VERSION_STRING = 1.0
LIBRARY_CLASS = FspSwitchStackLib
-[Sources.IA32]
+[Sources]
FspSwitchStackLib.c
[Sources.IA32]
Ia32/Stack.nasm
+[Sources.X64]
+ X64/Stack.nasm
+
[Packages]
MdePkg/MdePkg.dec
IntelFsp2Pkg/IntelFsp2Pkg.dec
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c index 618c25c3b0..dae4e27172 100644 --- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c +++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c @@ -20,16 +20,16 @@ **/
-UINT32
+UINTN
SwapStack (
- IN UINT32 NewStack
+ IN UINTN NewStack
)
{
FSP_GLOBAL_DATA *FspData;
- UINT32 OldStack;
+ UINTN OldStack;
FspData = GetFspGlobalDataPointer ();
OldStack = FspData->CoreStack;
- FspData->CoreStack = NewStack;
+ FspData->CoreStack = (UINTN) NewStack;
return OldStack;
}
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm new file mode 100644 index 0000000000..bd36fe4b8b --- /dev/null +++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/X64/Stack.nasm @@ -0,0 +1,72 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
+; SPDX-License-Identifier: BSD-2-Clause-Patent
+;
+; Abstract:
+;
+; Switch the stack from temporary memory to permanent memory.
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+%include "PushPopRegsNasm.inc"
+
+extern ASM_PFX(SwapStack)
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; Pei2LoaderSwitchStack (
+; VOID
+; )
+;------------------------------------------------------------------------------
+global ASM_PFX(Pei2LoaderSwitchStack)
+ASM_PFX(Pei2LoaderSwitchStack):
+ xor rax, rax
+ jmp ASM_PFX(FspSwitchStack)
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; Loader2PeiSwitchStack (
+; VOID
+; )
+;------------------------------------------------------------------------------
+global ASM_PFX(Loader2PeiSwitchStack)
+ASM_PFX(Loader2PeiSwitchStack):
+ jmp ASM_PFX(FspSwitchStack)
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; FspSwitchStack (
+; VOID
+; )
+;------------------------------------------------------------------------------
+global ASM_PFX(FspSwitchStack)
+ASM_PFX(FspSwitchStack):
+ ; Save current contexts
+ push rdx ; ApiParam2
+ push rcx ; ApiParam1
+ push rax ; FspInfoHeader
+ pushfq
+ cli
+ PUSHA_64
+ sub rsp, 16
+ sidt [rsp]
+
+ ; Load new stack
+ mov rcx, rsp
+ call ASM_PFX(SwapStack)
+ mov rsp, rax
+
+ ; Restore previous contexts
+ lidt [rsp]
+ add rsp, 16
+ POPA_64
+ popfq
+ add rsp, 24 ; FspInfoHeader + ApiParam[2]
+ ret
+
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