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| author | Michael Kubacki <michael.kubacki@microsoft.com> | 2021-12-05 14:54:00 -0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-12-07 17:24:28 +0000 |
| commit | 7c7184e201a90a1d2376e615e55e3f4074731468 (patch) | |
| tree | aef22a19e4fea3dcf85203900a626b0c000d72db /IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib | |
| parent | 111f2228ddf487b0ac3491e416bb3dcdcfa4f979 (diff) | |
| download | edk2-7c7184e201a90a1d2376e615e55e3f4074731468.tar.gz edk2-7c7184e201a90a1d2376e615e55e3f4074731468.tar.bz2 edk2-7c7184e201a90a1d2376e615e55e3f4074731468.zip | |
IntelFsp2WrapperPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737
Apply uncrustify changes to .c/.h files in the IntelFsp2WrapperPkg package
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Diffstat (limited to 'IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib')
3 files changed, 76 insertions, 69 deletions
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c index 2732920914..67faad927c 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c @@ -24,9 +24,9 @@ **/
EFI_STATUS
Execute32BitCode (
- IN UINT64 Function,
- IN UINT64 Param1,
- IN UINT64 Param2
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
);
/**
@@ -42,9 +42,9 @@ FspFindFspHeader ( IN EFI_PHYSICAL_ADDRESS FlashFvFspBase
)
{
- UINT8 *CheckPointer;
+ UINT8 *CheckPointer;
- CheckPointer = (UINT8 *) (UINTN) FlashFvFspBase;
+ CheckPointer = (UINT8 *)(UINTN)FlashFvFspBase;
if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->Signature != EFI_FVH_SIGNATURE) {
return NULL;
@@ -53,12 +53,11 @@ FspFindFspHeader ( if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset != 0) {
CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset;
CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)CheckPointer)->ExtHeaderSize;
- CheckPointer = (UINT8 *) ALIGN_POINTER (CheckPointer, 8);
+ CheckPointer = (UINT8 *)ALIGN_POINTER (CheckPointer, 8);
} else {
CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->HeaderLength;
}
-
CheckPointer = CheckPointer + sizeof (EFI_FFS_FILE_HEADER);
if (((EFI_RAW_SECTION *)CheckPointer)->Type != EFI_SECTION_RAW) {
@@ -80,13 +79,13 @@ FspFindFspHeader ( EFI_STATUS
EFIAPI
CallFspNotifyPhase (
- IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams
+ IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams
)
{
- FSP_INFO_HEADER *FspHeader;
- FSP_NOTIFY_PHASE NotifyPhaseApi;
- EFI_STATUS Status;
- BOOLEAN InterruptState;
+ FSP_INFO_HEADER *FspHeader;
+ FSP_NOTIFY_PHASE NotifyPhaseApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));
if (FspHeader == NULL) {
@@ -95,7 +94,7 @@ CallFspNotifyPhase ( NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
- Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);
+ Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);
SetInterruptState (InterruptState);
return Status;
@@ -112,14 +111,14 @@ CallFspNotifyPhase ( EFI_STATUS
EFIAPI
CallFspMemoryInit (
- IN VOID *FspmUpdDataPtr,
- OUT VOID **HobListPtr
+ IN VOID *FspmUpdDataPtr,
+ OUT VOID **HobListPtr
)
{
- FSP_INFO_HEADER *FspHeader;
- FSP_MEMORY_INIT FspMemoryInitApi;
- EFI_STATUS Status;
- BOOLEAN InterruptState;
+ FSP_INFO_HEADER *FspHeader;
+ FSP_MEMORY_INIT FspMemoryInitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
if (FspHeader == NULL) {
@@ -127,8 +126,8 @@ CallFspMemoryInit ( }
FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);
- InterruptState = SaveAndDisableInterrupts ();
- Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
SetInterruptState (InterruptState);
return Status;
@@ -144,13 +143,13 @@ CallFspMemoryInit ( EFI_STATUS
EFIAPI
CallTempRamExit (
- IN VOID *TempRamExitParam
+ IN VOID *TempRamExitParam
)
{
- FSP_INFO_HEADER *FspHeader;
- FSP_TEMP_RAM_EXIT TempRamExitApi;
- EFI_STATUS Status;
- BOOLEAN InterruptState;
+ FSP_INFO_HEADER *FspHeader;
+ FSP_TEMP_RAM_EXIT TempRamExitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));
if (FspHeader == NULL) {
@@ -159,7 +158,7 @@ CallTempRamExit ( TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
- Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);
+ Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);
SetInterruptState (InterruptState);
return Status;
@@ -175,13 +174,13 @@ CallTempRamExit ( EFI_STATUS
EFIAPI
CallFspSiliconInit (
- IN VOID *FspsUpdDataPtr
+ IN VOID *FspsUpdDataPtr
)
{
- FSP_INFO_HEADER *FspHeader;
- FSP_SILICON_INIT FspSiliconInitApi;
- EFI_STATUS Status;
- BOOLEAN InterruptState;
+ FSP_INFO_HEADER *FspHeader;
+ FSP_SILICON_INIT FspSiliconInitApi;
+ EFI_STATUS Status;
+ BOOLEAN InterruptState;
FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));
if (FspHeader == NULL) {
@@ -189,8 +188,8 @@ CallFspSiliconInit ( }
FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);
- InterruptState = SaveAndDisableInterrupts ();
- Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);
+ InterruptState = SaveAndDisableInterrupts ();
+ Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);
SetInterruptState (InterruptState);
return Status;
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c index 3b3472e5db..4f6a8dd1a7 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c @@ -19,7 +19,7 @@ **/
typedef
EFI_STATUS
-(EFIAPI *FSP_FUNCTION) (
+(EFIAPI *FSP_FUNCTION)(
IN VOID *Param1,
IN VOID *Param2
);
@@ -36,17 +36,16 @@ EFI_STATUS **/
EFI_STATUS
Execute32BitCode (
- IN UINT64 Function,
- IN UINT64 Param1,
- IN UINT64 Param2
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
)
{
- FSP_FUNCTION EntryFunc;
- EFI_STATUS Status;
+ FSP_FUNCTION EntryFunc;
+ EFI_STATUS Status;
- EntryFunc = (FSP_FUNCTION) (UINTN) (Function);
+ EntryFunc = (FSP_FUNCTION)(UINTN)(Function);
Status = EntryFunc ((VOID *)(UINTN)Param1, (VOID *)(UINTN)Param2);
return Status;
}
-
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c index 001fc6f8f1..2ee5bc3dd4 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c @@ -15,39 +15,49 @@ #pragma pack(1)
typedef union {
struct {
- UINT32 LimitLow : 16;
- UINT32 BaseLow : 16;
- UINT32 BaseMid : 8;
- UINT32 Type : 4;
- UINT32 System : 1;
- UINT32 Dpl : 2;
- UINT32 Present : 1;
- UINT32 LimitHigh : 4;
- UINT32 Software : 1;
- UINT32 Reserved : 1;
- UINT32 DefaultSize : 1;
- UINT32 Granularity : 1;
- UINT32 BaseHigh : 8;
+ UINT32 LimitLow : 16;
+ UINT32 BaseLow : 16;
+ UINT32 BaseMid : 8;
+ UINT32 Type : 4;
+ UINT32 System : 1;
+ UINT32 Dpl : 2;
+ UINT32 Present : 1;
+ UINT32 LimitHigh : 4;
+ UINT32 Software : 1;
+ UINT32 Reserved : 1;
+ UINT32 DefaultSize : 1;
+ UINT32 Granularity : 1;
+ UINT32 BaseHigh : 8;
} Bits;
- UINT64 Uint64;
+ UINT64 Uint64;
} IA32_GDT;
#pragma pack()
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
- {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, /* 0x0: reserve */
- {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}}, /* 0x8: compatibility mode */
- {{0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0}}, /* 0x10: for long mode */
- {{0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0}}, /* 0x18: data */
- {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, /* 0x20: reserve */
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
+ {
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+ }, /* 0x0: reserve */
+ {
+ { 0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0 }
+ }, /* 0x8: compatibility mode */
+ {
+ { 0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0 }
+ }, /* 0x10: for long mode */
+ {
+ { 0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0 }
+ }, /* 0x18: data */
+ {
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+ }, /* 0x20: reserve */
};
//
// IA32 Gdt register
//
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
+GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
sizeof (mGdtEntries) - 1,
- (UINTN) mGdtEntries
- };
+ (UINTN)mGdtEntries
+};
/**
Assembly function to transition from long mode to compatibility mode to execute 32-bit code and then transit back to
@@ -81,9 +91,9 @@ AsmExecute32BitCode ( **/
EFI_STATUS
Execute32BitCode (
- IN UINT64 Function,
- IN UINT64 Param1,
- IN UINT64 Param2
+ IN UINT64 Function,
+ IN UINT64 Param1,
+ IN UINT64 Param2
)
{
EFI_STATUS Status;
@@ -100,4 +110,3 @@ Execute32BitCode ( return Status;
}
-
|