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| author | Antoine Coeur <coeur@gmx.fr> | 2019-12-04 12:14:53 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2019-12-11 01:42:31 +0000 |
| commit | 97eedf5dfbaffde33210fd88066247cf0b7d3325 (patch) | |
| tree | d05df1d2eb0ed475d7a07ddd8d42d4475c5305f9 /IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib | |
| parent | 7e55cf6b48dcd43de46d008b2f12caaad2554503 (diff) | |
| download | edk2-97eedf5dfbaffde33210fd88066247cf0b7d3325.tar.gz edk2-97eedf5dfbaffde33210fd88066247cf0b7d3325.tar.bz2 edk2-97eedf5dfbaffde33210fd88066247cf0b7d3325.zip | |
IntelFsp2WrapperPkg: Fix various typos
Fix various typos in comments and documentation.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib')
| -rw-r--r-- | IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.nasm | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.nasm b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.nasm index 45c8f21255..db8e62ebc5 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.nasm +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/Thunk64To32.nasm @@ -43,7 +43,7 @@ ASM_PFX(AsmExecute32BitCode): cli
;
- ; save orignal GDTR and CS
+ ; save original GDTR and CS
;
mov rax, ds
push rax
@@ -190,7 +190,7 @@ ReloadCS: pop rdi
popfq
;
- ; Switch to orignal GDT and CS. here rsp is pointer to the orignal GDT descriptor.
+ ; Switch to original GDT and CS. here rsp is pointer to the original GDT descriptor.
;
lgdt [rsp]
;
@@ -198,7 +198,7 @@ ReloadCS: ;
add rsp, 0x10
;
- ; switch to orignal CS and GDTR
+ ; switch to original CS and GDTR
;
pop r9 ; get CS
shl r9, 32 ; rcx[32..47] <- Cs
|