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authorMichael Kubacki <michael.kubacki@microsoft.com>2022-09-06 15:52:39 -0400
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2022-10-04 16:53:59 +0000
commit7c424c28b0adff2da455769521408dbf772c1ed7 (patch)
tree147b5ee4c43f7f54e14e9df45c87475bf04f43d0 /IntelFsp2WrapperPkg
parent28b16c01cf136b5ab9ac0fab1b7c95c6b7f0a334 (diff)
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IntelFsp2WrapperPkg: Fix code formatting errors
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048 This package did not have CI enabled so code changes were merged that fail uncrustify formatting. This change updates those files to include uncustify formatting. Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Michael D Kinney <michael.d.kinney>
Diffstat (limited to 'IntelFsp2WrapperPkg')
-rw-r--r--IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c4
-rw-r--r--IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c1
-rw-r--r--IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c8
3 files changed, 8 insertions, 5 deletions
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
index 5b5beb5c65..2e82a0c1b5 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
@@ -115,6 +115,7 @@ CallFspNotifyPhase (
} else {
Status = Execute64BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);
}
+
SetInterruptState (InterruptState);
return Status;
@@ -152,6 +153,7 @@ CallFspMemoryInit (
} else {
Status = Execute64BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
}
+
SetInterruptState (InterruptState);
return Status;
@@ -187,6 +189,7 @@ CallTempRamExit (
} else {
Status = Execute64BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);
}
+
SetInterruptState (InterruptState);
return Status;
@@ -222,6 +225,7 @@ CallFspSiliconInit (
} else {
Status = Execute64BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);
}
+
SetInterruptState (InterruptState);
return Status;
diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
index a17ca7dcab..c8248eb888 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
@@ -69,4 +69,3 @@ Execute64BitCode (
{
return EFI_UNSUPPORTED;
}
-
diff --git a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
index d2acb2fd46..fb0d9a8683 100644
--- a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
+++ b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
@@ -10,10 +10,10 @@
#include <FspEas.h>
typedef struct {
- EFI_PHYSICAL_ADDRESS MicrocodeRegionBase;
- UINT64 MicrocodeRegionSize;
- EFI_PHYSICAL_ADDRESS CodeRegionBase;
- UINT64 CodeRegionSize;
+ EFI_PHYSICAL_ADDRESS MicrocodeRegionBase;
+ UINT64 MicrocodeRegionSize;
+ EFI_PHYSICAL_ADDRESS CodeRegionBase;
+ UINT64 CodeRegionSize;
} FSPT_CORE_UPD;
typedef struct {