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authorYao, Jiewen <Jiewen.Yao@intel.com>2015-08-02 04:02:37 +0000
committerjyao1 <jyao1@Edk2>2015-08-02 04:02:37 +0000
commitb23441875c34bd15badb76e8d0b001ebd5d7010d (patch)
tree2723ccebc4f5589f709021770ea12febe49b34c7 /IntelFspPkg/Tools
parent7669f7349829f0e4755552ba0d6e600492fd8170 (diff)
downloadedk2-b23441875c34bd15badb76e8d0b001ebd5d7010d.tar.gz
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Add Dual-FSP support (MemoryInitUpd/SiliconInitUpd)
Add FspUpdSignatureCheck() API in FspSecPlatformLib, so that FspSecCore can check if UPD data is valid in FSP API. Add Set/GetFspMemoryInitUpdDataPointer() and Set/GetFspSiliconInitUpdDataPointer() API in FspCommonLib, so that core can set this UdpDataPointer and platform code may get UpdDataPointer easily. Add UpdateMemSiUpdInitOffsetValue function in GenCfgOpt.py tool, so that the MemoryInitUpdOffset and SiUpdInitOffset is recorded. Add missing EMBED comment in GenCfgOptUserManual.docx Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18123 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'IntelFspPkg/Tools')
-rw-r--r--IntelFspPkg/Tools/GenCfgOpt.py60
-rw-r--r--IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docxbin22177 -> 24424 bytes
2 files changed, 60 insertions, 0 deletions
diff --git a/IntelFspPkg/Tools/GenCfgOpt.py b/IntelFspPkg/Tools/GenCfgOpt.py
index 77eaf6481f..a38da70212 100644
--- a/IntelFspPkg/Tools/GenCfgOpt.py
+++ b/IntelFspPkg/Tools/GenCfgOpt.py
@@ -88,6 +88,48 @@ are permitted provided that the following conditions are met:
**/
"""
+def UpdateMemSiUpdInitOffsetValue (DscFile):
+ DscFd = open(DscFile, "r")
+ DscLines = DscFd.readlines()
+ DscFd.close()
+
+ DscContent = []
+ MemUpdInitOffset = 0
+ SiUpdInitOffset = 0
+ MemUpdInitOffsetValue = 0
+ SiUpdInitOffsetValue = 0
+
+ while len(DscLines):
+ DscLine = DscLines.pop(0)
+ DscContent.append(DscLine)
+ DscLine = DscLine.strip()
+ Match = re.match("^([_a-zA-Z0-9]+).(MemoryInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ MemUpdInitOffsetValue = int(Match.group(5), 0)
+ Match = re.match("^\s*([_a-zA-Z0-9]+).(SiliconInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ SiUpdInitOffsetValue = int(Match.group(5), 0)
+ Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(0x244450554D454D24)",DscLine)
+ if Match:
+ MemUpdInitOffset = int(Match.group(3), 0)
+ Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(0x244450555F495324)",DscLine)
+ if Match:
+ SiUpdInitOffset = int(Match.group(3), 0)
+
+ if MemUpdInitOffsetValue != MemUpdInitOffset or SiUpdInitOffsetValue != SiUpdInitOffset:
+ MemUpdInitOffsetStr = "0x%08X" % MemUpdInitOffset
+ SiUpdInitOffsetStr = "0x%08X" % SiUpdInitOffset
+ DscFd = open(DscFile,"w")
+ for DscLine in DscContent:
+ Match = re.match("^\s*([_a-zA-Z0-9]+).(MemoryInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ DscLine = re.sub(r'(?:[^\s]+\s*$)', MemUpdInitOffsetStr + '\n', DscLine)
+ Match = re.match("^\s*([_a-zA-Z0-9]+).(SiliconInitUpdOffset)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
+ if Match:
+ DscLine = re.sub(r'(?:[^\s]+\s*$)', SiUpdInitOffsetStr + '\n', line)
+ DscFd.writelines(DscLine)
+ DscFd.close()
+
class CLogicalExpression:
def __init__(self):
self.index = 0
@@ -889,6 +931,22 @@ EndList
return 256
TxtBody = []
+ for Item in self._CfgItemList:
+ if str(Item['cname']) == 'Signature' and Item['length'] == 8:
+ Value = int(Item['value'], 16)
+ Chars = []
+ while Value != 0x0:
+ Chars.append(chr(Value & 0xFF))
+ Value = Value >> 8
+ SignatureStr = ''.join(Chars)
+ if int(Item['offset']) == 0:
+ TxtBody.append("#define FSP_UPD_SIGNATURE %s /* '%s' */\n" % (Item['value'], SignatureStr))
+ elif 'MEM' in SignatureStr:
+ TxtBody.append("#define FSP_MEMORY_INIT_UPD_SIGNATURE %s /* '%s' */\n" % (Item['value'], SignatureStr))
+ else:
+ TxtBody.append("#define FSP_SILICON_INIT_UPD_SIGNATURE %s /* '%s' */\n" % (Item['value'], SignatureStr))
+ TxtBody.append("\n")
+
for Region in ['UPD', 'VPD']:
# Write PcdVpdRegionSign and PcdImageRevision
@@ -1176,6 +1234,8 @@ def Main():
print "ERROR: Cannot open DSC file '%s' !" % DscFile
return 2
+ UpdateMemSiUpdInitOffsetValue(DscFile)
+
OutFile = ''
if argc > 4:
if sys.argv[4][0] == '-':
diff --git a/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx b/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx
index e4da8e057b..1cbc459eba 100644
--- a/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx
+++ b/IntelFspPkg/Tools/UserManuals/GenCfgOptUserManual.docx
Binary files differ