Add IntelFspWrapper to support boot EDKII on FSP bin.

Contributed-under: TianoCore Contribution Agreement 1.0

Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Ravi Rangarajan <ravi.p.rangarajan@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15676 6f19259b-4bc3-4df7-8a09-765794883524

11 files changed, 1040 insertions, 0 deletions

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/FindPeiCore.c b/IntelFspWrapperPkg/FspWrapperSecCore/FindPeiCore.c
new file mode 100644
index 0000000000..ce003d056f
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/FindPeiCore.c
@@ -0,0 +1,199 @@
+/** @file

+  Locate the entry point for the PEI Core

+

+  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+  This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php.

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include <PiPei.h>

+#include <Library/BaseLib.h>

+#include <Library/PeCoffGetEntryPointLib.h>

+

+#include "SecMain.h"

+

+/**

+  Find core image base.

+

+  @param[in]  BootFirmwareVolumePtr    Point to the boot firmware volume.

+  @param[out] SecCoreImageBase         The base address of the SEC core image.

+  @param[out] PeiCoreImageBase         The base address of the PEI core image.

+

+**/

+EFI_STATUS

+EFIAPI

+FindImageBase (

+  IN  EFI_FIRMWARE_VOLUME_HEADER       *BootFirmwareVolumePtr,

+  OUT EFI_PHYSICAL_ADDRESS             *SecCoreImageBase,

+  OUT EFI_PHYSICAL_ADDRESS             *PeiCoreImageBase

+  )

+{

+  EFI_PHYSICAL_ADDRESS        CurrentAddress;

+  EFI_PHYSICAL_ADDRESS        EndOfFirmwareVolume;

+  EFI_FFS_FILE_HEADER         *File;

+  UINT32                      Size;

+  EFI_PHYSICAL_ADDRESS        EndOfFile;

+  EFI_COMMON_SECTION_HEADER   *Section;

+  EFI_PHYSICAL_ADDRESS        EndOfSection;

+

+  *SecCoreImageBase = 0;

+  *PeiCoreImageBase = 0;

+

+  CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) BootFirmwareVolumePtr;

+  EndOfFirmwareVolume = CurrentAddress + BootFirmwareVolumePtr->FvLength;

+

+  //

+  // Loop through the FFS files in the Boot Firmware Volume

+  //

+  for (EndOfFile = CurrentAddress + BootFirmwareVolumePtr->HeaderLength; ; ) {

+

+    CurrentAddress = (EndOfFile + 7) & 0xfffffffffffffff8ULL;

+    if (CurrentAddress > EndOfFirmwareVolume) {

+      return EFI_NOT_FOUND;

+    }

+

+    File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;

+    if (IS_FFS_FILE2 (File)) {

+      Size = FFS_FILE2_SIZE (File);

+      if (Size <= 0x00FFFFFF) {

+        return EFI_NOT_FOUND;

+      }

+    } else {

+      Size = FFS_FILE_SIZE (File);

+      if (Size < sizeof (EFI_FFS_FILE_HEADER)) {

+        return EFI_NOT_FOUND;

+      }

+    }

+

+    EndOfFile = CurrentAddress + Size;

+    if (EndOfFile > EndOfFirmwareVolume) {

+      return EFI_NOT_FOUND;

+    }

+

+    //

+    // Look for SEC Core / PEI Core files

+    //

+    if (File->Type != EFI_FV_FILETYPE_SECURITY_CORE &&

+        File->Type != EFI_FV_FILETYPE_PEI_CORE) {

+      continue;

+    }

+

+    //

+    // Loop through the FFS file sections within the FFS file

+    //

+    if (IS_FFS_FILE2 (File)) {

+      EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER2));

+    } else {

+      EndOfSection = (EFI_PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) File + sizeof (EFI_FFS_FILE_HEADER));

+    }

+    for (;;) {

+      CurrentAddress = (EndOfSection + 3) & 0xfffffffffffffffcULL;

+      Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress;

+

+      if (IS_SECTION2 (Section)) {

+        Size = SECTION2_SIZE (Section);

+        if (Size <= 0x00FFFFFF) {

+          return EFI_NOT_FOUND;

+        }

+      } else {

+        Size = SECTION_SIZE (Section);

+        if (Size < sizeof (EFI_COMMON_SECTION_HEADER)) {

+          return EFI_NOT_FOUND;

+        }

+      }

+

+      EndOfSection = CurrentAddress + Size;

+      if (EndOfSection > EndOfFile) {

+        return EFI_NOT_FOUND;

+      }

+

+      //

+      // Look for executable sections

+      //

+      if (Section->Type == EFI_SECTION_PE32 || Section->Type == EFI_SECTION_TE) {

+        if (File->Type == EFI_FV_FILETYPE_SECURITY_CORE) {

+          if (IS_SECTION2 (Section)) {

+            *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));

+          } else {

+            *SecCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));

+          }

+        } else {

+          if (IS_SECTION2 (Section)) {

+            *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER2));

+          } else {

+            *PeiCoreImageBase = (PHYSICAL_ADDRESS) (UINTN) ((UINT8 *) Section + sizeof (EFI_COMMON_SECTION_HEADER));

+          }

+        }

+        break;

+      }

+    }

+

+    //

+    // Both SEC Core and PEI Core images found

+    //

+    if (*SecCoreImageBase != 0 && *PeiCoreImageBase != 0) {

+      return EFI_SUCCESS;

+    }

+  }

+}

+

+/**

+  Find and return Pei Core entry point.

+

+  It also find SEC and PEI Core file debug inforamtion. It will report them if

+  remote debug is enabled.

+

+  @param[in]  BootFirmwareVolumePtr    Point to the boot firmware volume.

+  @param[out] PeiCoreEntryPoint        The entry point of the PEI core.

+

+**/

+VOID

+EFIAPI

+FindAndReportEntryPoints (

+  IN  EFI_FIRMWARE_VOLUME_HEADER       *BootFirmwareVolumePtr,

+  OUT EFI_PEI_CORE_ENTRY_POINT         *PeiCoreEntryPoint

+  )

+{

+  EFI_STATUS                       Status;

+  EFI_PHYSICAL_ADDRESS             SecCoreImageBase;

+  EFI_PHYSICAL_ADDRESS             PeiCoreImageBase;

+  PE_COFF_LOADER_IMAGE_CONTEXT     ImageContext;

+

+  //

+  // Find SEC Core and PEI Core image base

+  //

+  Status = FindImageBase (BootFirmwareVolumePtr, &SecCoreImageBase, &PeiCoreImageBase);

+  ASSERT_EFI_ERROR (Status);

+

+  ZeroMem ((VOID *) &ImageContext, sizeof (PE_COFF_LOADER_IMAGE_CONTEXT));

+  //

+  // Report SEC Core debug information when remote debug is enabled

+  //

+  ImageContext.ImageAddress = SecCoreImageBase;

+  ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);

+  PeCoffLoaderRelocateImageExtraAction (&ImageContext);

+

+  //

+  // Report PEI Core debug information when remote debug is enabled

+  //

+  ImageContext.ImageAddress = PeiCoreImageBase;

+  ImageContext.PdbPointer = PeCoffLoaderGetPdbPointer ((VOID*) (UINTN) ImageContext.ImageAddress);

+  PeCoffLoaderRelocateImageExtraAction (&ImageContext);

+

+  //

+  // Find PEI Core entry point

+  //

+  Status = PeCoffLoaderGetEntryPoint ((VOID *) (UINTN) PeiCoreImageBase, (VOID**) PeiCoreEntryPoint);

+  if (EFI_ERROR (Status)) {

+    *PeiCoreEntryPoint = 0;

+  }

+

+  return;

+}

+

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf b/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
new file mode 100644
index 0000000000..fc221fc856
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
@@ -0,0 +1,66 @@
+## @file

+# This is the first module taking control of the platform upon power-on/reset.

+#

+#  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php.

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+##

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = FspWrapperSecCore

+  FILE_GUID                      = 1BA0062E-C779-4582-8566-336AE8F78F09

+  MODULE_TYPE                    = SEC

+  VERSION_STRING                 = 1.0

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32

+#

+

+[Sources]

+  SecMain.c

+  SecMain.h

+  FindPeiCore.c

+

+[Sources.IA32]

+  Ia32/ResetVec.asm16 | MSFT

+  Ia32/ResetVec.asm16 | INTEL

+  Ia32/Dummy.asm

+

+[Binaries.Ia32]

+  RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  UefiCpuPkg/UefiCpuPkg.dec

+  IntelFspPkg/IntelFspPkg.dec

+  IntelFspWrapperPkg/IntelFspWrapperPkg.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  FspPlatformInfoLib

+  FspPlatformSecLib

+  DebugAgentLib

+  UefiCpuLib

+  PeCoffGetEntryPointLib

+  PeCoffExtraActionLib

+

+[Ppis]

+  gTopOfTemporaryRamPpiGuid

+

+[FixedPcd]

+  gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported

+

+[Pcd]

+  gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/Dummy.asm b/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/Dummy.asm
new file mode 100644
index 0000000000..16438e26e3
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/Dummy.asm
@@ -0,0 +1,26 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php.

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;  Dummy.asm

+;

+; Abstract:

+;

+;  To pass build

+;

+;------------------------------------------------------------------------------

+

+    .586p

+    .model  flat,C

+    .code

+

+    END

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/ResetVec.asm16 b/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/ResetVec.asm16
new file mode 100644
index 0000000000..93de20e530
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/ResetVec.asm16
@@ -0,0 +1,106 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php.

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;  ResetVec.asm

+;

+; Abstract:

+;

+;  Reset Vector Data structure

+;  This structure is located at 0xFFFFFFC0

+;

+;------------------------------------------------------------------------------

+

+    .model  tiny

+    .686p

+    .stack  0h

+    .code

+

+;

+; The layout of this file is fixed. The build tool makes assumption of the layout.

+;

+

+    ORG     0h

+;

+; Reserved

+;

+ReservedData         DD 0eeeeeeeeh, 0eeeeeeeeh

+

+    ORG     10h

+;

+; This is located at 0xFFFFFFD0h

+;

+    mov     di, "AP"

+    jmp     ApStartup

+

+    ORG     20h

+;

+; Pointer to the entry point of the PEI core

+; It is located at 0xFFFFFFE0, and is fixed up by some build tool

+; So if the value 8..1 appears in the final FD image, tool failure occurs.

+;

+PeiCoreEntryPoint       DD      87654321h

+

+;

+; This is the handler for all kinds of exceptions. Since it's for debugging

+; purpose only, nothing except a deadloop would be done here. Developers could

+; analyze the cause of the exception if a debugger had been attached.

+;

+InterruptHandler    PROC

+    jmp     $

+    iret

+InterruptHandler    ENDP

+

+    ORG     30h

+;

+; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte

+; Execution starts here upon power-on/platform-reset.

+;

+ResetHandler:

+    nop

+    nop

+ApStartup:

+    ;

+    ; Jmp Rel16 instruction

+    ; Use machine code directly in case of the assembler optimization

+    ; SEC entry point relatvie address will be fixed up by some build tool.

+    ;

+    ; Typically, SEC entry point is the function _ModuleEntryPoint() defined in

+    ; SecEntry.asm

+    ;

+    DB      0e9h

+    DW      -3

+

+

+    ORG     38h

+;

+; Ap reset vector segment address is at 0xFFFFFFF8

+; This will be fixed up by some build tool,

+; so if the value 1..8 appears in the final FD image,

+; tool failure occurs

+;

+ApSegAddress    dd      12345678h

+

+    ORG     3ch

+;

+; BFV Base is at 0xFFFFFFFC

+; This will be fixed up by some build tool,

+; so if the value 1..8 appears in the final FD image,

+; tool failure occurs.

+;

+BfvBase     DD      12345678h

+

+;

+; Nothing can go here, otherwise the layout of this file would change.

+;

+

+    END

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/SecMain.c b/IntelFspWrapperPkg/FspWrapperSecCore/SecMain.c
new file mode 100644
index 0000000000..f441725c6c
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/SecMain.c
@@ -0,0 +1,264 @@
+/** @file

+  C functions in SEC

+

+  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+  This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php.

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+

+#include "SecMain.h"

+

+EFI_PEI_PPI_DESCRIPTOR            mPeiSecMainPpi[] = {

+  {

+    EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,

+    &gTopOfTemporaryRamPpiGuid,

+    NULL // To be patched later.

+  },

+};

+

+//

+// These are IDT entries pointing to 10:FFFFFFE4h.

+//

+UINT64  mIdtEntryTemplate = 0xffff8e000010ffe4ULL;

+

+/**

+  Caller provided function to be invoked at the end of InitializeDebugAgent().

+

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param[in] Context    The first input parameter of InitializeDebugAgent().

+

+**/

+VOID

+EFIAPI

+SecStartupPhase2(

+  IN VOID                     *Context

+  );

+

+

+/**

+

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param[in] SizeOfRam           Size of the temporary memory available for use.

+  @param[in] TempRamBase         Base address of tempory ram

+  @param[in] BootFirmwareVolume  Base address of the Boot Firmware Volume.

+**/

+VOID

+EFIAPI

+SecStartup (

+  IN UINT32                   SizeOfRam,

+  IN UINT32                   TempRamBase,

+  IN VOID                     *BootFirmwareVolume

+  )

+{

+  EFI_SEC_PEI_HAND_OFF        SecCoreData;

+  IA32_DESCRIPTOR             IdtDescriptor;

+  SEC_IDT_TABLE               IdtTableInStack;

+  UINT32                      Index;

+  UINT32                      PeiStackSize;

+

+  PeiStackSize = PcdGet32 (PcdPeiTemporaryRamStackSize);

+  if (PeiStackSize == 0) {

+    PeiStackSize = (SizeOfRam >> 1);

+  }

+

+  ASSERT (PeiStackSize < SizeOfRam);

+

+  //

+  // Process all libraries constructor function linked to SecCore.

+  //

+  ProcessLibraryConstructorList ();

+

+  DEBUG ((DEBUG_INFO, "SecCore - SecStartup\n"));

+

+  //

+  // Initialize floating point operating environment

+  // to be compliant with UEFI spec.

+  //

+  InitializeFloatingPointUnits ();

+

+

+  // |-------------------|---->

+  // |Idt Table          |

+  // |-------------------|

+  // |PeiService Pointer |    PeiStackSize

+  // |-------------------|

+  // |                   |

+  // |      Stack        |

+  // |-------------------|---->

+  // |                   |

+  // |                   |

+  // |      Heap         |    PeiTemporayRamSize

+  // |                   |

+  // |                   |

+  // |-------------------|---->  TempRamBase

+

+  IdtTableInStack.PeiService = 0;

+  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {

+    CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&mIdtEntryTemplate, sizeof (UINT64));

+  }

+

+  IdtDescriptor.Base  = (UINTN) &IdtTableInStack.IdtTable;

+  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);

+

+  AsmWriteIdtr (&IdtDescriptor);

+

+  //

+  // Update the base address and length of Pei temporary memory

+  //

+  SecCoreData.DataSize               = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);

+  SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;

+  SecCoreData.BootFirmwareVolumeSize = (UINTN)(SIZE_4GB - (UINTN) BootFirmwareVolume);

+  SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;

+  SecCoreData.TemporaryRamSize       = SizeOfRam;

+  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;

+  SecCoreData.PeiTemporaryRamSize    = SizeOfRam - PeiStackSize;

+  SecCoreData.StackBase              = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);

+  SecCoreData.StackSize              = PeiStackSize;

+

+  DEBUG ((DEBUG_INFO, "BootFirmwareVolumeBase - 0x%x\n", SecCoreData.BootFirmwareVolumeBase));

+  DEBUG ((DEBUG_INFO, "BootFirmwareVolumeSize - 0x%x\n", SecCoreData.BootFirmwareVolumeSize));

+  DEBUG ((DEBUG_INFO, "TemporaryRamBase       - 0x%x\n", SecCoreData.TemporaryRamBase));

+  DEBUG ((DEBUG_INFO, "TemporaryRamSize       - 0x%x\n", SecCoreData.TemporaryRamSize));

+  DEBUG ((DEBUG_INFO, "PeiTemporaryRamBase    - 0x%x\n", SecCoreData.PeiTemporaryRamBase));

+  DEBUG ((DEBUG_INFO, "PeiTemporaryRamSize    - 0x%x\n", SecCoreData.PeiTemporaryRamSize));

+  DEBUG ((DEBUG_INFO, "StackBase              - 0x%x\n", SecCoreData.StackBase));

+  DEBUG ((DEBUG_INFO, "StackSize              - 0x%x\n", SecCoreData.StackSize));

+

+  //

+  // Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.

+  //

+  InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);

+

+}

+

+/**

+  This API patch the TopOfTemporaryRam value in SecPpiList.

+

+  @param[in,out] SecPpiList           PPI list to be patched.

+  @param[in]     TopOfTemporaryRam    The top of CAR.

+

+**/

+VOID

+PatchTopOfTemporaryRamPpi (

+  IN OUT EFI_PEI_PPI_DESCRIPTOR *SecPpiList,

+  IN VOID                       *TopOfTemporaryRam

+  )

+{

+  SecPpiList[0].Ppi = TopOfTemporaryRam;

+}

+

+/**

+  Caller provided function to be invoked at the end of InitializeDebugAgent().

+

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param[in] Context    The first input parameter of InitializeDebugAgent().

+

+**/

+VOID

+EFIAPI

+SecStartupPhase2(

+  IN VOID                     *Context

+  )

+{

+  EFI_SEC_PEI_HAND_OFF        *SecCoreData;

+  EFI_PEI_PPI_DESCRIPTOR      *PpiList;

+  UINT32                      Index;

+  EFI_PEI_PPI_DESCRIPTOR      LocalSecPpiList[sizeof(mPeiSecMainPpi)/sizeof(mPeiSecMainPpi[0])];

+  EFI_PEI_PPI_DESCRIPTOR      AllSecPpiList[FixedPcdGet32(PcdSecCoreMaxPpiSupported)];

+  EFI_PEI_CORE_ENTRY_POINT    PeiCoreEntryPoint;

+

+  SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;

+  //

+  // Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug

+  // is enabled.

+  //

+  FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);

+  if (PeiCoreEntryPoint == NULL)

+  {

+    CpuDeadLoop ();

+  }

+

+  CopyMem (LocalSecPpiList, mPeiSecMainPpi, sizeof(mPeiSecMainPpi));

+  PatchTopOfTemporaryRamPpi (LocalSecPpiList, (VOID *)((UINTN)SecCoreData->TemporaryRamBase + SecCoreData->TemporaryRamSize));

+

+  //

+  // Perform platform specific initialization before entering PeiCore.

+  //

+  PpiList = SecPlatformMain (SecCoreData);

+  if (PpiList != NULL) {

+    //

+    // Remove the terminal flag from the terminal Ppi

+    //

+    CopyMem (AllSecPpiList, LocalSecPpiList, sizeof (LocalSecPpiList));

+    for (Index = 0; Index < PcdGet32 (PcdSecCoreMaxPpiSupported); Index ++) {

+      if ((AllSecPpiList[Index].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) == EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) {

+        break;

+      }

+    }

+    AllSecPpiList[Index].Flags = AllSecPpiList[Index].Flags & (~EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);

+

+    //

+    // Append the platform additional Ppi list

+    //

+    Index += 1;

+    while (Index < PcdGet32 (PcdSecCoreMaxPpiSupported) &&

+           ((PpiList->Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST)) {

+      CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));

+      Index++;

+      PpiList++;

+    }

+

+    //

+    // Check whether the total Ppis exceeds the max supported Ppi.

+    //

+    if (Index >= PcdGet32 (PcdSecCoreMaxPpiSupported)) {

+      //

+      // the total Ppi is larger than the supported Max

+      // PcdSecCoreMaxPpiSupported can be enlarged to solve it.

+      //

+      CpuDeadLoop ();

+    } else {

+      //

+      // Add the terminal Ppi

+      //

+      CopyMem (&AllSecPpiList[Index], PpiList, sizeof (EFI_PEI_PPI_DESCRIPTOR));

+    }

+

+    //

+    // Set PpiList to the total Ppi

+    //

+    PpiList = &AllSecPpiList[0];

+  } else {

+    //

+    // No addition Ppi, PpiList directly point to the common Ppi list.

+    //

+    PpiList = &LocalSecPpiList[0];

+  }

+

+  //

+  // Transfer the control to the PEI core

+  //

+  ASSERT (PeiCoreEntryPoint != NULL);

+  (*PeiCoreEntryPoint) (SecCoreData, PpiList);

+

+  //

+  // Should not come here.

+  //

+  return ;

+}

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/SecMain.h b/IntelFspWrapperPkg/FspWrapperSecCore/SecMain.h
new file mode 100644
index 0000000000..afaadfe895
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/SecMain.h
@@ -0,0 +1,96 @@
+/** @file

+  Master header file for SecCore.

+

+  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+  This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php.

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#ifndef _SEC_CORE_H_

+#define _SEC_CORE_H_

+

+

+#include <PiPei.h>

+

+#include <Ppi/TopOfTemporaryRam.h>

+

+#include <Library/BaseLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PcdLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Library/FspPlatformSecLib.h>

+#include <Library/FspPlatformInfoLib.h>

+#include <Library/UefiCpuLib.h>

+#include <Library/PeCoffGetEntryPointLib.h>

+#include <Library/PeCoffExtraActionLib.h>

+#include <Library/DebugAgentLib.h>

+

+#include <FspApi.h>

+#include <FspInfoHeader.h>

+

+#define SEC_IDT_ENTRY_COUNT  34

+

+typedef struct _SEC_IDT_TABLE {

+  //

+  // Reserved 8 bytes preceding IDT to store EFI_PEI_SERVICES**, since IDT base

+  // address should be 8-byte alignment.

+  // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store

+  // EFI_PEI_SERVICES**

+  //

+  UINT64            PeiService;

+  UINT64            IdtTable[SEC_IDT_ENTRY_COUNT];

+} SEC_IDT_TABLE;

+

+/**

+  Entry point to the C language phase of SEC. After the SEC assembly

+  code has initialized some temporary memory and set up the stack,

+  the control is transferred to this function.

+

+  @param[in] SizeOfRam           Size of the temporary memory available for use.

+  @param[in] TempRamBase         Base address of tempory ram

+  @param[in] BootFirmwareVolume  Base address of the Boot Firmware Volume.

+**/

+VOID

+EFIAPI

+SecStartup (

+  IN UINT32                   SizeOfRam,

+  IN UINT32                   TempRamBase,

+  IN VOID                     *BootFirmwareVolume

+  );

+

+/**

+  Find and return Pei Core entry point.

+

+  It also find SEC and PEI Core file debug inforamtion. It will report them if

+  remote debug is enabled.

+

+  @param[in]  BootFirmwareVolumePtr  Point to the boot firmware volume.

+  @param[out] PeiCoreEntryPoint      Point to the PEI core entry point.

+

+**/

+VOID

+EFIAPI

+FindAndReportEntryPoints (

+  IN  EFI_FIRMWARE_VOLUME_HEADER       *BootFirmwareVolumePtr,

+  OUT EFI_PEI_CORE_ENTRY_POINT         *PeiCoreEntryPoint

+  );

+

+/**

+  Autogenerated function that calls the library constructors for all of the module's

+  dependent libraries.  This function must be called by the SEC Core once a stack has

+  been established.

+

+**/

+VOID

+EFIAPI

+ProcessLibraryConstructorList (

+  VOID

+  );

+

+#endif

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Bin/ResetVec.ia32.raw b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Bin/ResetVec.ia32.raw
new file mode 100644
index 0000000000..2dc9f178d3
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Bin/ResetVec.ia32.raw
diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Build.py b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Build.py
new file mode 100644
index 0000000000..3018391445
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Build.py
@@ -0,0 +1,53 @@
+## @file

+#  Automate the process of building the various reset vector types

+#

+#  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+

+import glob

+import os

+import subprocess

+import sys

+

+def RunCommand(commandLine):

+    #print ' '.join(commandLine)

+    return subprocess.call(commandLine)

+

+for filename in glob.glob(os.path.join('Bin', '*.raw')):

+    os.remove(filename)

+

+arch = 'ia32'

+debugType = None

+output = os.path.join('Bin', 'ResetVec')

+output += '.' + arch

+if debugType is not None:

+    output += '.' + debugType

+output += '.raw'

+commandLine = (

+    'nasm',

+    '-D', 'ARCH_%s' % arch.upper(),

+    '-D', 'DEBUG_%s' % str(debugType).upper(),

+    '-o', output,

+    'ResetVectorCode.asm',

+    )

+ret = RunCommand(commandLine)

+print '\tASM\t' + output

+if ret != 0: sys.exit(ret)

+

+commandLine = (

+    'python',

+    'Tools/FixupForRawSection.py',

+    output,

+    )

+print '\tFIXUP\t' + output

+ret = RunCommand(commandLine)

+if ret != 0: sys.exit(ret)

+

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Ia16/ResetVec.asm16 b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Ia16/ResetVec.asm16
new file mode 100644
index 0000000000..585876fa86
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Ia16/ResetVec.asm16
@@ -0,0 +1,103 @@
+;; @file

+;  Reset Vector Data structure

+;  This structure is located at 0xFFFFFFC0

+;

+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php.

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+;;

+

+BITS    16

+

+

+;

+; The layout of this file is fixed. The build tool makes assumption of the layout.

+;

+

+ORG     0x0

+;

+; Reserved

+;

+ReservedData:         DD 0eeeeeeeeh, 0eeeeeeeeh

+

+ ;  ORG     0x10

+ TIMES 0x10-($-$$) DB 0

+;

+; This is located at 0xFFFFFFD0h

+;

+    mov     di, "AP"

+    jmp     ApStartup

+

+ ;   ORG     0x20

+

+ TIMES 0x20-($-$$) DB 0

+

+; Pointer to the entry point of the PEI core

+; It is located at 0xFFFFFFE0, and is fixed up by some build tool

+; So if the value 8..1 appears in the final FD image, tool failure occurs.

+;

+PeiCoreEntryPoint:       DD      0x12345678

+

+;

+; This is the handler for all kinds of exceptions. Since it's for debugging

+; purpose only, nothing except a deadloop would be done here. Developers could

+; analyze the cause of the exception if a debugger had been attached.

+;

+InterruptHandler:

+    jmp     $

+    iret

+

+  ;  ORG     0x30

+ TIMES 0x30-($-$$) DB 0

+;

+; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte

+; Execution starts here upon power-on/platform-reset.

+;

+ResetHandler:

+    nop

+    nop

+

+ApStartup:

+    ;

+    ; Jmp Rel16 instruction

+    ; Use machine code directly in case of the assembler optimization

+    ; SEC entry point relatvie address will be fixed up by some build tool.

+    ;

+    ; Typically, SEC entry point is the function _ModuleEntryPoint() defined in

+    ; SecEntry.asm

+    ;

+    DB      0x0e9

+    DW      -3

+

+  ; ORG     0x38

+

+ TIMES 0x38-($-$$) DB 0

+;

+; Ap reset vector segment address is at 0xFFFFFFF8

+; This will be fixed up by some build tool,

+; so if the value 1..8 appears in the final FD image,

+; tool failure occurs

+;

+ApSegAddress:    dd      0x12345678

+

+ ;   ORG     0x3c

+ TIMES 0x3c-($-$$) DB 0

+;

+; BFV Base is at 0xFFFFFFFC

+; This will be fixed up by some build tool,

+; so if the value 1..8 appears in the final FD image,

+; tool failure occurs.

+;

+BfvBase:     DD      0x12345678

+

+;

+; Nothing can go here, otherwise the layout of this file would change.

+;

+

+   ; END

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/ResetVectorCode.asm b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/ResetVectorCode.asm
new file mode 100644
index 0000000000..72b252491f
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/ResetVectorCode.asm
@@ -0,0 +1,17 @@
+;------------------------------------------------------------------------------

+; @file

+; This file includes all other code files to assemble the reset vector code

+;

+; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+; This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+;------------------------------------------------------------------------------

+

+

+%include "Ia16/ResetVec.asm16"

diff --git a/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Tools/FixupForRawSection.py b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Tools/FixupForRawSection.py
new file mode 100644
index 0000000000..8e7c20b401
--- /dev/null
+++ b/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Tools/FixupForRawSection.py
@@ -0,0 +1,110 @@
+## @file

+#  Apply fixup to VTF binary image for FFS Raw section

+#

+#  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+

+import sys

+

+filename = sys.argv[1]

+

+if filename.lower().find('ia32') >= 0:

+    d = open(sys.argv[1], 'rb').read()

+    c = ((len(d) + 4 + 7) & ~7) - 4

+    if c > len(d):

+        c -= len(d)

+        f = open(sys.argv[1], 'wb')

+        f.write('\x90' * c)

+        f.write(d)

+        f.close()

+else:

+    from struct import pack

+

+    PAGE_PRESENT             =     0x01

+    PAGE_READ_WRITE          =     0x02

+    PAGE_USER_SUPERVISOR     =     0x04

+    PAGE_WRITE_THROUGH       =     0x08

+    PAGE_CACHE_DISABLE       =    0x010

+    PAGE_ACCESSED            =    0x020

+    PAGE_DIRTY               =    0x040

+    PAGE_PAT                 =    0x080

+    PAGE_GLOBAL              =   0x0100

+    PAGE_2M_MBO              =    0x080

+    PAGE_2M_PAT              =  0x01000

+

+    def NopAlign4k(s):

+        c = ((len(s) + 0xfff) & ~0xfff) - len(s)

+        return ('\x90' * c) + s

+

+    def PageDirectoryEntries4GbOf2MbPages(baseAddress):

+

+        s = ''

+        for i in range(0x800):

+            i = (

+                    baseAddress + long(i << 21) +

+                    PAGE_2M_MBO +

+                    PAGE_CACHE_DISABLE +

+                    PAGE_ACCESSED +

+                    PAGE_DIRTY +

+                    PAGE_READ_WRITE +

+                    PAGE_PRESENT

+                )

+            s += pack('Q', i)

+        return s

+

+    def PageDirectoryPointerTable4GbOf2MbPages(pdeBase):

+        s = ''

+        for i in range(0x200):

+            i = (

+                    pdeBase +

+                    (min(i, 3) << 12) +

+                    PAGE_CACHE_DISABLE +

+                    PAGE_ACCESSED +

+                    PAGE_READ_WRITE +

+                    PAGE_PRESENT

+                )

+            s += pack('Q', i)

+        return s

+

+    def PageMapLevel4Table4GbOf2MbPages(pdptBase):

+        s = ''

+        for i in range(0x200):

+            i = (

+                    pdptBase +

+                    (min(i, 0) << 12) +

+                    PAGE_CACHE_DISABLE +

+                    PAGE_ACCESSED +

+                    PAGE_READ_WRITE +

+                    PAGE_PRESENT

+                )

+            s += pack('Q', i)

+        return s

+

+    def First4GbPageEntries(topAddress):

+        PDE = PageDirectoryEntries4GbOf2MbPages(0L)

+        pml4tBase = topAddress - 0x1000

+        pdptBase = pml4tBase - 0x1000

+        pdeBase = pdptBase - len(PDE)

+        PDPT = PageDirectoryPointerTable4GbOf2MbPages(pdeBase)

+        PML4T = PageMapLevel4Table4GbOf2MbPages(pdptBase)

+        return PDE + PDPT + PML4T

+

+    def AlignAndAddPageTables():

+        d = open(sys.argv[1], 'rb').read()

+        code = NopAlign4k(d)

+        topAddress = 0x100000000 - len(code)

+        d = ('\x90' * 4) + First4GbPageEntries(topAddress) + code

+        f = open(sys.argv[1], 'wb')

+        f.write(d)

+        f.close()

+

+    AlignAndAddPageTables()

+