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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2021-03-09 16:45:10 +0000 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-05-27 10:08:32 +0000 |
| commit | e1999b264f1f9d7230edf2448f757c73da567832 (patch) | |
| tree | 85f9a448b867a23c0ca9e6d1bd7af5c2f3d58922 /Maintainers.txt | |
| parent | cfa6ffb113f2c0d922034cc77c0d6c52eea05497 (diff) | |
| download | edk2-e1999b264f1f9d7230edf2448f757c73da567832.tar.gz edk2-e1999b264f1f9d7230edf2448f757c73da567832.tar.bz2 edk2-e1999b264f1f9d7230edf2448f757c73da567832.zip | |
ArmPkg/ArmGic: Fix maximum number of interrupts in GICv3edk2-stable202105
Bugzilla: 3415 (https://bugzilla.tianocore.org/show_bug.cgi?id=3415)
The GICv3 architecture supports up to 1020 ordinary interrupt
lines. The actual number of interrupts supported is described by the
ITLinesNumber field in the GICD_TYPER register. The total number of
implemented registers is normally calculated as
32*(ITLinesNumber+1). However, maximum value (0x1f) is a special case
since that would indicate that 1024 interrupts are implemented.
Add handling for this special case in ArmGicGetMaxNumInterrupts.
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Diffstat (limited to 'Maintainers.txt')
0 files changed, 0 insertions, 0 deletions