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| author | li-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-10-30 04:23:40 +0000 |
|---|---|---|
| committer | li-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-10-30 04:23:40 +0000 |
| commit | 37623a5c029e5415fe24b86bf4f6481f8fdfad94 (patch) | |
| tree | 925965b7341d07571b8bb22d51cacd39262ac0b7 /MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | |
| parent | cb38c322f037a9a5d2751a4c7e351b0ee7302e96 (diff) | |
| download | edk2-37623a5c029e5415fe24b86bf4f6481f8fdfad94.tar.gz edk2-37623a5c029e5415fe24b86bf4f6481f8fdfad94.tar.bz2 edk2-37623a5c029e5415fe24b86bf4f6481f8fdfad94.zip | |
Add missing status code in several modules.
Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
Reviewed-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13890 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 27 |
1 files changed, 25 insertions, 2 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c index 517250abe1..5afbb82298 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c @@ -8,7 +8,7 @@ PCI Root Bridges. So it means platform needs install PCI Root Bridge IO protocol for each
PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -239,7 +239,8 @@ PciBusDriverBindingStart ( IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
//
// Check RemainingDevicePath validation
@@ -286,6 +287,28 @@ PciBusDriverBindingStart ( gFullEnumeration = (BOOLEAN) ((SearchHostBridgeHandle (Controller) ? FALSE : TRUE));
//
+ // Open Device Path Protocol for PCI root bridge
+ //
+ Status = gBS->OpenProtocol (
+ Controller,
+ &gEfiDevicePathProtocolGuid,
+ (VOID **) &ParentDevicePath,
+ This->DriverBindingHandle,
+ Controller,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Report Status Code to indicate PCI bus starts
+ //
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (
+ EFI_PROGRESS_CODE,
+ (EFI_IO_BUS_PCI | EFI_IOB_PC_INIT),
+ ParentDevicePath
+ );
+
+ //
// Enumerate the entire host bridge
// After enumeration, a database that records all the device information will be created
//
|