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author | niruiyu <niruiyu@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-08-04 09:08:09 +0000 |
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committer | niruiyu <niruiyu@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-08-04 09:08:09 +0000 |
commit | 8db6a82c50fe16bd16a8dc53e890f13a8a91896c (patch) | |
tree | 4f46b0a9e38d9bdb746cd283cabbb856373bb1a0 /MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | |
parent | 48c0731857388a5b12b0d605177450370c527700 (diff) | |
download | edk2-8db6a82c50fe16bd16a8dc53e890f13a8a91896c.tar.gz edk2-8db6a82c50fe16bd16a8dc53e890f13a8a91896c.tar.bz2 edk2-8db6a82c50fe16bd16a8dc53e890f13a8a91896c.zip |
Print resource allocation/bar programming when PciBus driver does PCI BUS enumeration.
Signed-off-by: niruiyu
Reviewed-by: rsun3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12087 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h')
-rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h index d77982c02a..239835eab7 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h @@ -1,7 +1,7 @@ /** @file
Header files and data structures needed by PCI Bus module.
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -32,6 +32,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Protocol/IncompatiblePciDeviceSupport.h>
#include <Protocol/PciOverride.h>
#include <Protocol/PciEnumerationComplete.h>
+#include <Protocol/DevicePathToText.h>
#include <Library/DebugLib.h>
#include <Library/UefiDriverEntryPoint.h>
@@ -127,6 +128,12 @@ struct _PCI_BAR { #define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8
#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9
+#define RB_IO_RANGE 1
+#define RB_MEM32_RANGE 2
+#define RB_PMEM32_RANGE 3
+#define RB_MEM64_RANGE 4
+#define RB_PMEM64_RANGE 5
+
#define PPB_BAR_0 0
#define PPB_BAR_1 1
#define PPB_IO_RANGE 2
|