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| author | Hao Wu <hao.a.wu@intel.com> | 2019-03-18 16:33:44 +0800 |
|---|---|---|
| committer | Hao Wu <hao.a.wu@intel.com> | 2019-04-24 16:13:14 +0800 |
| commit | 04c7a5febd82681692c95450ea1979daee8f31aa (patch) | |
| tree | b7fec4a2ddcc93281a173c7a3dcf660965294d9d /MdeModulePkg/Bus | |
| parent | 36082dffd48da4d0475ed9b71f92fdd561304e8e (diff) | |
| download | edk2-04c7a5febd82681692c95450ea1979daee8f31aa.tar.gz edk2-04c7a5febd82681692c95450ea1979daee8f31aa.tar.bz2 edk2-04c7a5febd82681692c95450ea1979daee8f31aa.zip | |
MdeModulePkg/AhciPei: Limit max transfer blocknum for 48-bit address
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1483
Due to the limited resource on the VTd DMA buffer size in the PEI phase,
the driver will limit the maximum transfer block number for 48-bit
addressing.
According to PCDs:
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000
gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000
The default buffer size allocated for IOMMU mapping is:
* 4M bytes for non-S3 cases;
* 2M bytes for S3
For ATA devices in 48-bit address mode, the maximum block number is
currently set to 0xFFFF. For a device with block size equal to 512 bytes,
the maximum buffer allowed for mapping within AhciPei driver will be close
to 32M bytes. Thus, this commit will limit the 48-bit mode maximum block
number to 0x800, which means 1M-byte maximum buffer for mapping when the
block size of a device is 512 bytes. By doing so, potential failure on
calls to the IOMMU 'Map' service can be avoided.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus')
| -rw-r--r-- | MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c index a83c213a47..11754b3057 100644 --- a/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AhciPei/AhciMode.c @@ -48,7 +48,13 @@ UINT8 mAtaTrustCommands[2] = { // Look up table (Lba48Bit) for maximum transfer block number
//
#define MAX_28BIT_TRANSFER_BLOCK_NUM 0x100
-#define MAX_48BIT_TRANSFER_BLOCK_NUM 0xFFFF
+//
+// Due to limited resource for VTd PEI DMA buffer on platforms, the driver
+// limits the maximum transfer block number for 48-bit addressing.
+// Here, setting to 0x800 means that for device with 512-byte block size, the
+// maximum buffer for DMA mapping will be 1M bytes in size.
+//
+#define MAX_48BIT_TRANSFER_BLOCK_NUM 0x800
UINT32 mMaxTransferBlockNumber[2] = {
MAX_28BIT_TRANSFER_BLOCK_NUM,
|