diff options
| author | Albecki, Mateusz <mateusz.albecki@intel.com> | 2019-09-26 22:27:42 +0800 |
|---|---|---|
| committer | Hao A Wu <hao.a.wu@intel.com> | 2019-09-29 09:11:16 +0800 |
| commit | 206783aa7f96870cc7d252d8ff93128c33b0a927 (patch) | |
| tree | ed6f246f5665bb437106339c13d14edf1428deee /MdeModulePkg/Bus | |
| parent | e86664d2b03d0a84b8b952f3d5111424b3e9c916 (diff) | |
| download | edk2-206783aa7f96870cc7d252d8ff93128c33b0a927.tar.gz edk2-206783aa7f96870cc7d252d8ff93128c33b0a927.tar.bz2 edk2-206783aa7f96870cc7d252d8ff93128c33b0a927.zip | |
MdeModulePkg/SdMmcPciHcDxe: Remove clock stop from HS200 switch
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2218
Stopping the SD clock before switching host controller
bus timing is only necessary if preset value enable is
set in host controller. Code that performs switch to
HS200 doesn't check this condition right now and we also
don't do the SD clock stop before any other bus timing switch
in host controller. Since the driver is generally not ready to support
host controller with preset value enable set we removed this
code.
Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Tested-by: Hao A Wu <hao.a.wu@intel.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Diffstat (limited to 'MdeModulePkg/Bus')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c index 3f4a8e5413..bd70490286 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c @@ -837,7 +837,6 @@ EmmcSwitchToHS200 ( )
{
EFI_STATUS Status;
- UINT16 ClockCtrl;
SD_MMC_HC_PRIVATE_DATA *Private;
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
@@ -851,40 +850,12 @@ EmmcSwitchToHS200 ( if (EFI_ERROR (Status)) {
return Status;
}
- //
- // Stop bus clock at first
- //
- Status = SdMmcHcStopClock (PciIo, Slot);
- if (EFI_ERROR (Status)) {
- return Status;
- }
Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming);
if (EFI_ERROR (Status)) {
return Status;
}
- //
- // Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit
- //
- Status = SdMmcHcWaitMmioSet (
- PciIo,
- Slot,
- SD_MMC_HC_CLOCK_CTRL,
- sizeof (ClockCtrl),
- BIT1,
- BIT1,
- SD_MMC_HC_GENERIC_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- return Status;
- }
- //
- // Set SD Clock Enable in the Clock Control register to 1
- //
- ClockCtrl = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
-
Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);
if (EFI_ERROR (Status)) {
return Status;
|