diff options
| author | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-04-12 01:49:27 +0000 |
|---|---|---|
| committer | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-04-12 01:49:27 +0000 |
| commit | 7e242786b7f9200f505514218642622f8bde01fb (patch) | |
| tree | bde71e0f4a88e6044ce0855e81b532628fa485c1 /MdeModulePkg/Bus | |
| parent | afa9cd2541b92b0cdcc9c103045c942c2b1731b3 (diff) | |
| download | edk2-7e242786b7f9200f505514218642622f8bde01fb.tar.gz edk2-7e242786b7f9200f505514218642622f8bde01fb.tar.bz2 edk2-7e242786b7f9200f505514218642622f8bde01fb.zip | |
MdeModulePkg PciBusDxe and DuetPkg PciBusNoEnumerationDxe: Update ResetPowerManagementFeature() to clear 4 related R/W bits in the PMCSR register, leaving other bits preserved.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13189 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c | 44 |
1 files changed, 32 insertions, 12 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c index d9fbaf7e12..ab655e7657 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPowerManagement.c @@ -1,7 +1,7 @@ /** @file
Power management support fucntions implementation for PCI Bus module.
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -50,19 +50,39 @@ ResetPowerManagementFeature ( //
// Turn off the PWE assertion and put the device into D0 State
//
- PowerManagementCSR = 0x8000;
//
- // Write PMCSR
+ // Read PMCSR
//
- PciIoDevice->PciIo.Pci.Write (
- &PciIoDevice->PciIo,
- EfiPciIoWidthUint16,
- PowerManagementRegBlock + 4,
- 1,
- &PowerManagementCSR
- );
-
- return EFI_SUCCESS;
+ Status = PciIoDevice->PciIo.Pci.Read (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint16,
+ PowerManagementRegBlock + 4,
+ 1,
+ &PowerManagementCSR
+ );
+
+ if (!EFI_ERROR (Status)) {
+ //
+ // Clear PME_Status bit
+ //
+ PowerManagementCSR |= BIT15;
+ //
+ // Clear PME_En bit. PowerState = D0.
+ //
+ PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);
+
+ //
+ // Write PMCSR
+ //
+ Status = PciIoDevice->PciIo.Pci.Write (
+ &PciIoDevice->PciIo,
+ EfiPciIoWidthUint16,
+ PowerManagementRegBlock + 4,
+ 1,
+ &PowerManagementCSR
+ );
+ }
+ return Status;
}
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