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authorAlbecki, Mateusz <mateusz.albecki@intel.com>2019-12-21 01:13:12 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-01-06 06:07:30 +0000
commitf68cb23c1469eee7ea6c28191dedcfef114d1495 (patch)
treed935f5dbc44089e4fcd97744d10e8b21218b501d /MdeModulePkg/Bus
parent49accdedf956f175041040e677163b7cbb746283 (diff)
downloadedk2-f68cb23c1469eee7ea6c28191dedcfef114d1495.tar.gz
edk2-f68cb23c1469eee7ea6c28191dedcfef114d1495.tar.bz2
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MdeModulePkg/SdMmcPciHcDxe: Add function to start SD clock
In SD card voltage switch flow we used to redo the entire internal clock setup after voltage switch. Since internal clock has already been setup this is wasting time on polling the internal clock stable. This commit changes it to only start the SD clock. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> Tested-by: Marcin Wojtas <mw@semihalf.com> Tested-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Diffstat (limited to 'MdeModulePkg/Bus')
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c11
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c33
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h15
3 files changed, 47 insertions, 12 deletions
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
index d63dc54e8c..b630daab76 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
@@ -1327,13 +1327,10 @@ SdCardIdentification (
goto Error;
}
- //
- // Restart the clock with first time parameters.
- // NOTE: it is not required to actually restart the clock
- // and go through internal clock setup again. Some time
- // could be saved if we simply started the SD clock.
- //
- SdMmcHcClockSupply (Private, Slot, 0, TRUE, 400);
+ Status = SdMmcHcStartSdClock (PciIo, Slot);
+ if (EFI_ERROR (Status)) {
+ goto Error;
+ }
gBS->Stall (1000);
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
index f667264c5e..e7f2fac69b 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c
@@ -759,6 +759,30 @@ SdMmcHcStopClock (
}
/**
+ Start the SD clock.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] Slot The slot number.
+
+ @retval EFI_SUCCESS Succeeded to start the SD clock.
+ @rtval Others Failed to start the SD clock.
+**/
+EFI_STATUS
+SdMmcHcStartSdClock (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
+ )
+{
+ UINT16 ClockCtrl;
+
+ //
+ // Set SD Clock Enable in the Clock Control register to 1
+ //
+ ClockCtrl = BIT2;
+ return SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+}
+
+/**
SD/MMC card clock supply.
Refer to SD Host Controller Simplified spec 3.0 Section 3.2.1 for details.
@@ -879,11 +903,10 @@ SdMmcHcClockSupply (
return Status;
}
- //
- // Set SD Clock Enable in the Clock Control register to 1
- //
- ClockCtrl = BIT2;
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
+ Status = SdMmcHcStartSdClock (PciIo, Slot);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
//
// We don't notify the platform on first time setup to avoid changing
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
index 826e851b04..4753bb6864 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h
@@ -479,6 +479,21 @@ SdMmcHcStopClock (
);
/**
+ Start the SD clock.
+
+ @param[in] PciIo The PCI IO protocol instance.
+ @param[in] Slot The slot number.
+
+ @retval EFI_SUCCESS Succeeded to start the SD clock.
+ @rtval Others Failed to start the SD clock.
+**/
+EFI_STATUS
+SdMmcHcStartSdClock (
+ IN EFI_PCI_IO_PROTOCOL *PciIo,
+ IN UINT8 Slot
+ );
+
+/**
SD/MMC bus power control.
Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.