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| author | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-04-08 05:29:22 +0000 |
|---|---|---|
| committer | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-04-08 05:29:22 +0000 |
| commit | 2c0f06f0b80eebec5ec4a19d6d4440ba17bbcb0d (patch) | |
| tree | 002238a12b3644e047ed4c861c243bdddac4790d /MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c | |
| parent | e0c2cc6f8975adde2c8605ae7fd76237bbcc7539 (diff) | |
| download | edk2-2c0f06f0b80eebec5ec4a19d6d4440ba17bbcb0d.tar.gz edk2-2c0f06f0b80eebec5ec4a19d6d4440ba17bbcb0d.tar.bz2 edk2-2c0f06f0b80eebec5ec4a19d6d4440ba17bbcb0d.zip | |
Add more checks to skip allocated SMRAM regions when searching for a largest free SMRAM region.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11514 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c')
| -rw-r--r-- | MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c index 532d4f2f6f..0cfd746a07 100644 --- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c @@ -1,7 +1,7 @@ /** @file
SMM IPL that produces SMM related runtime protocols and load the SMM Core into SMRAM
- Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
@@ -1045,6 +1045,13 @@ SmmIplEntry ( //
mCurrentSmramRange = NULL;
for (Index = 0, MaxSize = SIZE_256KB - EFI_PAGE_SIZE; Index < gSmmCorePrivate->SmramRangeCount; Index++) {
+ //
+ // Skip any SMRAM region that is already allocated, needs testing, or needs ECC initialization
+ //
+ if ((gSmmCorePrivate->SmramRanges[Index].RegionState & (EFI_ALLOCATED | EFI_NEEDS_TESTING | EFI_NEEDS_ECC_INITIALIZATION)) != 0) {
+ continue;
+ }
+
if (gSmmCorePrivate->SmramRanges[Index].CpuStart >= BASE_1MB) {
if ((gSmmCorePrivate->SmramRanges[Index].CpuStart + gSmmCorePrivate->SmramRanges[Index].PhysicalSize) <= BASE_4GB) {
if (gSmmCorePrivate->SmramRanges[Index].PhysicalSize >= MaxSize) {
|