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| author | Tomasz Michalec <tm@semihalf.com> | 2018-11-10 07:01:25 +0800 |
|---|---|---|
| committer | Hao Wu <hao.a.wu@intel.com> | 2018-11-20 13:46:57 +0800 |
| commit | a4708009ccd7e1c8ea4df36e733ba057bac9735d (patch) | |
| tree | 62b794e17d5058ae7e13d93e2d13754a43f0fecf /MdeModulePkg/Include/Protocol | |
| parent | 49c995342543882b85e1278cb0098aa21fa52302 (diff) | |
| download | edk2-a4708009ccd7e1c8ea4df36e733ba057bac9735d.tar.gz edk2-a4708009ccd7e1c8ea4df36e733ba057bac9735d.tar.bz2 edk2-a4708009ccd7e1c8ea4df36e733ba057bac9735d.zip | |
MdeModulePkg/SdMmcPciHcDxe: Add UhsSignaling to SdMmcOverride protocol
Some SD Host Controllers use different values in Host Control 2 Register
to select UHS Mode. This patch adds a new UhsSignaling type routine to
the NotifyPhase of the SdMmcOverride protocol.
UHS signaling configuration is moved to a common, default routine
(SdMmcHcUhsSignaling). After it is executed, the protocol producer
can override the values if needed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
Diffstat (limited to 'MdeModulePkg/Include/Protocol')
| -rw-r--r-- | MdeModulePkg/Include/Protocol/SdMmcOverride.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/MdeModulePkg/Include/Protocol/SdMmcOverride.h b/MdeModulePkg/Include/Protocol/SdMmcOverride.h index 8a7669e310..f948befba5 100644 --- a/MdeModulePkg/Include/Protocol/SdMmcOverride.h +++ b/MdeModulePkg/Include/Protocol/SdMmcOverride.h @@ -26,11 +26,28 @@ typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;
+//
+// Bus timing modes
+//
+typedef enum {
+ SdMmcUhsSdr12,
+ SdMmcUhsSdr25,
+ SdMmcUhsSdr50,
+ SdMmcUhsSdr104,
+ SdMmcUhsDdr50,
+ SdMmcMmcLegacy,
+ SdMmcMmcHsSdr,
+ SdMmcMmcHsDdr,
+ SdMmcMmcHs200,
+ SdMmcMmcHs400,
+} SD_MMC_BUS_MODE;
+
typedef enum {
EdkiiSdMmcResetPre,
EdkiiSdMmcResetPost,
EdkiiSdMmcInitHostPre,
EdkiiSdMmcInitHostPost,
+ EdkiiSdMmcUhsSignaling,
} EDKII_SD_MMC_PHASE_TYPE;
/**
|