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authorSami Mujawar <sami.mujawar@arm.com>2017-05-16 11:10:45 +0100
committerLeif Lindholm <leif.lindholm@linaro.org>2017-05-22 15:20:04 +0100
commit0e07733023ea26901eec5c51d17e8f38d10d0dea (patch)
treee0170c3d693e71abf331fea1e30b32075fe517f6 /MdeModulePkg/Logo
parent23d6348f924d27e72acdb3b5747ca26697e677e1 (diff)
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ArmPlatformPkg: Timer access for non-secure EL1/0
According to Section 2.3.6 of the "UEFI Specification 2.6 Errata A"; the primary CPU must be configured such that 'Timer access must be provided to non-secure EL1 and EL0 by setting bits EL1PCTEN and EL1PCEN in register CNTHCTL_EL2.' This commit adds this missing set-up to the PrePi and PrePeiCore modules. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Evan Lloyd <evan.lloyd@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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