diff options
| author | Chen A Chen <chen.a.chen@intel.com> | 2018-06-29 11:27:00 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2018-09-06 15:25:16 +0800 |
| commit | de005223b77c473d45c9c8a11147f6968325f73e (patch) | |
| tree | 63869a4fcb0adc8e9320db437658cbf00be8e8c0 /MdeModulePkg/Universal/DebugSupportDxe | |
| parent | 8d27b54baec211f628fb90fb045ed536be1ce368 (diff) | |
| download | edk2-de005223b77c473d45c9c8a11147f6968325f73e.tar.gz edk2-de005223b77c473d45c9c8a11147f6968325f73e.tar.bz2 edk2-de005223b77c473d45c9c8a11147f6968325f73e.zip | |
MdeModulePkg: Removing ipf which is no longer supported from edk2.
Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
[Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.
Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.
Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.
Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'MdeModulePkg/Universal/DebugSupportDxe')
6 files changed, 1 insertions, 2289 deletions
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/DebugSupportDxe.inf b/MdeModulePkg/Universal/DebugSupportDxe/DebugSupportDxe.inf index 0d37f5fb64..c81404baf1 100644 --- a/MdeModulePkg/Universal/DebugSupportDxe/DebugSupportDxe.inf +++ b/MdeModulePkg/Universal/DebugSupportDxe/DebugSupportDxe.inf @@ -30,7 +30,7 @@ #
# The following information is for reference only and not required by the build tools.
#
-# VALID_ARCHITECTURES = IA32 X64 IPF
+# VALID_ARCHITECTURES = IA32 X64
#
[Sources]
@@ -50,14 +50,6 @@ X64/PlDebugSupportX64.c
X64/AsmFuncs.nasm
-[Sources.IPF]
- Ipf/PlDebugSupport.h
- Ipf/PlDebugSupport.c
- Ipf/Ds64Macros.i
- Ipf/Common.i
- Ipf/AsmFuncs.s
-
-
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/AsmFuncs.s b/MdeModulePkg/Universal/DebugSupportDxe/Ipf/AsmFuncs.s deleted file mode 100644 index db75fc088e..0000000000 --- a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/AsmFuncs.s +++ /dev/null @@ -1,1382 +0,0 @@ -/// @file
-/// Low level IPF routines used by the debug support driver
-///
-/// Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-/// This program and the accompanying materials
-/// are licensed and made available under the terms and conditions of the BSD License
-/// which accompanies this distribution. The full text of the license may be found at
-/// http://opensource.org/licenses/bsd-license.php
-///
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-///
-///
-
-
-#include "Common.i"
-#include "Ds64Macros.i"
-
-ASM_GLOBAL PatchSaveBuffer
-ASM_GLOBAL IpfContextBuf
-ASM_GLOBAL CommonHandler
-ASM_GLOBAL ExternalInterruptCount
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// InstructionCacheFlush
-//
-// Description:
-// Flushes instruction cache for specified number of bytes
-//
- ASM_GLOBAL InstructionCacheFlush
- .proc InstructionCacheFlush
- .align 32
-InstructionCacheFlush::
- { .mii
- alloc r3=2, 0, 0, 0
- cmp4.leu p0,p6=32, r33;;
- (p6) mov r33=32;;
- }
- { .mii
- nop.m 0
- zxt4 r29=r33;;
- dep.z r30=r29, 0, 5;;
- }
- { .mii
- cmp4.eq p0,p7=r0, r30
- shr.u r28=r29, 5;;
- (p7) adds r28=1, r28;;
- }
- { .mii
- nop.m 0
- shl r27=r28, 5;;
- zxt4 r26=r27;;
- }
- { .mfb
- add r31=r26, r32
- nop.f 0
- nop.b 0
- }
-LoopBack: // $L143:
- { .mii
- fc r32
- adds r32=32, r32;;
- cmp.ltu p14,p15=r32, r31
- }
- { .mfb
- nop.m 0
- nop.f 0
- //(p14) br.cond.dptk.few $L143#;;
- (p14) br.cond.dptk.few LoopBack;;
- }
- { .mmi
- sync.i;;
- srlz.i
- nop.i 0;;
- }
- { .mfb
- nop.m 0
- nop.f 0
- br.ret.sptk.few b0;;
- }
- .endp InstructionCacheFlush
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// ChainHandler
-//
-// Description:
-// Chains an interrupt handler
-//
-// The purpose of this function is to enable chaining of the external interrupt.
-// Since there's no clean SAL abstraction for doing this, we must do it
-// surreptitiously.
-//
-// The reserved IVT entry at offset 0x3400 is coopted for use by this handler.
-// According to Itanium architecture, it is reserved. Strictly speaking, this is
-// not safe, as we're cheating and violating the Itanium architecture. However,
-// as long as we're the only ones cheating, we should be OK. Without hooks in
-// the SAL to enable IVT management, there aren't many good options.
-//
-// The strategy is to replace the first bundle of the external interrupt handler
-// with our own that will branch into a piece of code we've supplied and located
-// in the reserved IVT entry. Only the first bundle of the external interrupt
-// IVT entry is modified.
-//
-// The original bundle is moved and relocated to space
-// allocated within the reserved IVT entry. The next bundle following is
-// is generated to go a hard coded branch back to the second bundle of the
-// external interrupt IVT entry just in case the first bundle had no branch.
-//
-// Our new code will execute our handler, and then fall through to the
-// original bundle after restoring all context appropriately.
-//
-// The following is a representation of what the IVT memory map looks like with
-// our chained handler installed:
-//
-//
-//
-//
-//
-// This IVT entry is Failsafe bundle
-// reserved by the
-// Itanium architecture Original bundle 0
-// and is used for
-// for locating our
-// handler and the
-// original bundle Patch code...
-// zero of the ext
-// interrupt handler
-//
-// RSVD (3400) Unused
-//
-//
-//
-//
-//
-//
-//
-//
-//
-//
-//
-//
-// EXT_INT (3000) Bundle 0 Bundle zero - This one is
-// modified, all other bundles
-// in the EXT_INT entry are
-// untouched.
-//
-//
-// Arguments:
-//
-// Returns:
-//
-// Notes:
-//
-//
- ASM_GLOBAL ChainHandler
- .proc ChainHandler
-ChainHandler:
-
- NESTED_SETUP( 0,2+3,3,0 )
-
- mov r8=1 // r8 = success
- mov r2=cr.iva;;
-//
-// NOTE: There's a potential hazard here in that we're simply stealing a bunch of
-// bundles (memory) from the IVT and assuming there's no catastrophic side effect.
-//
-// First, save IVT area we're taking over with the patch so we can restore it later
-//
- addl out0=PATCH_ENTRY_OFFSET, r2 // out0 = source buffer
- movl out1=PatchSaveBuffer // out1 = destination buffer
- mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry
- br.call.sptk.few b0 = CopyBundles
-
-// Next, copy the patch code into the IVT
- movl out0=PatchCode // out0 = source buffer of patch code
- addl out1=PATCH_OFFSET, r2 // out1 = destination buffer - in IVT
- mov out2=PATCH_CODE_SIZE;;
- shr out2=out2, 4;; // out2 = number of bundles to copy
- br.call.sptk.few b0 = CopyBundles
-
-
-// copy original bundle 0 from the external interrupt handler to the
-// appropriate place in the reserved IVT interrupt slot
- addl out0=EXT_INT_ENTRY_OFFSET, r2 // out0 = source buffer
- addl out1=RELOCATED_EXT_INT, r2 // out1 = destination buffer - in reserved IVT
- mov out2=1;; // out2 = copy 1 bundle
- br.call.sptk.few b0 = CopyBundles
-
-// Now relocate it there because it very likely had a branch instruction that
-// that must now be fixed up.
- addl out0=RELOCATED_EXT_INT, r2 // out0 = new runtime address of bundle - in reserved IVT
- addl out1=EXT_INT_ENTRY_OFFSET, r2;;// out1 = IP address of previous location
- mov out2=out0;; // out2 = IP address of new location
- br.call.sptk.few b0 = RelocateBundle
-
-// Now copy into the failsafe branch into the next bundle just in case
-// the original ext int bundle 0 bundle did not contain a branch instruction
- movl out0=FailsafeBranch // out0 = source buffer
- addl out1=FAILSAFE_BRANCH_OFFSET, r2 // out1 = destination buffer - in reserved IVT
- mov out2=1;; // out2 = copy 1 bundle
- br.call.sptk.few b0 = CopyBundles
-
-// Last, copy in our replacement for the external interrupt IVT entry bundle 0
- movl out0=PatchCodeNewBun0 // out0 = source buffer - our replacement bundle 0
- addl out1=EXT_INT_ENTRY_OFFSET, r2 // out1 = destination buffer - bundle 0 of External interrupt entry
- mov out2=1;; // out2 = copy 1 bundle
- br.call.sptk.few b0 = CopyBundles
-
-ChainHandlerDone:
- NESTED_RETURN
-
- .endp ChainHandler
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// UnchainHandler
-//
-// Description:
-// Unchains an interrupt handler
-//
-// Arguments:
-//
-// Returns:
-//
-// Notes:
-//
-//
- ASM_GLOBAL UnchainHandler
- .proc UnchainHandler
-
-UnchainHandler:
-
- NESTED_SETUP( 0,2+3,3,0 )
-
- mov r8=1 // r8 = success
- mov r2=cr.iva;; // r2 = interrupt vector address
-
-// First copy original Ext Int bundle 0 back to it's proper home...
- addl out0=RELOCATED_EXT_INT, r2 // out0 = source - in reserved IVT
- addl out1=EXT_INT_ENTRY_OFFSET, r2 // out1 = destination buffer - first bundle of Ext Int entry
- mov out2=1;; // out2 = copy 1 bundle
- br.call.sptk.few b0 = CopyBundles
-
-// Now, relocate it again...
- addl out0=EXT_INT_ENTRY_OFFSET, r2 // out1 = New runtime address
- addl out1=RELOCATED_EXT_INT, r2;; // out0 = IP address of previous location
- mov out2=out0;; // out2 = IP address of new location
- br.call.sptk.few b0 = RelocateBundle
-
-// Last, restore the patch area
- movl out0=PatchSaveBuffer // out0 = source buffer
- addl out1=PATCH_ENTRY_OFFSET, r2 // out1 = destination buffer
- mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry
- br.call.sptk.few b0 = CopyBundles
-
-UnchainHandlerDone:
- NESTED_RETURN
-
- .endp UnchainHandler
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// CopyBundles
-//
-// Description:
-// Copies instruction bundles - flushes icache as necessary
-//
-// Arguments:
-// in0 - Bundle source
-// in1 - Bundle destination
-// in2 - Bundle count
-//
-// Returns:
-//
-// Notes:
-// This procedure is a leaf routine
-//
- .proc CopyBundles
-
-CopyBundles:
-
- NESTED_SETUP(3,2+1,0,0)
-
- shl in2=in2, 1;; // in2 = count of 8 byte blocks to copy
-
-CopyBundlesLoop:
-
- cmp.eq p14, p15 = 0, in2;; // Check if done
-(p14) br.sptk.few CopyBundlesDone;;
-
- ld8 loc2=[in0], 0x8;; // loc2 = source bytes
- st8 [in1]=loc2;; // [in1] = destination bytes
- fc in1;; // Flush instruction cache
- sync.i;; // Ensure local and remote data/inst caches in sync
- srlz.i;; // Ensure sync has been observed
- add in1=0x8, in1;; // in1 = next destination
- add in2=-1, in2;; // in2 = decrement 8 bytes blocks to copy
- br.sptk.few CopyBundlesLoop;;
-
-CopyBundlesDone:
- NESTED_RETURN
-
- .endp CopyBundles
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// RelocateBundle
-//
-// Description:
-// Relocates an instruction bundle by updating any ip-relative branch instructions.
-//
-// Arguments:
-// in0 - Runtime address of bundle
-// in1 - IP address of previous location of bundle
-// in2 - IP address of new location of bundle
-//
-// Returns:
-// in0 - 1 if successful or 0 if unsuccessful
-//
-// Notes:
-// This routine examines all slots in the given bundle that are destined for the
-// branch execution unit. If any of these slots contain an IP-relative branch
-// namely instructions B1, B2, B3, or B6, the slot is fixed-up with a new relative
-// address. Errors can occur if a branch cannot be reached.
-//
- .proc RelocateBundle
-
-RelocateBundle:
-
- NESTED_SETUP(3,2+4,3,0)
-
- mov loc2=SLOT0 // loc2 = slot index
- mov loc5=in0;; // loc5 = runtime address of bundle
- mov in0=1;; // in0 = success
-
-RelocateBundleNextSlot:
-
- cmp.ge p14, p15 = SLOT2, loc2;; // Check if maximum slot
-(p15) br.sptk.few RelocateBundleDone
-
- mov out0=loc5;; // out0 = runtime address of bundle
- br.call.sptk.few b0 = GetTemplate
- mov loc3=out0;; // loc3 = instruction template
- mov out0=loc5 // out0 = runtime address of bundle
- mov out1=loc2;; // out1 = instruction slot number
- br.call.sptk.few b0 = GetSlot
- mov loc4=out0;; // loc4 = instruction encoding
- mov out0=loc4 // out0 = instuction encoding
- mov out1=loc2 // out1 = instruction slot number
- mov out2=loc3;; // out2 = instruction template
- br.call.sptk.few b0 = IsSlotBranch
- cmp.eq p14, p15 = 1, out0;; // Check if branch slot
-(p15) add loc2=1,loc2 // Increment slot
-(p15) br.sptk.few RelocateBundleNextSlot
- mov out0=loc4 // out0 = instuction encoding
- mov out1=in1 // out1 = IP address of previous location
- mov out2=in2;; // out2 = IP address of new location
- br.call.sptk.few b0 = RelocateSlot
- cmp.eq p14, p15 = 1, out1;; // Check if relocated slot
-(p15) mov in0=0 // in0 = failure
-(p15) br.sptk.few RelocateBundleDone
- mov out2=out0;; // out2 = instruction encoding
- mov out0=loc5 // out0 = runtime address of bundle
- mov out1=loc2;; // out1 = instruction slot number
- br.call.sptk.few b0 = SetSlot
- add loc2=1,loc2;; // Increment slot
- br.sptk.few RelocateBundleNextSlot
-
-RelocateBundleDone:
- NESTED_RETURN
-
- .endp RelocateBundle
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// RelocateSlot
-//
-// Description:
-// Relocates an instruction bundle by updating any ip-relative branch instructions.
-//
-// Arguments:
-// in0 - Instruction encoding (41-bits, right justified)
-// in1 - IP address of previous location of bundle
-// in2 - IP address of new location of bundle
-//
-// Returns:
-// in0 - Instruction encoding (41-bits, right justified)
-// in1 - 1 if successful otherwise 0
-//
-// Notes:
-// This procedure is a leaf routine
-//
- .proc RelocateSlot
-
-RelocateSlot:
- NESTED_SETUP(3,2+5,0,0)
- extr.u loc2=in0, 37, 4;; // loc2 = instruction opcode
- cmp.eq p14, p15 = 4, loc2;; // IP-relative branch (B1) or
- // IP-relative counted branch (B2)
-(p15) cmp.eq p14, p15 = 5, loc2;; // IP-relative call (B3)
-(p15) cmp.eq p14, p15 = 7, loc2;; // IP-relative predict (B6)
-(p15) mov in1=1 // Instruction did not need to be reencoded
-(p15) br.sptk.few RelocateSlotDone
- tbit.nz p14, p15 = in0, 36;; // put relative offset sign bit in p14
- extr.u loc2=in0, 13, 20;; // loc2 = relative offset in instruction
-(p14) movl loc3=0xfffffffffff00000;; // extend sign
-(p14) or loc2=loc2, loc3;;
- shl loc2=loc2,4;; // convert to byte offset instead of bundle offset
- add loc3=loc2, in1;; // loc3 = physical address of branch target
-(p14) sub loc2=r0,loc2;; // flip sign in loc2 if offset is negative
- sub loc4=loc3,in2;; // loc4 = relative offset from new ip to branch target
- cmp.lt p15, p14 = 0, loc4;; // get new sign bit
-(p14) sub loc5=r0,loc4 // get absolute value of offset
-(p15) mov loc5=loc4;;
- movl loc6=0x0FFFFFF;; // maximum offset in bytes for ip-rel branch
- cmp.gt p14, p15 = loc5, loc6;; // check to see we're not out of range for an ip-relative branch
-(p14) br.sptk.few RelocateSlotError
- cmp.lt p15, p14 = 0, loc4;; // store sign in p14 again
-(p14) dep in0=-1,in0,36,1 // store sign bit in instruction
-(p15) dep in0=0,in0,36,1
- shr loc4=loc4, 4;; // convert back to bundle offset
- dep in0=loc4,in0,13,16;; // put first 16 bits of new offset into instruction
- shr loc4=loc4,16;;
- dep in0=loc4,in0,13+16,4 // put last 4 bits of new offset into instruction
- mov in1=1;; // in1 = success
- br.sptk.few RelocateSlotDone;;
-
-RelocateSlotError:
- mov in1=0;; // in1 = failure
-
-RelocateSlotDone:
- NESTED_RETURN
-
- .endp RelocateSlot
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// IsSlotBranch
-//
-// Description:
-// Determines if the given instruction is a branch instruction.
-//
-// Arguments:
-// in0 - Instruction encoding (41-bits, right justified)
-// in1 - Instruction slot number
-// in2 - Bundle template
-//
-// Returns:
-// in0 - 1 if branch or 0 if not branch
-//
-// Notes:
-// This procedure is a leaf routine
-//
-// IsSlotBranch recognizes all branch instructions by looking at the provided template.
-// The instruction encoding is only passed to this routine for future expansion.
-//
- .proc IsSlotBranch
-
-IsSlotBranch:
-
- NESTED_SETUP (3,2+0,0,0)
-
- mov in0=1;; // in0 = 1 which destroys the instruction
- andcm in2=in2,in0;; // in2 = even template to reduce compares
- mov in0=0;; // in0 = not a branch
- cmp.eq p14, p15 = 0x16, in2;; // Template 0x16 is BBB
-(p14) br.sptk.few IsSlotBranchTrue
- cmp.eq p14, p15 = SLOT0, in1;; // Slot 0 has no other possiblities
-(p14) br.sptk.few IsSlotBranchDone
- cmp.eq p14, p15 = 0x12, in2;; // Template 0x12 is MBB
-(p14) br.sptk.few IsSlotBranchTrue
- cmp.eq p14, p15 = SLOT1, in1;; // Slot 1 has no other possiblities
-(p14) br.sptk.few IsSlotBranchDone
- cmp.eq p14, p15 = 0x10, in2;; // Template 0x10 is MIB
-(p14) br.sptk.few IsSlotBranchTrue
- cmp.eq p14, p15 = 0x18, in2;; // Template 0x18 is MMB
-(p14) br.sptk.few IsSlotBranchTrue
- cmp.eq p14, p15 = 0x1C, in2;; // Template 0x1C is MFB
-(p14) br.sptk.few IsSlotBranchTrue
- br.sptk.few IsSlotBranchDone
-
-IsSlotBranchTrue:
- mov in0=1;; // in0 = branch
-
-IsSlotBranchDone:
- NESTED_RETURN
-
- .endp IsSlotBranch
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// GetTemplate
-//
-// Description:
-// Retrieves the instruction template for an instruction bundle
-//
-// Arguments:
-// in0 - Runtime address of bundle
-//
-// Returns:
-// in0 - Instruction template (5-bits, right-justified)
-//
-// Notes:
-// This procedure is a leaf routine
-//
- .proc GetTemplate
-
-GetTemplate:
-
- NESTED_SETUP (1,2+2,0,0)
-
- ld8 loc2=[in0], 0x8 // loc2 = first 8 bytes of branch bundle
- movl loc3=MASK_0_4;; // loc3 = template mask
- and loc2=loc2,loc3;; // loc2 = template, right justified
- mov in0=loc2;; // in0 = template, right justified
-
- NESTED_RETURN
-
- .endp GetTemplate
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// GetSlot
-//
-// Description:
-// Gets the instruction encoding for an instruction slot and bundle
-//
-// Arguments:
-// in0 - Runtime address of bundle
-// in1 - Instruction slot (either 0, 1, or 2)
-//
-// Returns:
-// in0 - Instruction encoding (41-bits, right justified)
-//
-// Notes:
-// This procedure is a leaf routine
-//
-// Slot0 - [in0 + 0x8] Bits 45-5
-// Slot1 - [in0 + 0x8] Bits 63-46 and [in0] Bits 22-0
-// Slot2 - [in0] Bits 63-23
-//
- .proc GetSlot
-
-GetSlot:
- NESTED_SETUP (2,2+3,0,0)
-
- ld8 loc2=[in0], 0x8;; // loc2 = first 8 bytes of branch bundle
- ld8 loc3=[in0];; // loc3 = second 8 bytes of branch bundle
- cmp.eq p14, p15 = 2, in1;; // check if slot 2 specified
- (p14) br.cond.sptk.few GetSlot2;; // get slot 2
- cmp.eq p14, p15 = 1, in1;; // check if slot 1 specified
- (p14) br.cond.sptk.few GetSlot1;; // get slot 1
-
-GetSlot0:
- extr.u in0=loc2, 5, 45 // in0 = extracted slot 0
- br.sptk.few GetSlotDone;;
-
-GetSlot1:
- extr.u in0=loc2, 46, 18 // in0 = bits 63-46 of loc2 right-justified
- extr.u loc4=loc3, 0, 23;; // loc4 = bits 22-0 of loc3 right-justified
- dep in0=loc4, in0, 18, 15;;
- shr.u loc4=loc4,15;;
- dep in0=loc4, in0, 33, 8;; // in0 = extracted slot 1
- br.sptk.few GetSlotDone;;
-
-GetSlot2:
- extr.u in0=loc3, 23, 41;; // in0 = extracted slot 2
-
-GetSlotDone:
- NESTED_RETURN
-
- .endp GetSlot
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// SetSlot
-//
-// Description:
-// Sets the instruction encoding for an instruction slot and bundle
-//
-// Arguments:
-// in0 - Runtime address of bundle
-// in1 - Instruction slot (either 0, 1, or 2)
-// in2 - Instruction encoding (41-bits, right justified)
-//
-// Returns:
-//
-// Notes:
-// This procedure is a leaf routine
-//
- .proc SetSlot
-
-SetSlot:
- NESTED_SETUP (3,2+3,0,0)
-
- ld8 loc2=[in0], 0x8;; // loc2 = first 8 bytes of bundle
- ld8 loc3=[in0];; // loc3 = second 8 bytes of bundle
- cmp.eq p14, p15 = 2, in1;; // check if slot 2 specified
- (p14) br.cond.sptk.few SetSlot2;; // set slot 2
- cmp.eq p14, p15 = 1, in1;; // check if slot 1 specified
- (p14) br.cond.sptk.few SetSlot1;; // set slot 1
-
-SetSlot0:
- dep loc2=0, loc2, 5, 41;; // remove old instruction from slot 0
- shl loc4=in2, 5;; // loc4 = new instruction ready to be inserted
- or loc2=loc2, loc4;; // loc2 = updated first 8 bytes of bundle
- add loc4=0x8,in0;; // loc4 = address to store first 8 bytes of bundle
- st8 [loc4]=loc2 // [loc4] = updated bundle
- br.sptk.few SetSlotDone;;
- ;;
-
-SetSlot1:
- dep loc2=0, loc2, 46, 18 // remove old instruction from slot 1
- dep loc3=0, loc3, 0, 23;;
- shl loc4=in2, 46;; // loc4 = partial instruction ready to be inserted
- or loc2=loc2, loc4;; // loc2 = updated first 8 bytes of bundle
- add loc4=0x8,in0;; // loc4 = address to store first 8 bytes of bundle
- st8 [loc4]=loc2;; // [loc4] = updated bundle
- shr.u loc4=in2, 18;; // loc4 = partial instruction ready to be inserted
- or loc3=loc3, loc4;; // loc3 = updated second 8 bytes of bundle
- st8 [in0]=loc3;; // [in0] = updated bundle
- br.sptk.few SetSlotDone;;
-
-SetSlot2:
- dep loc3=0, loc3, 23, 41;; // remove old instruction from slot 2
- shl loc4=in2, 23;; // loc4 = instruction ready to be inserted
- or loc3=loc3, loc4;; // loc3 = updated second 8 bytes of bundle
- st8 [in0]=loc3;; // [in0] = updated bundle
-
-SetSlotDone:
-
- NESTED_RETURN
- .endp SetSlot
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// GetIva
-//
-// Description:
-// C callable function to obtain the current value of IVA
-//
-// Returns:
-// Current value if IVA
-
- ASM_GLOBAL GetIva
- .proc GetIva
-GetIva:
- mov r8=cr2;;
- br.ret.sptk.many b0
-
- .endp GetIva
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// ProgramInterruptFlags
-//
-// Description:
-// C callable function to enable/disable interrupts
-//
-// Returns:
-// Previous state of psr.ic
-//
- ASM_GLOBAL ProgramInterruptFlags
- .proc ProgramInterruptFlags
-ProgramInterruptFlags:
- alloc loc0=1,2,0,0;;
- mov loc0=psr
- mov loc1=0x6000;;
- and r8=loc0, loc1 // obtain current psr.ic and psr.i state
- and in0=in0, loc1 // insure no extra bits set in input
- andcm loc0=loc0,loc1;; // clear original psr.i and psr.ic
- or loc0=loc0,in0;; // OR in new psr.ic value
- mov psr.l=loc0;; // write new psr
- srlz.d
- br.ret.sptk.many b0 // return
-
- .endp ProgramInterruptFlags
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// SpillContext
-//
-// Description:
-// Saves system context to context record.
-//
-// Arguments:
-// in0 = 512 byte aligned context record address
-// in1 = original B0
-// in2 = original ar.bsp
-// in3 = original ar.bspstore
-// in4 = original ar.rnat
-// in5 = original ar.pfs
-//
-// Notes:
-// loc0 - scratch
-// loc1 - scratch
-// loc2 - temporary application unat storage
-// loc3 - temporary exception handler unat storage
-
- .proc SpillContext
-
-SpillContext:
- alloc loc0=6,4,0,0;; // alloc 6 input, 4 locals, 0 outs
- mov loc2=ar.unat;; // save application context unat (spilled later)
- mov ar.unat=r0;; // set UNAT=0
- st8.spill [in0]=r0,8;;
- st8.spill [in0]=r1,8;; // save R1 - R31
- st8.spill [in0]=r2,8;;
- st8.spill [in0]=r3,8;;
- st8.spill [in0]=r4,8;;
- st8.spill [in0]=r5,8;;
- st8.spill [in0]=r6,8;;
- st8.spill [in0]=r7,8;;
- st8.spill [in0]=r8,8;;
- st8.spill [in0]=r9,8;;
- st8.spill [in0]=r10,8;;
- st8.spill [in0]=r11,8;;
- st8.spill [in0]=r12,8;;
- st8.spill [in0]=r13,8;;
- st8.spill [in0]=r14,8;;
- st8.spill [in0]=r15,8;;
- st8.spill [in0]=r16,8;;
- st8.spill [in0]=r17,8;;
- st8.spill [in0]=r18,8;;
- st8.spill [in0]=r19,8;;
- st8.spill [in0]=r20,8;;
- st8.spill [in0]=r21,8;;
- st8.spill [in0]=r22,8;;
- st8.spill [in0]=r23,8;;
- st8.spill [in0]=r24,8;;
- st8.spill [in0]=r25,8;;
- st8.spill [in0]=r26,8;;
- st8.spill [in0]=r27,8;;
- st8.spill [in0]=r28,8;;
- st8.spill [in0]=r29,8;;
- st8.spill [in0]=r30,8;;
- st8.spill [in0]=r31,8;;
- mov loc3=ar.unat;; // save debugger context unat (spilled later)
- stf.spill [in0]=f2,16;; // save f2 - f31
- stf.spill [in0]=f3,16;;
- stf.spill [in0]=f4,16;;
- stf.spill [in0]=f5,16;;
- stf.spill [in0]=f6,16;;
- stf.spill [in0]=f7,16;;
- stf.spill [in0]=f8,16;;
- stf.spill [in0]=f9,16;;
- stf.spill [in0]=f10,16;;
- stf.spill [in0]=f11,16;;
- stf.spill [in0]=f12,16;;
- stf.spill [in0]=f13,16;;
- stf.spill [in0]=f14,16;;
- stf.spill [in0]=f15,16;;
- stf.spill [in0]=f16,16;;
- stf.spill [in0]=f17,16;;
- stf.spill [in0]=f18,16;;
- stf.spill [in0]=f19,16;;
- stf.spill [in0]=f20,16;;
- stf.spill [in0]=f21,16;;
- stf.spill [in0]=f22,16;;
- stf.spill [in0]=f23,16;;
- stf.spill [in0]=f24,16;;
- stf.spill [in0]=f25,16;;
- stf.spill [in0]=f26,16;;
- stf.spill [in0]=f27,16;;
- stf.spill [in0]=f28,16;;
- stf.spill [in0]=f29,16;;
- stf.spill [in0]=f30,16;;
- stf.spill [in0]=f31,16;;
- mov loc0=pr;; // save predicates
- st8.spill [in0]=loc0,8;;
- st8.spill [in0]=in1,8;; // save b0 - b7... in1 already equals saved b0
- mov loc0=b1;;
- st8.spill [in0]=loc0,8;;
- mov loc0=b2;;
- st8.spill [in0]=loc0,8;;
- mov loc0=b3;;
- st8.spill [in0]=loc0,8;;
- mov loc0=b4;;
- st8.spill [in0]=loc0,8;;
- mov loc0=b5;;
- st8.spill [in0]=loc0,8;;
- mov loc0=b6;;
- st8.spill [in0]=loc0,8;;
- mov loc0=b7;;
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.rsc;; // save ar.rsc
- st8.spill [in0]=loc0,8;;
- st8.spill [in0]=in2,8;; // save ar.bsp (in2)
- st8.spill [in0]=in3,8;; // save ar.bspstore (in3)
- st8.spill [in0]=in4,8;; // save ar.rnat (in4)
- mov loc0=ar.fcr;; // save ar.fcr (ar21 - IA32 floating-point control register)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.eflag;; // save ar.eflag (ar24)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.csd;; // save ar.csd (ar25 - ia32 CS descriptor)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.ssd;; // save ar.ssd (ar26 - ia32 ss descriptor)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.cflg;; // save ar.cflg (ar27 - ia32 cr0 and cr4)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.fsr;; // save ar.fsr (ar28 - ia32 floating-point status register)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.fir;; // save ar.fir (ar29 - ia32 floating-point instruction register)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.fdr;; // save ar.fdr (ar30 - ia32 floating-point data register)
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.ccv;; // save ar.ccv
- st8.spill [in0]=loc0,8;;
- st8.spill [in0]=loc2,8;; // save ar.unat (saved to loc2 earlier)
- mov loc0=ar.fpsr;; // save floating point status register
- st8.spill [in0]=loc0,8;;
- st8.spill [in0]=in5,8;; // save ar.pfs
- mov loc0=ar.lc;; // save ar.lc
- st8.spill [in0]=loc0,8;;
- mov loc0=ar.ec;; // save ar.ec
- st8.spill [in0]=loc0,8;;
-
- // save control registers
- mov loc0=cr.dcr;; // save dcr
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.itm;; // save itm
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.iva;; // save iva
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.pta;; // save pta
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.ipsr;; // save ipsr
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.isr;; // save isr
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.iip;; // save iip
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.ifa;; // save ifa
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.itir;; // save itir
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.iipa;; // save iipa
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.ifs;; // save ifs
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.iim;; // save iim
- st8.spill [in0]=loc0,8;;
- mov loc0=cr.iha;; // save iha
- st8.spill [in0]=loc0,8;;
-
- // save debug registers
- mov loc0=dbr[r0];; // save dbr0 - dbr7
- st8.spill [in0]=loc0,8;;
- movl loc1=1;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=2;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=3;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=4;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=5;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=6;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=7;;
- mov loc0=dbr[loc1];;
- st8.spill [in0]=loc0,8;;
- mov loc0=ibr[r0];; // save ibr0 - ibr7
- st8.spill [in0]=loc0,8;;
- movl loc1=1;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=2;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=3;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=4;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=5;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=6;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- movl loc1=7;;
- mov loc0=ibr[loc1];;
- st8.spill [in0]=loc0,8;;
- st8.spill [in0]=loc3;;
-
- br.ret.sptk.few b0
-
- .endp SpillContext
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// FillContext
-//
-// Description:
-// Restores register context from context record.
-//
-// Arguments:
-// in0 = address of last element 512 byte aligned context record address
-// in1 = modified B0
-// in2 = modified ar.bsp
-// in3 = modified ar.bspstore
-// in4 = modified ar.rnat
-// in5 = modified ar.pfs
-//
-// Notes:
-// loc0 - scratch
-// loc1 - scratch
-// loc2 - temporary application unat storage
-// loc3 - temporary exception handler unat storage
-
- .proc FillContext
-FillContext:
- alloc loc0=6,4,0,0;; // alloc 6 inputs, 4 locals, 0 outs
- ld8.fill loc3=[in0],-8;; // int_nat (nat bits for R1-31)
- movl loc1=7;; // ibr7
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- movl loc1=6;; // ibr6
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- movl loc1=5;; // ibr5
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- movl loc1=4;; // ibr4
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- movl loc1=3;; // ibr3
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- movl loc1=2;; // ibr2
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- movl loc1=1;; // ibr1
- ld8.fill loc0=[in0],-8;;
- mov ibr[loc1]=loc0;;
- ld8.fill loc0=[in0],-8;; // ibr0
- mov ibr[r0]=loc0;;
- movl loc1=7;; // dbr7
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- movl loc1=6;; // dbr6
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- movl loc1=5;; // dbr5
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- movl loc1=4;; // dbr4
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- movl loc1=3;; // dbr3
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- movl loc1=2;; // dbr2
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- movl loc1=1;; // dbr1
- ld8.fill loc0=[in0],-8;;
- mov dbr[loc1]=loc0;;
- ld8.fill loc0=[in0],-8;; // dbr0
- mov dbr[r0]=loc0;;
- ld8.fill loc0=[in0],-8;; // iha
- mov cr.iha=loc0;;
- ld8.fill loc0=[in0],-8;; // iim
- mov cr.iim=loc0;;
- ld8.fill loc0=[in0],-8;; // ifs
- mov cr.ifs=loc0;;
- ld8.fill loc0=[in0],-8;; // iipa
- mov cr.iipa=loc0;;
- ld8.fill loc0=[in0],-8;; // itir
- mov cr.itir=loc0;;
- ld8.fill loc0=[in0],-8;; // ifa
- mov cr.ifa=loc0;;
- ld8.fill loc0=[in0],-8;; // iip
- mov cr.iip=loc0;;
- ld8.fill loc0=[in0],-8;; // isr
- mov cr.isr=loc0;;
- ld8.fill loc0=[in0],-8;; // ipsr
- mov cr.ipsr=loc0;;
- ld8.fill loc0=[in0],-8;; // pta
- mov cr.pta=loc0;;
- ld8.fill loc0=[in0],-8;; // iva
- mov cr.iva=loc0;;
- ld8.fill loc0=[in0],-8;; // itm
- mov cr.itm=loc0;;
- ld8.fill loc0=[in0],-8;; // dcr
- mov cr.dcr=loc0;;
- ld8.fill loc0=[in0],-8;; // ec
- mov ar.ec=loc0;;
- ld8.fill loc0=[in0],-8;; // lc
- mov ar.lc=loc0;;
- ld8.fill in5=[in0],-8;; // ar.pfs
- ld8.fill loc0=[in0],-8;; // ar.fpsr
- mov ar.fpsr=loc0;;
- ld8.fill loc2=[in0],-8;; // ar.unat - restored later...
- ld8.fill loc0=[in0],-8;; // ar.ccv
- mov ar.ccv=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.fdr
- mov ar.fdr=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.fir
- mov ar.fir=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.fsr
- mov ar.fsr=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.cflg
- mov ar.cflg=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.ssd
- mov ar.ssd=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.csd
- mov ar.csd=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.eflag
- mov ar.eflag=loc0;;
- ld8.fill loc0=[in0],-8;; // ar.fcr
- mov ar.fcr=loc0;;
- ld8.fill in4=[in0],-8;; // ar.rnat
- ld8.fill in3=[in0],-8;; // bspstore
- ld8.fill in2=[in0],-8;; // bsp
- ld8.fill loc0=[in0],-8;; // ar.rsc
- mov ar.rsc=loc0;;
- ld8.fill loc0=[in0],-8;; // B7 - B0
- mov b7=loc0;;
- ld8.fill loc0=[in0],-8;;
- mov b6=loc0;;
- ld8.fill loc0=[in0],-8;;
- mov b5=loc0;;
- ld8.fill loc0=[in0],-8;;
- mov b4=loc0;;
- ld8.fill loc0=[in0],-8;;
- mov b3=loc0;;
- ld8.fill loc0=[in0],-8;;
- mov b2=loc0;;
- ld8.fill loc0=[in0],-8;;
- mov b1=loc0;;
- ld8.fill in1=[in0],-8;; // b0 is temporarily stored in in1
- ld8.fill loc0=[in0],-16;; // predicates
- mov pr=loc0;;
- ldf.fill f31=[in0],-16;;
- ldf.fill f30=[in0],-16;;
- ldf.fill f29=[in0],-16;;
- ldf.fill f28=[in0],-16;;
- ldf.fill f27=[in0],-16;;
- ldf.fill f26=[in0],-16;;
- ldf.fill f25=[in0],-16;;
- ldf.fill f24=[in0],-16;;
- ldf.fill f23=[in0],-16;;
- ldf.fill f22=[in0],-16;;
- ldf.fill f21=[in0],-16;;
- ldf.fill f20=[in0],-16;;
- ldf.fill f19=[in0],-16;;
- ldf.fill f18=[in0],-16;;
- ldf.fill f17=[in0],-16;;
- ldf.fill f16=[in0],-16;;
- ldf.fill f15=[in0],-16;;
- ldf.fill f14=[in0],-16;;
- ldf.fill f13=[in0],-16;;
- ldf.fill f12=[in0],-16;;
- ldf.fill f11=[in0],-16;;
- ldf.fill f10=[in0],-16;;
- ldf.fill f9=[in0],-16;;
- ldf.fill f8=[in0],-16;;
- ldf.fill f7=[in0],-16;;
- ldf.fill f6=[in0],-16;;
- ldf.fill f5=[in0],-16;;
- ldf.fill f4=[in0],-16;;
- ldf.fill f3=[in0],-16;;
- ldf.fill f2=[in0],-8;;
- mov ar.unat=loc3;; // restore unat (int_nat) before fill of general registers
- ld8.fill r31=[in0],-8;;
- ld8.fill r30=[in0],-8;;
- ld8.fill r29=[in0],-8;;
- ld8.fill r28=[in0],-8;;
- ld8.fill r27=[in0],-8;;
- ld8.fill r26=[in0],-8;;
- ld8.fill r25=[in0],-8;;
- ld8.fill r24=[in0],-8;;
- ld8.fill r23=[in0],-8;;
- ld8.fill r22=[in0],-8;;
- ld8.fill r21=[in0],-8;;
- ld8.fill r20=[in0],-8;;
- ld8.fill r19=[in0],-8;;
- ld8.fill r18=[in0],-8;;
- ld8.fill r17=[in0],-8;;
- ld8.fill r16=[in0],-8;;
- ld8.fill r15=[in0],-8;;
- ld8.fill r14=[in0],-8;;
- ld8.fill r13=[in0],-8;;
- ld8.fill r12=[in0],-8;;
- ld8.fill r11=[in0],-8;;
- ld8.fill r10=[in0],-8;;
- ld8.fill r9=[in0],-8;;
- ld8.fill r8=[in0],-8;;
- ld8.fill r7=[in0],-8;;
- ld8.fill r6=[in0],-8;;
- ld8.fill r5=[in0],-8;;
- ld8.fill r4=[in0],-8;;
- ld8.fill r3=[in0],-8;;
- ld8.fill r2=[in0],-8;;
- ld8.fill r1=[in0],-8;;
- mov ar.unat=loc2;; // restore application context unat
-
- br.ret.sptk.many b0
-
- .endp FillContext
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// HookHandler
-//
-// Description:
-// Common branch target from hooked IVT entries. Runs in interrupt context.
-// Responsible for saving and restoring context and calling common C
-// handler. Banked registers running on bank 0 at entry.
-//
-// Arguments:
-// All arguments are passed in banked registers:
-// B0_REG = Original B0
-// SCRATCH_REG1 = IVT entry index
-//
-// Returns:
-// Returns via rfi
-//
-// Notes:
-// loc0 - scratch
-// loc1 - scratch
-// loc2 - vector number / mask
-// loc3 - 16 byte aligned context record address
-// loc4 - temporary storage of last address in context record
-
-HookHandler:
- flushrs;; // Synch RSE with backing store
- mov SCRATCH_REG2=ar.bsp // save interrupted context bsp
- mov SCRATCH_REG3=ar.bspstore // save interrupted context bspstore
- mov SCRATCH_REG4=ar.rnat // save interrupted context rnat
- mov SCRATCH_REG6=cr.ifs;; // save IFS in case we need to chain...
- cover;; // creates new frame, moves old
- // CFM to IFS.
- alloc SCRATCH_REG5=0,5,6,0 // alloc 5 locals, 6 outs
- ;;
- // save banked registers to locals
- mov out1=B0_REG // out1 = Original B0
- mov out2=SCRATCH_REG2 // out2 = original ar.bsp
- mov out3=SCRATCH_REG3 // out3 = original ar.bspstore
- mov out4=SCRATCH_REG4 // out4 = original ar.rnat
- mov out5=SCRATCH_REG5 // out5 = original ar.pfs
- mov loc2=SCRATCH_REG1;; // loc2 = vector number + chain flag
- bsw.1;; // switch banked registers to bank 1
- srlz.d // explicit serialize required
- // now fill in context record structure
- movl loc3=IpfContextBuf // Insure context record is aligned
- add loc0=-0x200,r0;; // mask the lower 9 bits (align on 512 byte boundary)
- and loc3=loc3,loc0;;
- add loc3=0x200,loc3;; // move to next 512 byte boundary
- // loc3 now contains the 512 byte aligned context record
- // spill register context into context record
- mov out0=loc3;; // Context record base in out0
- // original B0 in out1 already
- // original ar.bsp in out2 already
- // original ar.bspstore in out3 already
- br.call.sptk.few b0=SpillContext;; // spill context
- mov loc4=out0 // save modified address
-
- // At this point, the context has been saved to the context record and we're
- // ready to call the C part of the handler...
-
- movl loc0=CommonHandler;; // obtain address of plabel
- ld8 loc1=[loc0];; // get entry point of CommonHandler
- mov b6=loc1;; // put it in a branch register
- adds loc1= 8, loc0;; // index to GP in plabel
- ld8 r1=[loc1];; // set up gp for C call
- mov loc1=0xfffff;; // mask off so only vector bits are present
- and out0=loc2,loc1;; // pass vector number (exception type)
- mov out1=loc3;; // pass context record address
- br.call.sptk.few b0=b6;; // call C handler
-
- // We've returned from the C call, so restore the context and either rfi
- // back to interrupted thread, or chain into the SAL if this was an external interrupt
- mov out0=loc4;; // pass address of last element in context record
- br.call.sptk.few b0=FillContext;; // Fill context
- mov b0=out1 // fill in b0
- mov ar.rnat=out4
- mov ar.pfs=out5
-
- // Loadrs is necessary because the debugger may have changed some values in
- // the backing store. The processor, however may not be aware that the
- // stacked registers need to be reloaded from the backing store. Therefore,
- // we explicitly cause the RSE to refresh the stacked register's contents
- // from the backing store.
- mov loc0=ar.rsc // get RSC value
- mov loc1=ar.rsc // save it so we can restore it
- movl loc3=0xffffffffc000ffff;; // create mask for clearing RSC.loadrs
- and loc0=loc0,loc3;; // create value for RSC with RSC.loadrs==0
- mov ar.rsc=loc0;; // modify RSC
- loadrs;; // invalidate register stack
- mov ar.rsc=loc1;; // restore original RSC
-
- bsw.0;; // switch banked registers back to bank 0
- srlz.d;; // explicit serialize required
- mov PR_REG=pr // save predicates - to be restored after chaining decision
- mov B0_REG=b0 // save b0 - required by chain code
- mov loc2=EXCPT_EXTERNAL_INTERRUPT;;
- cmp.eq p7,p0=SCRATCH_REG1,loc2;; // check to see if this is the timer tick
- (p7) br.cond.dpnt.few DO_CHAIN;;
-
-NO_CHAIN:
- mov pr=PR_REG;;
- rfi;; // we're outa here.
-
-DO_CHAIN:
- mov pr=PR_REG
- mov SCRATCH_REG1=cr.iva
- mov SCRATCH_REG2=PATCH_RETURN_OFFSET;;
- add SCRATCH_REG1=SCRATCH_REG1, SCRATCH_REG2;;
- mov b0=SCRATCH_REG1;;
- br.cond.sptk.few b0;;
-
-EndHookHandler:
-
-
-/////////////////////////////////////////////
-//
-// Name:
-// HookStub
-//
-// Description:
-// HookStub will be copied from it's loaded location into the IVT when
-// an IVT entry is hooked. The IVT entry does an indirect jump via B0 to
-// HookHandler, which in turn calls into the default C handler, which calls
-// the user-installed C handler. The calls return and HookHandler executes
-// an rfi.
-//
-// Notes:
-// Saves B0 to B0_REG
-// Saves IVT index to SCRATCH_REG1 (immediate value is fixed up when code is copied
-// to the IVT entry.
-
- ASM_GLOBAL HookStub
- .proc HookStub
-HookStub:
-
- mov B0_REG=b0
- movl SCRATCH_REG1=HookHandler;;
- mov b0=SCRATCH_REG1;;
- mov SCRATCH_REG1=0;;// immediate value is fixed up during install of handler to be the vector number
- br.cond.sptk.few b0
-
- .endp HookStub
-
-
-/////////////////////////////////////////////
-// The following code is moved into IVT entry 14 (offset 3400) which is reserved
-// in the Itanium architecture. The patch code is located at the end of the
-// IVT entry.
-
-PatchCode:
- mov SCRATCH_REG0=psr
- mov SCRATCH_REG6=cr.ipsr
- mov PR_REG=pr
- mov B0_REG=b0;;
-
- // turn off any virtual translations
- movl SCRATCH_REG1 = ~( MASK(PSR_DT,1) | MASK(PSR_RT,1));;
- and SCRATCH_REG1 = SCRATCH_REG0, SCRATCH_REG1;;
- mov psr.l = SCRATCH_REG1;;
- srlz.d
- tbit.z p14, p15 = SCRATCH_REG6, PSR_IS;; // Check to see if we were
- // interrupted from IA32
- // context. If so, bail out
- // and chain to SAL immediately
- (p15) br.cond.sptk.few Stub_IVT_Passthru;;
- // we only want to take 1 out of 32 external interrupts to minimize the
- // impact to system performance. Check our interrupt count and bail
- // out if we're not up to 32
- movl SCRATCH_REG1=ExternalInterruptCount;;
- ld8 SCRATCH_REG2=[SCRATCH_REG1];; // ExternalInterruptCount
- tbit.z p14, p15 = SCRATCH_REG2, 5;; // bit 5 set?
- (p14) add SCRATCH_REG2=1, SCRATCH_REG2;; // No? Then increment
- // ExternalInterruptCount
- // and Chain to SAL
- // immediately
- (p14) st8 [SCRATCH_REG1]=SCRATCH_REG2;;
- (p14) br.cond.sptk.few Stub_IVT_Passthru;;
- (p15) mov SCRATCH_REG2=0;; // Yes? Then reset
- // ExternalInterruptCount
- // and branch to
- // HookHandler
- (p15) st8 [SCRATCH_REG1]=SCRATCH_REG2;;
- mov pr=PR_REG
- movl SCRATCH_REG1=HookHandler;; // SCRATCH_REG1 = entrypoint of HookHandler
- mov b0=SCRATCH_REG1;; // b0 = entrypoint of HookHandler
- mov SCRATCH_REG1=EXCPT_EXTERNAL_INTERRUPT;;
- br.sptk.few b0;; // branch to HookHandler
-
-PatchCodeRet:
- // fake-up an rfi to get RSE back to being coherent and insure psr has
- // original contents when interrupt occured, then exit to SAL
- // at this point:
- // cr.ifs has been modified by previous "cover"
- // SCRATCH_REG6 has original cr.ifs
-
- mov SCRATCH_REG5=cr.ipsr
- mov SCRATCH_REG4=cr.iip;;
- mov cr.ipsr=SCRATCH_REG0
- mov SCRATCH_REG1=ip;;
- add SCRATCH_REG1=0x30, SCRATCH_REG1;;
- mov cr.iip=SCRATCH_REG1;;
- rfi;; // rfi to next instruction
-
-Stub_RfiTarget:
- mov cr.ifs=SCRATCH_REG6
- mov cr.ipsr=SCRATCH_REG5
- mov cr.iip=SCRATCH_REG4;;
-
-Stub_IVT_Passthru:
- mov pr=PR_REG // pr = saved predicate registers
- mov b0=B0_REG;; // b0 = saved b0
-EndPatchCode:
-
-
-/////////////////////////////////////////////
-// The following bundle is moved into IVT entry 14 (offset 0x3400) which is reserved
-// in the Itanium architecture. This bundle will be the last bundle and will
-// be located at offset 0x37F0 in the IVT.
-
-FailsafeBranch:
-{
- .mib
- nop.m 0
- nop.i 0
- br.sptk.few -(FAILSAFE_BRANCH_OFFSET - EXT_INT_ENTRY_OFFSET - 0x10)
-}
-
-
-/////////////////////////////////////////////
-// The following bundle is moved into IVT entry 13 (offset 0x3000) which is the
-// external interrupt. It branches to the patch code.
-
-PatchCodeNewBun0:
-{
- .mib
- nop.m 0
- nop.i 0
- br.cond.sptk.few PATCH_BRANCH
-}
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/Common.i b/MdeModulePkg/Universal/DebugSupportDxe/Ipf/Common.i deleted file mode 100644 index a11f780125..0000000000 --- a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/Common.i +++ /dev/null @@ -1,29 +0,0 @@ -/// @file
-/// This is set of useful macros.
-///
-/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
-/// This program and the accompanying materials
-/// are licensed and made available under the terms and conditions of the BSD License
-/// which accompanies this distribution. The full text of the license may be found at
-/// http://opensource.org/licenses/bsd-license.php
-///
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-///
-/// Module Name: Common.i
-///
-///
-
-
-#define NESTED_SETUP(i,l,o,r) \
- alloc loc1=ar##.##pfs,i,l,o,r ; \
- mov loc0=b0 ;;
-
-
-#define NESTED_RETURN \
- mov b0=loc0 ; \
- mov ar##.##pfs=loc1 ;; \
- br##.##ret##.##dpnt b0 ;;
-
-#define MASK(bp,value) (value << bp)
-
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/Ds64Macros.i b/MdeModulePkg/Universal/DebugSupportDxe/Ipf/Ds64Macros.i deleted file mode 100644 index 8ce97f32c2..0000000000 --- a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/Ds64Macros.i +++ /dev/null @@ -1,78 +0,0 @@ -/// @file
-/// This is set of macros used in calculating offsets in the IVT.
-///
-/// Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-/// This program and the accompanying materials
-/// are licensed and made available under the terms and conditions of the BSD License
-/// which accompanies this distribution. The full text of the license may be found at
-/// http://opensource.org/licenses/bsd-license.php
-///
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-///
-///
-
-
-#define EXCPT_EXTERNAL_INTERRUPT 12
-#define MASK_0_4 0x000000000000001F // mask bits 0 through 4
-#define SLOT0 0
-#define SLOT1 1
-#define SLOT2 2
-
-#define PSR_DT 17
-#define PSR_TB 26
-#define PSR_RT 27
-#define PSR_IS 34
-#define PSR_IT 36
-#define PSR_IC 13
-#define PSR_I 14
-#define PSR_SS 40
-#define PSR_BN 44
-#define PSR_RI_MASK 0x60000000000
-
-#define EXCPT_EXTERNAL_INTERRUPT 12
-
-#define SCRATCH_REG0 r23
-#define SCRATCH_REG1 r24
-#define SCRATCH_REG2 r25
-#define SCRATCH_REG3 r26
-#define SCRATCH_REG4 r27
-#define SCRATCH_REG5 r28
-#define SCRATCH_REG6 r29
-#define PR_REG r30
-#define B0_REG r31
-
-
-// EXT_INT_OFFSET is the offset of the external interrupt entry in the IVT
-#define EXT_INT_ENTRY_OFFSET 0x03000
-
-// PATCH_ENTRY_OFFSET is the offset into the IVT of the entry that is coopted (stolen)
-// for use by the handler. The entire entry is restored when the handler is
-// unloaded.
-#define PATCH_ENTRY_OFFSET 0x03400
-
-// PATCH_CODE_SIZE is the size of patch code
-#define PATCH_CODE_SIZE (EndPatchCode - PatchCode)
-
-// A hard coded branch back into the external interrupt IVT entry's second bundle
-// is put here, just in case the original bundle zero did not have a branch
-// This is the last bundle in the reserved IVT entry
-#define FAILSAFE_BRANCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - 0x10)
-
-// the original external interrupt IVT entry bundle zero is copied and relocated
-// here... also in the reserved IVT entry
-// This is the second-to-last bundle in the reserved IVT entry
-#define RELOCATED_EXT_INT (PATCH_ENTRY_OFFSET + 0x400 - 0x20)
-
-// The patch is actually stored at the end of IVT:PATCH_ENTRY. The PATCH_OFFSET
-// is the offset into IVT where the patch is actually stored. It is carefully
-// located so that when we run out of patch code, the next bundle is the
-// relocated bundle 0 from the original external interrupt handler
-#define PATCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCode ) - 0x20)
-
-#define PATCH_RETURN_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCodeRet ) - 0x20)
-
-// PATCH_BRANCH is used only in the new bundle that is placed at the beginning
-// of the external interrupt IVT entry.
-#define PATCH_BRANCH (PATCH_OFFSET - EXT_INT_ENTRY_OFFSET)
-
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/PlDebugSupport.c b/MdeModulePkg/Universal/DebugSupportDxe/Ipf/PlDebugSupport.c deleted file mode 100644 index 44f59e8ec8..0000000000 --- a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/PlDebugSupport.c +++ /dev/null @@ -1,467 +0,0 @@ -/** @file
- IPF specific functions to support Debug Support protocol.
-
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "PlDebugSupport.h"
-
-BOOLEAN mInHandler = FALSE;
-
-//
-// number of bundles to swap in ivt
-//
-#define NUM_BUNDLES_IN_STUB 5
-#define NUM_IVT_ENTRIES 64
-
-typedef struct {
- BUNDLE OrigBundles[NUM_BUNDLES_IN_STUB];
- CALLBACK_FUNC RegisteredCallback;
-} IVT_ENTRY;
-
-IVT_ENTRY IvtEntryTable[NUM_IVT_ENTRIES];
-
-//
-// IPF context record is overallocated by 512 bytes to guarantee a 512 byte alignment exists
-// within the buffer and still have a large enough buffer to hold a whole IPF context record.
-//
-UINT8 IpfContextBuf[sizeof (EFI_SYSTEM_CONTEXT_IPF) + 512];
-
-//
-// The PatchSaveBuffer is used to store the original bundles from the IVT where it is patched
-// with the common handler.
-//
-UINT8 PatchSaveBuffer[0x400];
-UINTN ExternalInterruptCount;
-
-
-/**
- IPF specific DebugSupport driver initialization.
-
- Must be public because it's referenced from DebugSupport.c
-
- @retval EFI_SUCCESS Always.
-
-**/
-EFI_STATUS
-PlInitializeDebugSupportDriver (
- VOID
- )
-{
- ZeroMem (IvtEntryTable, sizeof (IvtEntryTable));
- ExternalInterruptCount = 0;
- return EFI_SUCCESS;
-}
-
-/**
- Unload handler that is called during UnloadImage() - deallocates pool memory
- used by the driver.
-
- Must be public because it's referenced from DebugSuport.c
-
- @param ImageHandle The firmware allocated handle for the EFI image.
-
- @retval EFI_SUCCESS Always.
-
-**/
-EFI_STATUS
-EFIAPI
-PlUnloadDebugSupportDriver (
- IN EFI_HANDLE ImageHandle
- )
-{
- EFI_EXCEPTION_TYPE ExceptionType;
-
- for (ExceptionType = 0; ExceptionType < NUM_IVT_ENTRIES; ExceptionType++) {
- ManageIvtEntryTable (ExceptionType, NULL, NULL);
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- C routine that is called for all registered exceptions. This is the main
- exception dispatcher.
-
- Must be public because it's referenced from AsmFuncs.s.
-
- @param ExceptionType Specifies which processor exception.
- @param Context System Context.
-**/
-VOID
-CommonHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT Context
- )
-{
- DEBUG_CODE_BEGIN ();
- if (mInHandler) {
- DEBUG ((EFI_D_INFO, "ERROR: Re-entered debugger!\n"
- " ExceptionType == %X\n"
- " Context == %X\n"
- " Context.SystemContextIpf->CrIip == %LX\n"
- " Context.SystemContextIpf->CrIpsr == %LX\n"
- " mInHandler == %X\n",
- (INT32)ExceptionType,
- Context,
- Context.SystemContextIpf->CrIip,
- Context.SystemContextIpf->CrIpsr,
- mInHandler));
- }
- DEBUG_CODE_END ();
-
- ASSERT (!mInHandler);
- mInHandler = TRUE;
- if (IvtEntryTable[ExceptionType].RegisteredCallback != NULL) {
- if (ExceptionType != EXCEPT_IPF_EXTERNAL_INTERRUPT) {
- IvtEntryTable[ExceptionType].RegisteredCallback (ExceptionType, Context.SystemContextIpf);
- } else {
- IvtEntryTable[ExceptionType].RegisteredCallback (Context.SystemContextIpf);
- }
- } else {
- ASSERT (0);
- }
-
- mInHandler = FALSE;
-}
-
-/**
- Given an integer number, return the physical address of the entry point in the IFT.
-
- @param HandlerIndex Index of the Handler
- @param EntryPoint IFT Entrypoint
-
-**/
-VOID
-GetHandlerEntryPoint (
- UINTN HandlerIndex,
- VOID **EntryPoint
- )
-{
- UINT8 *TempPtr;
-
- //
- // get base address of IVT
- //
- TempPtr = GetIva ();
-
- if (HandlerIndex < 20) {
- //
- // first 20 provide 64 bundles per vector
- //
- TempPtr += 0x400 * HandlerIndex;
- } else {
- //
- // the rest provide 16 bundles per vector
- //
- TempPtr += 0x5000 + 0x100 * (HandlerIndex - 20);
- }
-
- *EntryPoint = (VOID *) TempPtr;
-}
-
-/**
- This is the worker function that uninstalls and removes all handlers.
-
- @param ExceptionType Specifies which processor exception.
- @param NewBundles New Boundles.
- @param NewCallback A pointer to the new function to be registered.
-
- @retval EFI_ALEADY_STARTED Ivt already hooked.
- @retval EFI_SUCCESS Successfully uninstalled.
-
-**/
-EFI_STATUS
-ManageIvtEntryTable (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN BUNDLE NewBundles[NUM_BUNDLES_IN_STUB],
- IN CALLBACK_FUNC NewCallback
- )
-{
- BUNDLE *B0Ptr;
- UINT64 InterruptFlags;
- EFI_TPL OldTpl;
-
- //
- // Get address of bundle 0
- //
- GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);
-
- if (IvtEntryTable[ExceptionType].RegisteredCallback != NULL) {
- //
- // we've already installed to this vector
- //
- if (NewCallback != NULL) {
- //
- // if the input handler is non-null, error
- //
- return EFI_ALREADY_STARTED;
- } else {
- //
- // else remove the previously installed handler
- //
- OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
- InterruptFlags = ProgramInterruptFlags (DISABLE_INTERRUPTS);
- if (ExceptionType == EXCEPT_IPF_EXTERNAL_INTERRUPT) {
- UnchainExternalInterrupt ();
- } else {
- UnhookEntry (ExceptionType);
- }
-
- ProgramInterruptFlags (InterruptFlags);
- gBS->RestoreTPL (OldTpl);
- //
- // re-init IvtEntryTable
- //
- ZeroMem (&IvtEntryTable[ExceptionType], sizeof (IVT_ENTRY));
- }
- } else {
- //
- // no user handler installed on this vector
- //
- if (NewCallback != NULL) {
- OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
- InterruptFlags = ProgramInterruptFlags (DISABLE_INTERRUPTS);
- if (ExceptionType == EXCEPT_IPF_EXTERNAL_INTERRUPT) {
- ChainExternalInterrupt (NewCallback);
- } else {
- HookEntry (ExceptionType, NewBundles, NewCallback);
- }
-
- ProgramInterruptFlags (InterruptFlags);
- gBS->RestoreTPL (OldTpl);
- }
- }
-
- return EFI_SUCCESS;
-}
-
-/**
- Saves original IVT contents and inserts a few new bundles which are fixed up
- to store the ExceptionType and then call the common handler.
-
- @param ExceptionType Specifies which processor exception.
- @param NewBundles New Boundles.
- @param NewCallback A pointer to the new function to be hooked.
-
-**/
-VOID
-HookEntry (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN BUNDLE NewBundles[4],
- IN CALLBACK_FUNC NewCallback
- )
-{
- BUNDLE *FixupBundle;
- BUNDLE *B0Ptr;
-
- //
- // Get address of bundle 0
- //
- GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);
-
- //
- // copy original bundles from IVT to IvtEntryTable so we can restore them later
- //
- CopyMem (
- IvtEntryTable[ExceptionType].OrigBundles,
- B0Ptr,
- sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB
- );
- //
- // insert new B0
- //
- CopyMem (B0Ptr, NewBundles, sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB);
-
- //
- // fixup IVT entry so it stores its index and whether or not to chain...
- //
- FixupBundle = B0Ptr + 2;
- FixupBundle->High |= ExceptionType << 36;
-
- InstructionCacheFlush (B0Ptr, 5);
- IvtEntryTable[ExceptionType].RegisteredCallback = NewCallback;
-}
-
-/**
- Restores original IVT contents when unregistering a callback function.
-
- @param ExceptionType Specifies which processor exception.
-
-**/
-VOID
-UnhookEntry (
- IN EFI_EXCEPTION_TYPE ExceptionType
- )
-{
- BUNDLE *B0Ptr;
-
- //
- // Get address of bundle 0
- //
- GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);
- //
- // restore original bundles in IVT
- //
- CopyMem (
- B0Ptr,
- IvtEntryTable[ExceptionType].OrigBundles,
- sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB
- );
- InstructionCacheFlush (B0Ptr, 5);
-}
-
-/**
- Sets up cache flush and calls assembly function to chain external interrupt.
-
- Records new callback in IvtEntryTable.
-
- @param NewCallback A pointer to the interrupt handle.
-
-**/
-VOID
-ChainExternalInterrupt (
- IN CALLBACK_FUNC NewCallback
- )
-{
- VOID *Start;
-
- Start = (VOID *) ((UINT8 *) GetIva () + 0x400 * EXCEPT_IPF_EXTERNAL_INTERRUPT + 0x400);
- IvtEntryTable[EXCEPT_IPF_EXTERNAL_INTERRUPT].RegisteredCallback = NewCallback;
- ChainHandler ();
- InstructionCacheFlush (Start, 0x400);
-}
-
-/**
- Sets up cache flush and calls assembly function to restore external interrupt.
- Removes registered callback from IvtEntryTable.
-
-**/
-VOID
-UnchainExternalInterrupt (
- VOID
- )
-{
- VOID *Start;
-
- Start = (VOID *) ((UINT8 *) GetIva () + 0x400 * EXCEPT_IPF_EXTERNAL_INTERRUPT + 0x400);
- UnchainHandler ();
- InstructionCacheFlush (Start, 0x400);
- IvtEntryTable[EXCEPT_IPF_EXTERNAL_INTERRUPT].RegisteredCallback = NULL;
-}
-
-/**
- Returns the maximum value that may be used for the ProcessorIndex parameter in
- RegisterPeriodicCallback() and RegisterExceptionCallback().
-
- Hard coded to support only 1 processor for now.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported
- processor index is returned. Always 0 returned.
-
- @retval EFI_SUCCESS Always returned with **MaxProcessorIndex set to 0.
-
-**/
-EFI_STATUS
-EFIAPI
-GetMaximumProcessorIndex (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- OUT UINTN *MaxProcessorIndex
- )
-{
- *MaxProcessorIndex = 0;
- return (EFI_SUCCESS);
-}
-
-/**
- Registers a function to be called back periodically in interrupt context.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param ProcessorIndex Specifies which processor the callback function applies to.
- @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main
- periodic entry point of the debug agent.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
- function was previously registered.
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
- function.
-**/
-EFI_STATUS
-EFIAPI
-RegisterPeriodicCallback (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- IN UINTN ProcessorIndex,
- IN EFI_PERIODIC_CALLBACK PeriodicCallback
- )
-{
- return ManageIvtEntryTable (EXCEPT_IPF_EXTERNAL_INTERRUPT, NULL, PeriodicCallback);
-}
-
-/**
- Registers a function to be called when a given processor exception occurs.
-
- This code executes in boot services context.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param ProcessorIndex Specifies which processor the callback function applies to.
- @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called
- when the processor exception specified by ExceptionType occurs.
- @param ExceptionType Specifies which processor exception to hook.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
- function was previously registered.
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
- function.
-**/
-EFI_STATUS
-EFIAPI
-RegisterExceptionCallback (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- IN UINTN ProcessorIndex,
- IN EFI_EXCEPTION_CALLBACK ExceptionCallback,
- IN EFI_EXCEPTION_TYPE ExceptionType
- )
-{
- return ManageIvtEntryTable (
- ExceptionType,
- (BUNDLE *) ((EFI_PLABEL *) HookStub)->EntryPoint,
- ExceptionCallback
- );
-}
-
-/**
- Invalidates processor instruction cache for a memory range. Subsequent execution in this range
- causes a fresh memory fetch to retrieve code to be executed.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.
- @param Start Specifies the physical base of the memory range to be invalidated.
- @param Length Specifies the minimum number of bytes in the processor's instruction
- cache to invalidate.
-
- @retval EFI_SUCCESS Always returned.
-
-**/
-EFI_STATUS
-EFIAPI
-InvalidateInstructionCache (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- IN UINTN ProcessorIndex,
- IN VOID *Start,
- IN UINTN Length
- )
-{
- InstructionCacheFlush (Start, Length);
- return EFI_SUCCESS;
-}
diff --git a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/PlDebugSupport.h b/MdeModulePkg/Universal/DebugSupportDxe/Ipf/PlDebugSupport.h deleted file mode 100644 index 1701fbff42..0000000000 --- a/MdeModulePkg/Universal/DebugSupportDxe/Ipf/PlDebugSupport.h +++ /dev/null @@ -1,324 +0,0 @@ -/** @file
- IPF specific types, macros, and definitions for Debug Support Driver.
-
-Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution. The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _PLDEBUG_SUPPORT_H_
-#define _PLDEBUG_SUPPORT_H_
-
-#include <Uefi.h>
-
-#include <Protocol/DebugSupport.h>
-#include <Protocol/LoadedImage.h>
-
-#include <Library/DebugLib.h>
-#include <Library/UefiDriverEntryPoint.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/MemoryAllocationLib.h>
-#include <Library/UefiBootServicesTableLib.h>
-
-#define DISABLE_INTERRUPTS 0UL
-
-#define EFI_ISA IsaIpf
-
-typedef struct {
- UINT64 Low;
- UINT64 High;
-} BUNDLE;
-
-typedef
-VOID
-(*CALLBACK_FUNC) (
- );
-
-/**
- IPF specific DebugSupport driver initialization.
-
- Must be public because it's referenced from DebugSupport.c
-
- @retval EFI_SUCCESS Always.
-
-**/
-EFI_STATUS
-PlInitializeDebugSupportDriver (
- VOID
- );
-
-/**
- Unload handler that is called during UnloadImage() - deallocates pool memory
- used by the driver.
-
- Must be public because it's referenced from DebugSuport.c
-
- @param ImageHandle The firmware allocated handle for the EFI image.
-
- @retval EFI_SUCCESS Always.
-
-**/
-EFI_STATUS
-EFIAPI
-PlUnloadDebugSupportDriver (
- IN EFI_HANDLE ImageHandle
- );
-
-/**
- C callable function to obtain the current value of IVA.
-
- @return Current value of IVA.
-
-**/
-VOID *
-GetIva (
- VOID
- );
-
-/**
- C callable function that HookStub will be copied from it's loaded location into the IVT when
- an IVT entry is hooked.
-
-**/
-VOID
-HookStub (
- VOID
- );
-
-/**
- C callable function to chain an interrupt handler.
-
-**/
-VOID
-ChainHandler (
- VOID
- );
-
-/**
- C callable function to unchain an interrupt handler.
-
-**/
-VOID
-UnchainHandler (
- VOID
- );
-
-/**
- C callable function to enable/disable interrupts.
-
- @param NewInterruptState New Interrupt State.
-
- @return Previous state of psr.ic.
-
-**/
-UINT64
-ProgramInterruptFlags (
- IN UINT64 NewInterruptState
- );
-
-/**
- Flushes instruction cache for specified number of bytes.
-
- @param StartAddress Cache Start Address.
- @param SizeInBytes Cache Size.
-
-**/
-VOID
-InstructionCacheFlush (
- IN VOID *StartAddress,
- IN UINTN SizeInBytes
- );
-
-/**
- Returns the maximum value that may be used for the ProcessorIndex parameter in
- RegisterPeriodicCallback() and RegisterExceptionCallback().
-
- Hard coded to support only 1 processor for now.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported
- processor index is returned. Always 0 returned.
-
- @retval EFI_SUCCESS Always returned with **MaxProcessorIndex set to 0.
-
-**/
-EFI_STATUS
-EFIAPI
-GetMaximumProcessorIndex (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- OUT UINTN *MaxProcessorIndex
- );
-
-/**
- Registers a function to be called back periodically in interrupt context.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param ProcessorIndex Specifies which processor the callback function applies to.
- @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main
- periodic entry point of the debug agent.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
- function was previously registered.
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
- function.
-**/
-EFI_STATUS
-EFIAPI
-RegisterPeriodicCallback (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- IN UINTN ProcessorIndex,
- IN EFI_PERIODIC_CALLBACK PeriodicCallback
- );
-
-/**
- Registers a function to be called when a given processor exception occurs.
-
- This code executes in boot services context.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param ProcessorIndex Specifies which processor the callback function applies to.
- @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called
- when the processor exception specified by ExceptionType occurs.
- @param ExceptionType Specifies which processor exception to hook.
-
- @retval EFI_SUCCESS The function completed successfully.
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
- function was previously registered.
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
- function.
-**/
-EFI_STATUS
-EFIAPI
-RegisterExceptionCallback (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- IN UINTN ProcessorIndex,
- IN EFI_EXCEPTION_CALLBACK ExceptionCallback,
- IN EFI_EXCEPTION_TYPE ExceptionType
- );
-
-/**
- Invalidates processor instruction cache for a memory range. Subsequent execution in this range
- causes a fresh memory fetch to retrieve code to be executed.
-
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
- @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.
- @param Start Specifies the physical base of the memory range to be invalidated.
- @param Length Specifies the minimum number of bytes in the processor's instruction
- cache to invalidate.
-
- @retval EFI_SUCCESS Always returned.
-
-**/
-EFI_STATUS
-EFIAPI
-InvalidateInstructionCache (
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
- IN UINTN ProcessorIndex,
- IN VOID *Start,
- IN UINTN Length
- );
-
-/**
- C routine that is called for all registered exceptions. This is the main
- exception dispatcher.
-
- Must be public because it's referenced from AsmFuncs.s.
-
- @param ExceptionType Specifies which processor exception.
- @param Context System Context.
-**/
-VOID
-CommonHandler (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN EFI_SYSTEM_CONTEXT Context
- );
-
-/**
- This is the worker function that uninstalls and removes all handlers.
-
- @param ExceptionType Specifies which processor exception.
- @param NewBundles New Boundles.
- @param NewCallback A pointer to the new function to be registered.
-
- @retval EFI_ALEADY_STARTED Ivt already hooked.
- @retval EFI_SUCCESS Successfully uninstalled.
-
-**/
-EFI_STATUS
-ManageIvtEntryTable (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN BUNDLE NewBundles[4],
- IN CALLBACK_FUNC NewCallback
- );
-
-/**
- Saves original IVT contents and inserts a few new bundles which are fixed up
- to store the ExceptionType and then call the common handler.
-
- @param ExceptionType Specifies which processor exception.
- @param NewBundles New Boundles.
- @param NewCallback A pointer to the new function to be hooked.
-
-**/
-VOID
-HookEntry (
- IN EFI_EXCEPTION_TYPE ExceptionType,
- IN BUNDLE NewBundles[4],
- IN CALLBACK_FUNC NewCallback
- );
-
-/**
- Restores original IVT contents when unregistering a callback function.
-
- @param ExceptionType Specifies which processor exception.
-
-**/
-VOID
-UnhookEntry (
- IN EFI_EXCEPTION_TYPE ExceptionType
- );
-
-/**
- Sets up cache flush and calls assembly function to chain external interrupt.
-
- Records new callback in IvtEntryTable.
-
- @param NewCallback A pointer to the interrupt handle.
-
-**/
-VOID
-ChainExternalInterrupt (
- IN CALLBACK_FUNC NewCallback
- );
-
-/**
- Sets up cache flush and calls assembly function to restore external interrupt.
- Removes registered callback from IvtEntryTable.
-
-**/
-VOID
-UnchainExternalInterrupt (
- VOID
- );
-
-/**
- Given an integer number, return the physical address of the entry point in the IFT.
-
- @param HandlerIndex Index of the Handler
- @param EntryPoint IFT Entrypoint
-
-**/
-VOID
-GetHandlerEntryPoint (
- UINTN HandlerIndex,
- VOID **EntryPoint
- );
-
-#endif
|