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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-06-23 14:50:53 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-06-28 12:47:13 +0000 |
| commit | 1fb805b1eb5b6039cb12375f8594aba65bf60a44 (patch) | |
| tree | 17d5197ca32cb6c140b30b9783c298cab0c6814d /MdeModulePkg | |
| parent | 157fb7bf29eea497b22025f53b5547e4748b6c2d (diff) | |
| download | edk2-1fb805b1eb5b6039cb12375f8594aba65bf60a44.tar.gz edk2-1fb805b1eb5b6039cb12375f8594aba65bf60a44.tar.bz2 edk2-1fb805b1eb5b6039cb12375f8594aba65bf60a44.zip | |
MdeModulePkg/AtaAtapiPassThru: relax PHY detect timeout
The SATA spec mandates that link detection by the PHY completes within
10 ms after receiving a reset signal. However, there is no obligation
to uphold this requirement at the driver end as strictly as we do, and
as it turns out, some combinations of host and device (e.g., Samsung
850 EVO connected to a LeMaker Cello) are only borderline compliant,
which means the device is not detected reliably.
So let's allow for a bit of margin, and increase the PHY detect timeout
value to 15 ms.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'MdeModulePkg')
| -rw-r--r-- | MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 3 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 3 |
2 files changed, 3 insertions, 3 deletions
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 4d01c1dd7f..b954de8101 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -2376,8 +2376,7 @@ AhciModeInitialization ( AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
//
- // Wait no longer than 10 ms to wait the Phy to detect the presence of a device.
- // It's the requirment from SATA1.0a spec section 5.2.
+ // Wait for the Phy to detect the presence of a device.
//
PhyDetectDelay = EFI_AHCI_BUS_PHY_DETECT_TIMEOUT;
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h index 6401fb2e9f..809bcc307f 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h @@ -41,8 +41,9 @@ typedef union { //
// Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.
+// Add a bit of margin for robustness.
//
-#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 10
+#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15
//
// Refer SATA1.0a spec, the FIS enable time should be less than 500ms.
//
|