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authorrsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524>2012-08-28 06:48:28 +0000
committerrsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524>2012-08-28 06:48:28 +0000
commit3d78c020d22023d35d27b48817d73ff31a361ac7 (patch)
tree9ef792efdbd9d74581b4efdec88934420cc86e31 /MdeModulePkg
parent055c829c4212f12614ad80dcd161a2b4f5cf6713 (diff)
downloadedk2-3d78c020d22023d35d27b48817d73ff31a361ac7.tar.gz
edk2-3d78c020d22023d35d27b48817d73ff31a361ac7.tar.bz2
edk2-3d78c020d22023d35d27b48817d73ff31a361ac7.zip
Fix comparisons of enumerated types which may cause warnings for some compilers.
Signed-off-by: Sun Rui <rui.sun@intel.com> Reviewed-by: Gao Liming <liming.gao@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13686 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg')
-rw-r--r--MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c22
-rw-r--r--MdeModulePkg/Core/Dxe/Event/Timer.c2
-rw-r--r--MdeModulePkg/Core/Dxe/Gcd/Gcd.c8
-rw-r--r--MdeModulePkg/Core/Dxe/Mem/Page.c14
-rw-r--r--MdeModulePkg/Core/Dxe/Mem/Pool.c4
5 files changed, 25 insertions, 25 deletions
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
index 08ecaa4d10..12f6997ac5 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
@@ -1,7 +1,7 @@
/** @file
EFI PCI IO protocol functions implementation for PCI Bus module.
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -85,7 +85,7 @@ PciIoVerifyBarAccess (
IN UINT64 *Offset
)
{
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -146,7 +146,7 @@ PciIoVerifyConfigAccess (
{
UINT64 ExtendOffset;
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -215,7 +215,7 @@ PciIoPollMem (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -322,7 +322,7 @@ PciIoPollIo (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width > EfiPciIoWidthUint64) {
+ if ((UINT32)Width > EfiPciIoWidthUint64) {
return EFI_INVALID_PARAMETER;
}
@@ -421,7 +421,7 @@ PciIoMemRead (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -500,7 +500,7 @@ PciIoMemWrite (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -578,7 +578,7 @@ PciIoIoRead (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -656,7 +656,7 @@ PciIoIoWrite (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -881,7 +881,7 @@ PciIoCopyMem (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -970,7 +970,7 @@ PciIoMap (
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);
- if (Operation < 0 || Operation >= EfiPciIoOperationMaximum) {
+ if ((UINT32)Operation >= EfiPciIoOperationMaximum) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Core/Dxe/Event/Timer.c b/MdeModulePkg/Core/Dxe/Event/Timer.c
index 1b20e327cd..3b17ae917c 100644
--- a/MdeModulePkg/Core/Dxe/Event/Timer.c
+++ b/MdeModulePkg/Core/Dxe/Event/Timer.c
@@ -261,7 +261,7 @@ CoreSetTimer (
return EFI_INVALID_PARAMETER;
}
- if (Type < 0 || Type > TimerRelative || (Event->Type & EVT_TIMER) == 0) {
+ if ((UINT32)Type > TimerRelative || (Event->Type & EVT_TIMER) == 0) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
index 49697ae89c..c351d215dc 100644
--- a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
+++ b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
@@ -3,7 +3,7 @@
The GCD services are used to manage the memory and I/O regions that
are accessible to the CPU that is executing the DXE core.
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -1012,15 +1012,15 @@ CoreAllocateSpace (
//
// Make sure parameters are valid
//
- if (GcdAllocateType < 0 || GcdAllocateType >= EfiGcdMaxAllocateType) {
+ if ((UINT32)GcdAllocateType >= EfiGcdMaxAllocateType) {
DEBUG ((DEBUG_GCD, " Status = %r\n", EFI_INVALID_PARAMETER));
return EFI_INVALID_PARAMETER;
}
- if (GcdMemoryType < 0 || GcdMemoryType >= EfiGcdMemoryTypeMaximum) {
+ if ((UINT32)GcdMemoryType >= EfiGcdMemoryTypeMaximum) {
DEBUG ((DEBUG_GCD, " Status = %r\n", EFI_INVALID_PARAMETER));
return EFI_INVALID_PARAMETER;
}
- if (GcdIoType < 0 || GcdIoType >= EfiGcdIoTypeMaximum) {
+ if ((UINT32)GcdIoType >= EfiGcdIoTypeMaximum) {
DEBUG ((DEBUG_GCD, " Status = %r\n", EFI_INVALID_PARAMETER));
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Core/Dxe/Mem/Page.c b/MdeModulePkg/Core/Dxe/Mem/Page.c
index b4a62b9f0c..6d5a259eb6 100644
--- a/MdeModulePkg/Core/Dxe/Mem/Page.c
+++ b/MdeModulePkg/Core/Dxe/Mem/Page.c
@@ -557,7 +557,7 @@ CoreAddMemoryDescriptor (
// Make sure the memory type in the gMemoryTypeInformation[] array is valid
//
Type = (EFI_MEMORY_TYPE) (gMemoryTypeInformation[Index].Type);
- if (Type < 0 || Type > EfiMaxMemoryType) {
+ if ((UINT32)Type > EfiMaxMemoryType) {
continue;
}
if (gMemoryTypeInformation[Index].NumberOfPages != 0) {
@@ -581,7 +581,7 @@ CoreAddMemoryDescriptor (
// Make sure the memory type in the gMemoryTypeInformation[] array is valid
//
Type = (EFI_MEMORY_TYPE) (gMemoryTypeInformation[FreeIndex].Type);
- if (Type < 0 || Type > EfiMaxMemoryType) {
+ if ((UINT32)Type > EfiMaxMemoryType) {
continue;
}
@@ -624,7 +624,7 @@ CoreAddMemoryDescriptor (
// Make sure the memory type in the gMemoryTypeInformation[] array is valid
//
Type = (EFI_MEMORY_TYPE) (gMemoryTypeInformation[Index].Type);
- if (Type < 0 || Type > EfiMaxMemoryType) {
+ if ((UINT32)Type > EfiMaxMemoryType) {
continue;
}
if (gMemoryTypeInformation[Index].NumberOfPages != 0) {
@@ -747,7 +747,7 @@ CoreConvertPages (
//
// Update counters for the number of pages allocated to each memory type
//
- if (Entry->Type >= 0 && Entry->Type < EfiMaxMemoryType) {
+ if ((UINT32)Entry->Type < EfiMaxMemoryType) {
if ((Start >= mMemoryTypeStatistics[Entry->Type].BaseAddress && Start <= mMemoryTypeStatistics[Entry->Type].MaximumAddress) ||
(Start >= mDefaultBaseAddress && Start <= mDefaultMaximumAddress) ) {
if (NumberOfPages > mMemoryTypeStatistics[Entry->Type].CurrentNumberOfPages) {
@@ -758,7 +758,7 @@ CoreConvertPages (
}
}
- if (NewType >= 0 && NewType < EfiMaxMemoryType) {
+ if ((UINT32)NewType < EfiMaxMemoryType) {
if ((Start >= mMemoryTypeStatistics[NewType].BaseAddress && Start <= mMemoryTypeStatistics[NewType].MaximumAddress) ||
(Start >= mDefaultBaseAddress && Start <= mDefaultMaximumAddress) ) {
mMemoryTypeStatistics[NewType].CurrentNumberOfPages += NumberOfPages;
@@ -1011,7 +1011,7 @@ FindFreePages (
//
// Attempt to find free pages in the preferred bin based on the requested memory type
//
- if (NewType >= 0 && NewType < EfiMaxMemoryType && MaxAddress >= mMemoryTypeStatistics[NewType].MaximumAddress) {
+ if ((UINT32)NewType < EfiMaxMemoryType && MaxAddress >= mMemoryTypeStatistics[NewType].MaximumAddress) {
Start = CoreFindFreePagesI (
mMemoryTypeStatistics[NewType].MaximumAddress,
mMemoryTypeStatistics[NewType].BaseAddress,
@@ -1094,7 +1094,7 @@ CoreAllocatePages (
UINT64 MaxAddress;
UINTN Alignment;
- if (Type < AllocateAnyPages || Type >= (UINTN) MaxAllocateType) {
+ if ((UINT32)Type >= MaxAllocateType) {
return EFI_INVALID_PARAMETER;
}
diff --git a/MdeModulePkg/Core/Dxe/Mem/Pool.c b/MdeModulePkg/Core/Dxe/Mem/Pool.c
index cdf3f8f095..e0f0869e53 100644
--- a/MdeModulePkg/Core/Dxe/Mem/Pool.c
+++ b/MdeModulePkg/Core/Dxe/Mem/Pool.c
@@ -120,7 +120,7 @@ LookupPoolHead (
POOL *Pool;
UINTN Index;
- if (MemoryType >= 0 && MemoryType < EfiMaxMemoryType) {
+ if ((UINT32)MemoryType < EfiMaxMemoryType) {
return &mPoolHead[MemoryType];
}
@@ -550,7 +550,7 @@ CoreFreePoolI (
// portion of that memory type has been freed. If it has, then free the
// list entry for that memory type
//
- if (Pool->MemoryType < 0 && Pool->Used == 0) {
+ if ((INT32)Pool->MemoryType < 0 && Pool->Used == 0) {
RemoveEntryList (&Pool->Link);
CoreFreePoolI (Pool);
}