diff options
author | Feng Tian <feng.tian@intel.com> | 2013-06-18 03:36:11 +0000 |
---|---|---|
committer | erictian <erictian@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-06-18 03:36:11 +0000 |
commit | 8e1f06124c1631da5619def8c09ca4d7236f75b5 (patch) | |
tree | 160b6f3b0dc0ee60f70bec984b57e73d5ede253e /MdeModulePkg | |
parent | 027f4cd5c621fe69d14871b841cddf0cbd45106b (diff) | |
download | edk2-8e1f06124c1631da5619def8c09ca4d7236f75b5.tar.gz edk2-8e1f06124c1631da5619def8c09ca4d7236f75b5.tar.bz2 edk2-8e1f06124c1631da5619def8c09ca4d7236f75b5.zip |
MdeModulePkg/AtaBus: wait up to 30s for ATA cmd response in Standby/Idle mode to follow ATA spec
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14428 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg')
-rw-r--r-- | MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c index 2c79f46ed9..b1bedd80e8 100644 --- a/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c +++ b/MdeModulePkg/Bus/Ata/AtaBusDxe/AtaPassThruExecute.c @@ -10,7 +10,7 @@ for Security Protocol Specific layout. This implementation uses big endian for
Cylinder register.
- Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -541,19 +541,21 @@ TransferAtaDevice ( //
// As AtaBus is used to manage ATA devices, we have to use the lowest transfer rate to
// calculate the possible maximum timeout value for each read/write operation.
+ // The timout value is rounded up to nearest integar and here an additional 30s is added
+ // to follow ATA spec in which it mentioned that the device may take up to 30s to respond
+ // commands in the Standby/Idle mode.
//
if (AtaDevice->UdmaValid) {
//
// Calculate the maximum timeout value for DMA read/write operation.
//
- Packet->Timeout = EFI_TIMER_PERIOD_SECONDS ((TransferLength * AtaDevice->BlockMedia.BlockSize) / 2100000 + 1);
+ Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 2100000) + 31);
} else {
//
// Calculate the maximum timeout value for PIO read/write operation
//
- Packet->Timeout = EFI_TIMER_PERIOD_SECONDS ((TransferLength * AtaDevice->BlockMedia.BlockSize) / 3300000 + 1);
+ Packet->Timeout = EFI_TIMER_PERIOD_SECONDS (DivU64x32 (MultU64x32 (TransferLength, AtaDevice->BlockMedia.BlockSize), 3300000) + 31);
}
-
return AtaDevicePassThru (AtaDevice, TaskPacket, Event);
}
|