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authorxli24 <xli24@6f19259b-4bc3-4df7-8a09-765794883524>2009-05-14 03:13:31 +0000
committerxli24 <xli24@6f19259b-4bc3-4df7-8a09-765794883524>2009-05-14 03:13:31 +0000
commit59ceeabe504f4c7814f9560c411690a1ffdc31b2 (patch)
tree07838aa3ccbe32341dffa18d8b2f5ecc50ecbda0 /MdePkg/Include/Library/PciSegmentLib.h
parentc40a1556902e65bf4e998fad0c9a34684e84da10 (diff)
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1. Add address check for "RegisterForRuntime" APIs of PciLib, PciCf8Lib, PciExpressLib, and PciSegmentLib.
2. Update ASSERT condition for PciCf8Lib, and PciSegmentLib class. 3. According to MDE Lib Spec, add check for reserved bit field 63..48 for PCI segment address. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8311 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Include/Library/PciSegmentLib.h')
-rw-r--r--MdePkg/Include/Library/PciSegmentLib.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/MdePkg/Include/Library/PciSegmentLib.h b/MdePkg/Include/Library/PciSegmentLib.h
index 9eaab0c2e7..ef1e3ac451 100644
--- a/MdePkg/Include/Library/PciSegmentLib.h
+++ b/MdePkg/Include/Library/PciSegmentLib.h
@@ -23,7 +23,7 @@
access method. Modules will typically use the PCI Segment Library for its PCI configuration
accesses when PCI Segments other than Segment #0 must be accessed.
-Copyright (c) 2006 - 2008, Intel Corporation
+Copyright (c) 2006 - 2009, Intel Corporation
All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -67,7 +67,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
Register a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
- If Address > 0x0FFFFFFF, then ASSERT().
+ If any reserved bits in Address are set, then ASSERT().
@param Address Address that encodes the PCI Bus, Device, Function and
Register.
@@ -112,7 +112,7 @@ PciSegmentRead8 (
Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
Value is returned. This function must guarantee that all PCI read and write operations are serialized.
- If Address > 0x0FFFFFFF, then ASSERT().
+ If any reserved bits in Address are set, then ASSERT().
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
@param Value The value to write.
@@ -969,7 +969,7 @@ PciSegmentBitFieldAndThenOr32 (
and 16-bit PCI configuration read cycles may be used at the beginning and the
end of the range.
- If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If any reserved bits in StartAddress are set, then ASSERT().
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
If Size > 0 and Buffer is NULL, then ASSERT().
@@ -1001,7 +1001,7 @@ PciSegmentReadBuffer (
8-bit and 16-bit PCI configuration write cycles may be used at the beginning
and the end of the range.
- If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If any reserved bits in StartAddress are set, then ASSERT().
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
If Size > 0 and Buffer is NULL, then ASSERT().