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| author | Brijesh Singh <brijesh.singh@amd.com> | 2021-05-19 13:19:37 -0500 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-05-29 12:15:21 +0000 |
| commit | 0095070e70f129cb357cb95648ea993a909ae18d (patch) | |
| tree | 12d6b0531d699f20b8f62cc26c28c6182f584e25 /MdePkg/Include | |
| parent | dbc22a178546edb6373a4a1f331b0f16f04e2e3d (diff) | |
| download | edk2-0095070e70f129cb357cb95648ea993a909ae18d.tar.gz edk2-0095070e70f129cb357cb95648ea993a909ae18d.tar.bz2 edk2-0095070e70f129cb357cb95648ea993a909ae18d.zip | |
MdePkg/Register/Amd: expand the SEV MSR to include the SNP definition
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275
Define the SEV-SNP MSR bits.
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-2-brijesh.singh@amd.com>
Diffstat (limited to 'MdePkg/Include')
| -rw-r--r-- | MdePkg/Include/Register/Amd/Fam17Msr.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h index e4db09c518..716d52fd50 100644 --- a/MdePkg/Include/Register/Amd/Fam17Msr.h +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h @@ -87,7 +87,12 @@ typedef union { ///
UINT32 SevEsBit:1;
- UINT32 Reserved:30;
+ ///
+ /// [Bit 2] Secure Nested Paging (SevSnp) is enabled
+ ///
+ UINT32 SevSnpBit:1;
+
+ UINT32 Reserved2:29;
} Bits;
///
/// All bit fields as a 32-bit value
|