Update MDE Library instances according to code review comments.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5823 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 25 insertions, 29 deletions

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
index d9605566fd..0e70f2d156 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
@@ -1,7 +1,7 @@
 /** @file

   Cache Maintenance Functions.

 

-  Copyright (c) 2006, Intel Corporation<BR>

+  Copyright (c) 2006 - 2008, Intel Corporation<BR>

   All rights reserved. This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -12,9 +12,6 @@
 

 **/

 

-//

-// Include common header file for this module.

-//

 #include <Base.h>

 #include <Library/DebugLib.h>

 

@@ -22,9 +19,6 @@
   Invalidates the entire instruction cache in cache coherency domain of the

   calling CPU.

 

-  Invalidates the entire instruction cache in cache coherency domain of the

-  calling CPU.

-

 **/

 VOID

 EFIAPI

@@ -165,7 +159,7 @@ WriteBackDataCache (
                   mode, then Address is a virtual address.

   @param  Length  The number of bytes to write back from the data cache.

 

-  @return Address of cache wrote in main memory.

+  @return Address of cache written in main memory.

 

 **/

 VOID *

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
index a46df59497..fc6ea25d52 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
@@ -1,7 +1,7 @@
 /** @file

   Cache Maintenance Functions.

 

-  Copyright (c) 2006, Intel Corporation<BR>

+  Copyright (c) 2006 - 2008, Intel Corporation<BR>

   All rights reserved. This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -12,10 +12,6 @@
 

 **/

 

-

-//

-// Include common header file for this module.

-//

 #include <Base.h>

 #include <Library/CacheMaintenanceLib.h>

 #include <Library/BaseLib.h>

@@ -26,9 +22,6 @@
   Invalidates the entire instruction cache in cache coherency domain of the

   calling CPU.

 

-  Invalidates the entire instruction cache in cache coherency domain of the

-  calling CPU.

-

 **/

 VOID

 EFIAPI

@@ -36,7 +29,7 @@ InvalidateInstructionCache (
   VOID

   )

 {

-  PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_INSTRUCTION_ALL, PAL_CACHE_FLUSH_INVALIDATE_LINES, 0);

+  PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_INSTRUCTION_ALL, PAL_CACHE_FLUSH_INVALIDATE_LINES | PAL_CACHE_FLUSH_NO_INTERRUPT, 0);

 }

 

 /**

@@ -61,7 +54,7 @@ InvalidateInstructionCache (
 

   @param  Length  The number of bytes to invalidate from the instruction cache.

 

-  @return Address of cahce invalidation.

+  @return Address of cache invalidation.

 

 **/

 VOID *

@@ -71,6 +64,7 @@ InvalidateInstructionCacheRange (
   IN      UINTN                     Length

   )

 {

+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);

   return IpfFlushCacheRange (Address, Length);

 }

 

@@ -90,7 +84,7 @@ WriteBackInvalidateDataCache (
   VOID

   )

 {

-  PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_DATA_ALL, PAL_CACHE_FLUSH_INVALIDATE_LINES, 0);

+  PalCall (PAL_CACHE_FLUSH, PAL_CACHE_FLUSH_DATA_ALL, PAL_CACHE_FLUSH_INVALIDATE_LINES | PAL_CACHE_FLUSH_NO_INTERRUPT, 0);

 }

 

 /**

@@ -172,7 +166,7 @@ WriteBackDataCache (
                   mode, then Address is a virtual address.

   @param  Length  The number of bytes to write back from the data cache.

 

-  @return Address of cache wrote in main memory.

+  @return Address of cache written in main memory.

 

 **/

 VOID *

@@ -204,6 +198,10 @@ InvalidateDataCache (
   VOID

   )

 {

+  //

+  // Invalidation of entire data cache without writing back is not supported on

+  // IPF architecture, so write back and invalidate operation is performed.

+  //

   WriteBackInvalidateDataCache ();

 }

 

@@ -241,5 +239,10 @@ InvalidateDataCacheRange (
   IN      UINTN                     Length

   )

 {

+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);

+  //

+  // Invalidation of a data cache range without writing back is not supported on

+  // IPF architecture, so write back and invalidate operation is performed.

+  //

   return IpfFlushCacheRange (Address, Length);

 }

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c
index 1fc2b95daa..8b169c2244 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c
@@ -1,7 +1,7 @@
 /** @file

   Cache Maintenance Functions.

 

-  Copyright (c) 2006, Intel Corporation<BR>

+  Copyright (c) 2006 - 2008, Intel Corporation<BR>

   All rights reserved. This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -13,9 +13,6 @@
 

 **/

 

-//

-// Include common header file for this module.

-//

 #include <Base.h>

 #include <Library/BaseLib.h>

 #include <Library/DebugLib.h>

@@ -30,9 +27,6 @@
   Invalidates the entire instruction cache in cache coherency domain of the

   calling CPU.

 

-  Invalidates the entire instruction cache in cache coherency domain of the

-  calling CPU.

-

 **/

 VOID

 EFIAPI

@@ -130,7 +124,8 @@ WriteBackInvalidateDataCacheRange (
   IN      UINTN                     Length

   )

 {

-  UINTN                             Start, End;

+  UINTN                             Start;

+  UINTN                             End;

 

   ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);

 

@@ -192,7 +187,7 @@ WriteBackDataCache (
                   mode, then Address is a virtual address.

   @param  Length  The number of bytes to write back from the data cache.

 

-  @return Address of cache wrote in main memory.

+  @return Address of cache written in main memory.

 

 **/

 VOID *

@@ -259,5 +254,9 @@ InvalidateDataCacheRange (
   IN      UINTN                     Length

   )

 {

+  //

+  // Invalidation of a data cache range without writing back is not supported on

+  // x86 architecture, so write back and invalidate operation is performed.

+  //

   return WriteBackInvalidateDataCacheRange (Address, Length);

 }