diff options
author | Liming Gao <liming.gao@intel.com> | 2018-06-27 21:11:33 +0800 |
---|---|---|
committer | Liming Gao <liming.gao@intel.com> | 2018-06-28 11:19:47 +0800 |
commit | 9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107 (patch) | |
tree | 15a2cb1a7907a9114ee79130699ce7d324c942ea /MdePkg/Library/BasePciCf8Lib | |
parent | d1102dba7210b95e41d06c2338a22ba6af248645 (diff) | |
download | edk2-9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107.tar.gz edk2-9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107.tar.bz2 edk2-9095d37b8fe5bfc3d02adad6ba7fd7359ebc0107.zip |
MdePkg: Clean up source files
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdePkg/Library/BasePciCf8Lib')
-rw-r--r-- | MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf | 4 | ||||
-rw-r--r-- | MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c | 74 |
2 files changed, 39 insertions, 39 deletions
diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf index 17b81e076a..049159c16a 100644 --- a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf +++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf @@ -4,7 +4,7 @@ # PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
# Layers on top of an I/O Library instance.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -23,7 +23,7 @@ FILE_GUID = 472ab06d-9810-4c00-bb7f-dad1828fc1ab
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = PciCf8Lib
+ LIBRARY_CLASS = PciCf8Lib
#
# VALID_ARCHITECTURES = IA32 X64 IPF EBC
diff --git a/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c b/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c index 828508b2eb..9d8affc749 100644 --- a/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c +++ b/MdePkg/Library/BasePciCf8Lib/PciCf8Lib.c @@ -2,7 +2,7 @@ PCI CF8 Library functions that use I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.
Layers on top of an I/O Library instance.
- Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -61,20 +61,20 @@ ASSERT (((A) & (~0xffff0ff | (M))) == 0)
/**
- Registers a PCI device so PCI configuration registers may be accessed after
+ Registers a PCI device so PCI configuration registers may be accessed after
SetVirtualAddressMap().
-
- Registers the PCI device specified by Address so all the PCI configuration registers
+
+ Registers the PCI device specified by Address so all the PCI configuration registers
associated with that PCI device may be accessed after SetVirtualAddressMap() is called.
-
+
If Address > 0x0FFFFFFF, then ASSERT().
If the register specified by Address >= 0x100, then ASSERT().
@param Address The address that encodes the PCI Bus, Device, Function and
Register.
-
+
@retval RETURN_SUCCESS The PCI device was registered for runtime access.
- @retval RETURN_UNSUPPORTED An attempt was made to call this function
+ @retval RETURN_UNSUPPORTED An attempt was made to call this function
after ExitBootServices().
@retval RETURN_UNSUPPORTED The resources required to access the PCI device
at runtime could not be mapped.
@@ -117,7 +117,7 @@ PciCf8Read8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -155,7 +155,7 @@ PciCf8Write8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -200,7 +200,7 @@ PciCf8Or8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -245,7 +245,7 @@ PciCf8And8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -293,7 +293,7 @@ PciCf8AndThenOr8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -341,7 +341,7 @@ PciCf8BitFieldRead8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -393,7 +393,7 @@ PciCf8BitFieldWrite8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -449,7 +449,7 @@ PciCf8BitFieldOr8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -505,7 +505,7 @@ PciCf8BitFieldAnd8 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -566,7 +566,7 @@ PciCf8BitFieldAndThenOr8( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT8 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -609,7 +609,7 @@ PciCf8Read16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -648,7 +648,7 @@ PciCf8Write16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -694,7 +694,7 @@ PciCf8Or16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -740,7 +740,7 @@ PciCf8And16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -789,7 +789,7 @@ PciCf8AndThenOr16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -838,7 +838,7 @@ PciCf8BitFieldRead16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -891,7 +891,7 @@ PciCf8BitFieldWrite16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -948,7 +948,7 @@ PciCf8BitFieldOr16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1005,7 +1005,7 @@ PciCf8BitFieldAnd16 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1067,7 +1067,7 @@ PciCf8BitFieldAndThenOr16( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT16 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 1);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1110,7 +1110,7 @@ PciCf8Read32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1149,7 +1149,7 @@ PciCf8Write32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1195,7 +1195,7 @@ PciCf8Or32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1241,7 +1241,7 @@ PciCf8And32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1290,7 +1290,7 @@ PciCf8AndThenOr32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1339,7 +1339,7 @@ PciCf8BitFieldRead32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1392,7 +1392,7 @@ PciCf8BitFieldWrite32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1449,7 +1449,7 @@ PciCf8BitFieldOr32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1506,7 +1506,7 @@ PciCf8BitFieldAnd32 ( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
@@ -1568,7 +1568,7 @@ PciCf8BitFieldAndThenOr32( BOOLEAN InterruptState;
UINT32 AddressPort;
UINT32 Result;
-
+
ASSERT_INVALID_PCI_ADDRESS (Address, 3);
InterruptState = SaveAndDisableInterrupts ();
AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
|