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authorMichael Kubacki <michael.kubacki@microsoft.com>2021-12-05 14:54:05 -0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2021-12-07 17:24:28 +0000
commit2f88bd3a1296c522317f1c21377876de63de5be7 (patch)
treeba47875489cc5698061275a495983e9dea3be098 /MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo
parent1436aea4d5707e672672a11bda72be2c63c936c3 (diff)
downloadedk2-2f88bd3a1296c522317f1c21377876de63de5be7.tar.gz
edk2-2f88bd3a1296c522317f1c21377876de63de5be7.tar.bz2
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MdePkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Diffstat (limited to 'MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo')
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c307
-rw-r--r--MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h3
2 files changed, 156 insertions, 154 deletions
diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
index 65f2fa3071..c7988367cf 100644
--- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
+++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c
@@ -11,8 +11,8 @@
//
// Global variable to record data of PCI Root Bridge I/O Protocol instances
//
-PCI_ROOT_BRIDGE_DATA *mPciRootBridgeData = NULL;
-UINTN mNumberOfPciRootBridges = 0;
+PCI_ROOT_BRIDGE_DATA *mPciRootBridgeData = NULL;
+UINTN mNumberOfPciRootBridges = 0;
/**
The constructor function caches data of PCI Root Bridge I/O Protocol instances.
@@ -30,16 +30,16 @@ UINTN mNumberOfPciRootBridges = 0;
EFI_STATUS
EFIAPI
PciSegmentLibConstructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINTN HandleCount;
- EFI_HANDLE *HandleBuffer;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
+ EFI_STATUS Status;
+ UINTN Index;
+ UINTN HandleCount;
+ EFI_HANDLE *HandleBuffer;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
HandleCount = 0;
HandleBuffer = NULL;
@@ -68,14 +68,14 @@ PciSegmentLibConstructor (
Status = gBS->HandleProtocol (
HandleBuffer[Index],
&gEfiPciRootBridgeIoProtocolGuid,
- (VOID **) &PciRootBridgeIo
+ (VOID **)&PciRootBridgeIo
);
ASSERT_EFI_ERROR (Status);
mPciRootBridgeData[Index].PciRootBridgeIo = PciRootBridgeIo;
mPciRootBridgeData[Index].SegmentNumber = PciRootBridgeIo->SegmentNumber;
- Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **) &Descriptors);
+ Status = PciRootBridgeIo->Configuration (PciRootBridgeIo, (VOID **)&Descriptors);
ASSERT_EFI_ERROR (Status);
while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) {
@@ -84,12 +84,14 @@ PciSegmentLibConstructor (
mPciRootBridgeData[Index].MaxBusNumber = Descriptors->AddrRangeMax;
break;
}
+
Descriptors++;
}
+
ASSERT (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR);
}
- FreePool(HandleBuffer);
+ FreePool (HandleBuffer);
return EFI_SUCCESS;
}
@@ -109,8 +111,8 @@ PciSegmentLibConstructor (
EFI_STATUS
EFIAPI
PciSegmentLibDestructor (
- IN EFI_HANDLE ImageHandle,
- IN EFI_SYSTEM_TABLE *SystemTable
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
)
{
FreePool (mPciRootBridgeData);
@@ -132,12 +134,12 @@ PciSegmentLibDestructor (
**/
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *
PciSegmentLibSearchForRootBridge (
- IN UINT64 Address
+ IN UINT64 Address
)
{
- UINTN Index;
- UINT64 SegmentNumber;
- UINT64 BusNumber;
+ UINTN Index;
+ UINT64 SegmentNumber;
+ UINT64 BusNumber;
for (Index = 0; Index < mNumberOfPciRootBridges; Index++) {
//
@@ -149,11 +151,12 @@ PciSegmentLibSearchForRootBridge (
// Matches the bus number of address with bus number range of protocol instance.
//
BusNumber = BitFieldRead64 (Address, 20, 27);
- if (BusNumber >= mPciRootBridgeData[Index].MinBusNumber && BusNumber <= mPciRootBridgeData[Index].MaxBusNumber) {
+ if ((BusNumber >= mPciRootBridgeData[Index].MinBusNumber) && (BusNumber <= mPciRootBridgeData[Index].MaxBusNumber)) {
return mPciRootBridgeData[Index].PciRootBridgeIo;
}
}
}
+
return NULL;
}
@@ -177,8 +180,8 @@ DxePciSegmentLibPciRootBridgeIoReadWorker (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
)
{
- UINT32 Data;
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ UINT32 Data;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
ASSERT (PciRootBridgeIo != NULL);
@@ -217,7 +220,7 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker (
IN UINT32 Data
)
{
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
PciRootBridgeIo = PciSegmentLibSearchForRootBridge (Address);
ASSERT (PciRootBridgeIo != NULL);
@@ -277,12 +280,12 @@ PciSegmentRegisterForRuntimeAccess (
UINT8
EFIAPI
PciSegmentRead8 (
- IN UINT64 Address
+ IN UINT64 Address
)
{
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
- return (UINT8) DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);
+ return (UINT8)DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint8);
}
/**
@@ -302,13 +305,13 @@ PciSegmentRead8 (
UINT8
EFIAPI
PciSegmentWrite8 (
- IN UINT64 Address,
- IN UINT8 Value
+ IN UINT64 Address,
+ IN UINT8 Value
)
{
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 0);
- return (UINT8) DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);
+ return (UINT8)DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint8, Value);
}
/**
@@ -331,11 +334,11 @@ PciSegmentWrite8 (
UINT8
EFIAPI
PciSegmentOr8 (
- IN UINT64 Address,
- IN UINT8 OrData
+ IN UINT64 Address,
+ IN UINT8 OrData
)
{
- return PciSegmentWrite8 (Address, (UINT8) (PciSegmentRead8 (Address) | OrData));
+ return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) | OrData));
}
/**
@@ -357,11 +360,11 @@ PciSegmentOr8 (
UINT8
EFIAPI
PciSegmentAnd8 (
- IN UINT64 Address,
- IN UINT8 AndData
+ IN UINT64 Address,
+ IN UINT8 AndData
)
{
- return PciSegmentWrite8 (Address, (UINT8) (PciSegmentRead8 (Address) & AndData));
+ return PciSegmentWrite8 (Address, (UINT8)(PciSegmentRead8 (Address) & AndData));
}
/**
@@ -387,12 +390,12 @@ PciSegmentAnd8 (
UINT8
EFIAPI
PciSegmentAndThenOr8 (
- IN UINT64 Address,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINT64 Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
)
{
- return PciSegmentWrite8 (Address, (UINT8) ((PciSegmentRead8 (Address) & AndData) | OrData));
+ return PciSegmentWrite8 (Address, (UINT8)((PciSegmentRead8 (Address) & AndData) | OrData));
}
/**
@@ -419,9 +422,9 @@ PciSegmentAndThenOr8 (
UINT8
EFIAPI
PciSegmentBitFieldRead8 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
)
{
return BitFieldRead8 (PciSegmentRead8 (Address), StartBit, EndBit);
@@ -454,10 +457,10 @@ PciSegmentBitFieldRead8 (
UINT8
EFIAPI
PciSegmentBitFieldWrite8 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 Value
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
)
{
return PciSegmentWrite8 (
@@ -496,10 +499,10 @@ PciSegmentBitFieldWrite8 (
UINT8
EFIAPI
PciSegmentBitFieldOr8 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 OrData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
)
{
return PciSegmentWrite8 (
@@ -538,10 +541,10 @@ PciSegmentBitFieldOr8 (
UINT8
EFIAPI
PciSegmentBitFieldAnd8 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
)
{
return PciSegmentWrite8 (
@@ -583,11 +586,11 @@ PciSegmentBitFieldAnd8 (
UINT8
EFIAPI
PciSegmentBitFieldAndThenOr8 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData,
- IN UINT8 OrData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
)
{
return PciSegmentWrite8 (
@@ -613,12 +616,12 @@ PciSegmentBitFieldAndThenOr8 (
UINT16
EFIAPI
PciSegmentRead16 (
- IN UINT64 Address
+ IN UINT64 Address
)
{
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1);
- return (UINT16) DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);
+ return (UINT16)DxePciSegmentLibPciRootBridgeIoReadWorker (Address, EfiPciWidthUint16);
}
/**
@@ -639,13 +642,13 @@ PciSegmentRead16 (
UINT16
EFIAPI
PciSegmentWrite16 (
- IN UINT64 Address,
- IN UINT16 Value
+ IN UINT64 Address,
+ IN UINT16 Value
)
{
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 1);
- return (UINT16) DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);
+ return (UINT16)DxePciSegmentLibPciRootBridgeIoWriteWorker (Address, EfiPciWidthUint16, Value);
}
/**
@@ -671,11 +674,11 @@ PciSegmentWrite16 (
UINT16
EFIAPI
PciSegmentOr16 (
- IN UINT64 Address,
- IN UINT16 OrData
+ IN UINT64 Address,
+ IN UINT16 OrData
)
{
- return PciSegmentWrite16 (Address, (UINT16) (PciSegmentRead16 (Address) | OrData));
+ return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) | OrData));
}
/**
@@ -699,11 +702,11 @@ PciSegmentOr16 (
UINT16
EFIAPI
PciSegmentAnd16 (
- IN UINT64 Address,
- IN UINT16 AndData
+ IN UINT64 Address,
+ IN UINT16 AndData
)
{
- return PciSegmentWrite16 (Address, (UINT16) (PciSegmentRead16 (Address) & AndData));
+ return PciSegmentWrite16 (Address, (UINT16)(PciSegmentRead16 (Address) & AndData));
}
/**
@@ -730,12 +733,12 @@ PciSegmentAnd16 (
UINT16
EFIAPI
PciSegmentAndThenOr16 (
- IN UINT64 Address,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINT64 Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
)
{
- return PciSegmentWrite16 (Address, (UINT16) ((PciSegmentRead16 (Address) & AndData) | OrData));
+ return PciSegmentWrite16 (Address, (UINT16)((PciSegmentRead16 (Address) & AndData) | OrData));
}
/**
@@ -763,9 +766,9 @@ PciSegmentAndThenOr16 (
UINT16
EFIAPI
PciSegmentBitFieldRead16 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
)
{
return BitFieldRead16 (PciSegmentRead16 (Address), StartBit, EndBit);
@@ -799,10 +802,10 @@ PciSegmentBitFieldRead16 (
UINT16
EFIAPI
PciSegmentBitFieldWrite16 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 Value
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
)
{
return PciSegmentWrite16 (
@@ -842,10 +845,10 @@ PciSegmentBitFieldWrite16 (
UINT16
EFIAPI
PciSegmentBitFieldOr16 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 OrData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
)
{
return PciSegmentWrite16 (
@@ -885,10 +888,10 @@ PciSegmentBitFieldOr16 (
UINT16
EFIAPI
PciSegmentBitFieldAnd16 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
)
{
return PciSegmentWrite16 (
@@ -931,11 +934,11 @@ PciSegmentBitFieldAnd16 (
UINT16
EFIAPI
PciSegmentBitFieldAndThenOr16 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData,
- IN UINT16 OrData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
)
{
return PciSegmentWrite16 (
@@ -961,7 +964,7 @@ PciSegmentBitFieldAndThenOr16 (
UINT32
EFIAPI
PciSegmentRead32 (
- IN UINT64 Address
+ IN UINT64 Address
)
{
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3);
@@ -987,8 +990,8 @@ PciSegmentRead32 (
UINT32
EFIAPI
PciSegmentWrite32 (
- IN UINT64 Address,
- IN UINT32 Value
+ IN UINT64 Address,
+ IN UINT32 Value
)
{
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (Address, 3);
@@ -1017,8 +1020,8 @@ PciSegmentWrite32 (
UINT32
EFIAPI
PciSegmentOr32 (
- IN UINT64 Address,
- IN UINT32 OrData
+ IN UINT64 Address,
+ IN UINT32 OrData
)
{
return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) | OrData);
@@ -1045,8 +1048,8 @@ PciSegmentOr32 (
UINT32
EFIAPI
PciSegmentAnd32 (
- IN UINT64 Address,
- IN UINT32 AndData
+ IN UINT64 Address,
+ IN UINT32 AndData
)
{
return PciSegmentWrite32 (Address, PciSegmentRead32 (Address) & AndData);
@@ -1076,9 +1079,9 @@ PciSegmentAnd32 (
UINT32
EFIAPI
PciSegmentAndThenOr32 (
- IN UINT64 Address,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINT64 Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
)
{
return PciSegmentWrite32 (Address, (PciSegmentRead32 (Address) & AndData) | OrData);
@@ -1109,9 +1112,9 @@ PciSegmentAndThenOr32 (
UINT32
EFIAPI
PciSegmentBitFieldRead32 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
)
{
return BitFieldRead32 (PciSegmentRead32 (Address), StartBit, EndBit);
@@ -1145,10 +1148,10 @@ PciSegmentBitFieldRead32 (
UINT32
EFIAPI
PciSegmentBitFieldWrite32 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
)
{
return PciSegmentWrite32 (
@@ -1187,10 +1190,10 @@ PciSegmentBitFieldWrite32 (
UINT32
EFIAPI
PciSegmentBitFieldOr32 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
)
{
return PciSegmentWrite32 (
@@ -1229,10 +1232,10 @@ PciSegmentBitFieldOr32 (
UINT32
EFIAPI
PciSegmentBitFieldAnd32 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
)
{
return PciSegmentWrite32 (
@@ -1275,11 +1278,11 @@ PciSegmentBitFieldAnd32 (
UINT32
EFIAPI
PciSegmentBitFieldAndThenOr32 (
- IN UINT64 Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
)
{
return PciSegmentWrite32 (
@@ -1314,12 +1317,12 @@ PciSegmentBitFieldAndThenOr32 (
UINTN
EFIAPI
PciSegmentReadBuffer (
- IN UINT64 StartAddress,
- IN UINTN Size,
- OUT VOID *Buffer
+ IN UINT64 StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
)
{
- UINTN ReturnValue;
+ UINTN ReturnValue;
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
@@ -1340,19 +1343,19 @@ PciSegmentReadBuffer (
// Read a byte if StartAddress is byte aligned
//
*(volatile UINT8 *)Buffer = PciSegmentRead8 (StartAddress);
- StartAddress += sizeof (UINT8);
- Size -= sizeof (UINT8);
- Buffer = (UINT8*)Buffer + 1;
+ StartAddress += sizeof (UINT8);
+ Size -= sizeof (UINT8);
+ Buffer = (UINT8 *)Buffer + 1;
}
- if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {
+ if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
//
// Read a word if StartAddress is word aligned
//
WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
StartAddress += sizeof (UINT16);
- Size -= sizeof (UINT16);
- Buffer = (UINT16*)Buffer + 1;
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16 *)Buffer + 1;
}
while (Size >= sizeof (UINT32)) {
@@ -1361,8 +1364,8 @@ PciSegmentReadBuffer (
//
WriteUnaligned32 (Buffer, PciSegmentRead32 (StartAddress));
StartAddress += sizeof (UINT32);
- Size -= sizeof (UINT32);
- Buffer = (UINT32*)Buffer + 1;
+ Size -= sizeof (UINT32);
+ Buffer = (UINT32 *)Buffer + 1;
}
if (Size >= sizeof (UINT16)) {
@@ -1371,8 +1374,8 @@ PciSegmentReadBuffer (
//
WriteUnaligned16 (Buffer, PciSegmentRead16 (StartAddress));
StartAddress += sizeof (UINT16);
- Size -= sizeof (UINT16);
- Buffer = (UINT16*)Buffer + 1;
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16 *)Buffer + 1;
}
if (Size >= sizeof (UINT8)) {
@@ -1412,12 +1415,12 @@ PciSegmentReadBuffer (
UINTN
EFIAPI
PciSegmentWriteBuffer (
- IN UINT64 StartAddress,
- IN UINTN Size,
- IN VOID *Buffer
+ IN UINT64 StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
)
{
- UINTN ReturnValue;
+ UINTN ReturnValue;
ASSERT_INVALID_PCI_SEGMENT_ADDRESS (StartAddress, 0);
ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);
@@ -1437,20 +1440,20 @@ PciSegmentWriteBuffer (
//
// Write a byte if StartAddress is byte aligned
//
- PciSegmentWrite8 (StartAddress, *(UINT8*)Buffer);
+ PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer);
StartAddress += sizeof (UINT8);
- Size -= sizeof (UINT8);
- Buffer = (UINT8*)Buffer + 1;
+ Size -= sizeof (UINT8);
+ Buffer = (UINT8 *)Buffer + 1;
}
- if (Size >= sizeof (UINT16) && (StartAddress & BIT1) != 0) {
+ if ((Size >= sizeof (UINT16)) && ((StartAddress & BIT1) != 0)) {
//
// Write a word if StartAddress is word aligned
//
PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
StartAddress += sizeof (UINT16);
- Size -= sizeof (UINT16);
- Buffer = (UINT16*)Buffer + 1;
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16 *)Buffer + 1;
}
while (Size >= sizeof (UINT32)) {
@@ -1459,8 +1462,8 @@ PciSegmentWriteBuffer (
//
PciSegmentWrite32 (StartAddress, ReadUnaligned32 (Buffer));
StartAddress += sizeof (UINT32);
- Size -= sizeof (UINT32);
- Buffer = (UINT32*)Buffer + 1;
+ Size -= sizeof (UINT32);
+ Buffer = (UINT32 *)Buffer + 1;
}
if (Size >= sizeof (UINT16)) {
@@ -1469,15 +1472,15 @@ PciSegmentWriteBuffer (
//
PciSegmentWrite16 (StartAddress, ReadUnaligned16 (Buffer));
StartAddress += sizeof (UINT16);
- Size -= sizeof (UINT16);
- Buffer = (UINT16*)Buffer + 1;
+ Size -= sizeof (UINT16);
+ Buffer = (UINT16 *)Buffer + 1;
}
if (Size >= sizeof (UINT8)) {
//
// Write the last remaining byte if exist
//
- PciSegmentWrite8 (StartAddress, *(UINT8*)Buffer);
+ PciSegmentWrite8 (StartAddress, *(UINT8 *)Buffer);
}
return ReturnValue;
diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
index 693702f3e0..8c2f6b4d55 100644
--- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
+++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h
@@ -9,7 +9,6 @@
#ifndef __DXE_PCI_SEGMENT_LIB__
#define __DXE_PCI_SEGMENT_LIB__
-
#include <Protocol/PciRootBridgeIo.h>
#include <Library/PciSegmentLib.h>
@@ -35,7 +34,7 @@ typedef struct {
@param M Additional bits to assert to be zero.
**/
-#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A,M) \
+#define ASSERT_INVALID_PCI_SEGMENT_ADDRESS(A, M) \
ASSERT (((A) & (0xffff0000f0000000ULL | (M))) == 0)
/**
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-12 09:55:49 +0000