diff options
| author | Leo Duran <leo.duran@amd.com> | 2017-01-14 04:09:55 +0800 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2017-01-17 10:11:07 +0800 |
| commit | 61e1deece1449db22e71988ab84532bb8545ed3e (patch) | |
| tree | e7aa040931610aff57f1830e4f3d51b63c257480 /MdePkg | |
| parent | afb84b5f9270e6f37a8449f2d656b6111a6eb668 (diff) | |
| download | edk2-61e1deece1449db22e71988ab84532bb8545ed3e.tar.gz edk2-61e1deece1449db22e71988ab84532bb8545ed3e.tar.bz2 edk2-61e1deece1449db22e71988ab84532bb8545ed3e.zip | |
MdePkg/DxeIoLibCpuIo2: Add new Fifo routines in IoLib class
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'MdePkg')
| -rw-r--r-- | MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h | 71 | ||||
| -rw-r--r-- | MdePkg/Library/DxeIoLibCpuIo2/IoLib.c | 260 |
2 files changed, 320 insertions, 11 deletions
diff --git a/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h b/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h index 160bedfc3b..c84ce6bf9e 100644 --- a/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h +++ b/MdePkg/Library/DxeIoLibCpuIo2/DxeCpuIo2LibInternal.h @@ -2,6 +2,8 @@ Internal include file of DXE CPU IO2 Library.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
@@ -29,8 +31,10 @@ Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -42,16 +46,18 @@ UINT64
EFIAPI
IoReadWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width
);
/**
Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -64,9 +70,59 @@ IoReadWorker ( UINT64
EFIAPI
IoWriteWorker (
- IN UINTN Port,
- IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
- IN UINT64 Data
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Data
+ );
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
);
/**
@@ -79,6 +135,7 @@ IoWriteWorker ( @param Address The MMIO register to read.
The caller is responsible for aligning the Address if required.
@param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
@return Data read from registers in the EFI system memory space.
diff --git a/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c b/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c index 110f66cd09..4182e299da 100644 --- a/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c +++ b/MdePkg/Library/DxeIoLibCpuIo2/IoLib.c @@ -2,6 +2,8 @@ I/O Library instance based on EFI_CPU_IO2_PROTOCOL.
Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials are licensed and made available
under the terms and conditions of the BSD License which accompanies this
distribution. The full text of the license may be found at
@@ -50,8 +52,10 @@ IoLibConstructor ( Reads registers in the EFI CPU I/O space.
Reads the I/O port specified by Port with registers width specified by Width.
- The read value is returned. If such operations are not supported, then ASSERT().
+ The read value is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -67,8 +71,8 @@ IoReadWorker ( IN EFI_CPU_IO_PROTOCOL_WIDTH Width
)
{
- EFI_STATUS Status;
- UINT64 Data;
+ EFI_STATUS Status;
+ UINT64 Data;
Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);
ASSERT_EFI_ERROR (Status);
@@ -80,8 +84,10 @@ IoReadWorker ( Writes registers in the EFI CPU I/O space.
Writes the I/O port specified by Port with registers width and value specified by Width
- and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
+ and Data respectively. Data is returned.
+
This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
@param Port The base address of the I/O operation.
The caller is responsible for aligning the Address if required.
@@ -108,6 +114,68 @@ IoWriteWorker ( }
/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by Width.
+ The port is written Count times, and the write data is retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ EFI_STATUS Status;
+
+ Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
Reads memory-mapped registers in the EFI system memory space.
Reads the MMIO registers specified by Address with registers width specified by Width.
@@ -397,6 +465,190 @@ IoWrite64 ( }
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
|