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| author | Ard Biesheuvel <ardb@kernel.org> | 2024-09-12 10:36:29 +0200 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-09-13 00:23:13 +0000 |
| commit | 6706fe6e239253e45b28147e06f71dd68a374007 (patch) | |
| tree | 7043349e193dfc7f47b671ed5436a627b37ceaee /NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp | |
| parent | bec02ea9de6ae8aec4a645b56424d7be999fe23f (diff) | |
| download | edk2-6706fe6e239253e45b28147e06f71dd68a374007.tar.gz edk2-6706fe6e239253e45b28147e06f71dd68a374007.tar.bz2 edk2-6706fe6e239253e45b28147e06f71dd68a374007.zip | |
ArmPkg/ArmLib: Drop set/way Dcache operations
Cache maintenance operations by set/way are not broadcast, and operate
on individual architected caches, making them suitable only for
en/disabling cache levels, which is the job of secure firmware, to be
carried out while the CPU in question is not taking part in the
cache coherency protocol.
Managing the clean/dirty state of a memory range can only be done using
cache maintenance by virtual address.
So drop the set/way handling from ArmLib for ARM and AARCH64, as there
is no context where it can be used correctly from EDK2.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Diffstat (limited to 'NetworkPkg/UefiPxeBcDxe/GoogleTest/PxeBcDhcp6GoogleTest.cpp')
0 files changed, 0 insertions, 0 deletions