diff options
| author | lhauch <lhauch@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-06-01 14:49:55 +0000 |
|---|---|---|
| committer | lhauch <lhauch@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-06-01 14:49:55 +0000 |
| commit | 586cd1f1f4129ab7ec24543d4968801e17cc870b (patch) | |
| tree | e2f1b645e576edee627997ca1abd65e3f9b0add8 /OldMdePkg/Library/BaseLib | |
| parent | 144d783d40c8a02113350feabd1b9a55b692313f (diff) | |
| download | edk2-586cd1f1f4129ab7ec24543d4968801e17cc870b.tar.gz edk2-586cd1f1f4129ab7ec24543d4968801e17cc870b.tar.bz2 edk2-586cd1f1f4129ab7ec24543d4968801e17cc870b.zip | |
Moved the MdePkg to OldMdePkg so that new code in MdePkg does not break existing builds. Also updated the SPD and FPD files UiNames
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2616 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OldMdePkg/Library/BaseLib')
549 files changed, 31653 insertions, 0 deletions
diff --git a/OldMdePkg/Library/BaseLib/ARShiftU64.c b/OldMdePkg/Library/BaseLib/ARShiftU64.c new file mode 100644 index 0000000000..feb5430311 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/ARShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
+ with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+ARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathARShiftU64 (Operand, Count);
+}
diff --git a/OldMdePkg/Library/BaseLib/BaseLib.msa b/OldMdePkg/Library/BaseLib/BaseLib.msa new file mode 100644 index 0000000000..2fa9ef2a22 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/BaseLib.msa @@ -0,0 +1,661 @@ +<?xml version="1.0" encoding="UTF-8"?> +<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0"> + <MsaHeader> + <ModuleName>BaseLib</ModuleName> + <ModuleType>BASE</ModuleType> + <GuidValue>27d67720-ea68-48ae-93da-a3a074c90e30</GuidValue> + <Version>1.0</Version> + <Abstract>Component description file for Base Library</Abstract> + <Description>Base Library implementation.</Description> + <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright> + <License>All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License> + <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification> + </MsaHeader> + <ModuleDefinitions> + <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures> + <BinaryModule>false</BinaryModule> + <OutputFileBasename>BaseLib</OutputFileBasename> + </ModuleDefinitions> + <LibraryClassDefinitions> + <LibraryClass Usage="ALWAYS_PRODUCED"> + <Keyword>BaseLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>BaseMemoryLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>DebugLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>TimerLib</Keyword> + </LibraryClass> + <LibraryClass Usage="ALWAYS_CONSUMED"> + <Keyword>PcdLib</Keyword> + </LibraryClass> + </LibraryClassDefinitions> + <SourceFiles> + <Filename>BaseLibInternals.h</Filename> + <Filename>String.c</Filename> + <Filename>LinkedList.c</Filename> + <Filename>Cpu.c</Filename> + <Filename>CpuDeadLoop.c</Filename> + <Filename>BitField.c</Filename> + <Filename>ARShiftU64.c</Filename> + <Filename>DivS64x64Remainder.c</Filename> + <Filename>DivU64x32.c</Filename> + <Filename>DivU64x32Remainder.c</Filename> + <Filename>DivU64x64Remainder.c</Filename> + <Filename>GetPowerOfTwo32.c</Filename> + <Filename>GetPowerOfTwo64.c</Filename> + <Filename>HighBitSet32.c</Filename> + <Filename>HighBitSet64.c</Filename> + <Filename>LowBitSet32.c</Filename> + <Filename>LowBitSet64.c</Filename> + <Filename>LRotU32.c</Filename> + <Filename>LRotU64.c</Filename> + <Filename>LShiftU64.c</Filename> + <Filename>ModU64x32.c</Filename> + <Filename>MultS64x64.c</Filename> + <Filename>MultU64x32.c</Filename> + <Filename>MultU64x64.c</Filename> + <Filename>RRotU32.c</Filename> + <Filename>RRotU64.c</Filename> + <Filename>RShiftU64.c</Filename> + <Filename>SetJump.c</Filename> + <Filename>LongJump.c</Filename> + <Filename>SwapBytes16.c</Filename> + <Filename>SwapBytes32.c</Filename> + <Filename>SwapBytes64.c</Filename> + <Filename>SwitchStack.c</Filename> + <Filename>CheckSum.c</Filename> + <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="GCC">SynchronizationGcc.c</Filename> + <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="MSFT">SynchronizationMsc.c</Filename> + <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="INTEL">Synchronization.c</Filename> + + <Filename SupArchList="IA32">x86DisablePaging32.c</Filename> + <Filename SupArchList="IA32">x86DisablePaging64.c</Filename> + <Filename SupArchList="IA32">x86EnablePaging32.c</Filename> + <Filename SupArchList="IA32">x86EnablePaging64.c</Filename> + <Filename SupArchList="IA32">x86FxRestore.c</Filename> + <Filename SupArchList="IA32">x86FxSave.c</Filename> + <Filename SupArchList="IA32">x86GetInterruptState.c</Filename> + <Filename SupArchList="IA32">x86MemoryFence.c</Filename> + <Filename SupArchList="IA32">x86Msr.c</Filename> + <Filename SupArchList="IA32">x86ReadGdtr.c</Filename> + <Filename SupArchList="IA32">x86ReadIdtr.c</Filename> + <Filename SupArchList="IA32">x86Thunk.c</Filename> + <Filename SupArchList="IA32">x86WriteGdtr.c</Filename> + <Filename SupArchList="IA32">x86WriteIdtr.c</Filename> + <Filename SupArchList="IA32">Unaligned.c</Filename> + <Filename SupArchList="IA32">Ia32/Non-existing.c</Filename> + <Filename SupArchList="IA32">Ia32/InternalSwitchStack.c</Filename> + <Filename SupArchList="IA32">Ia32/DivS64x64Remainder.c</Filename> + + <!-- GCC assembly code is with .S extension --> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/LShiftU64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/RShiftU64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ARShiftU64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/LRotU64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/RRotU64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/MultU64x32.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/MultU64x64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DivU64x32.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ModU64x32.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DivU64x32Remainder.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DivU64x64Remainder.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/SwapBytes64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/SetJump.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/LongJump.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuId.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuIdEx.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadEflags.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMsr64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMsr64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr0.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr2.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr3.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr4.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr0.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr2.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr3.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr4.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr0.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr1.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr2.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr3.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr4.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr5.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr6.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr7.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr0.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr1.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr2.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr3.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr4.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr5.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr6.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr7.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCs.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDs.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadEs.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadFs.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadGs.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadSs.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadTr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadGdtr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteGdtr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadIdtr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteIdtr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadLdtr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteLdtr.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/FxSave.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/FxRestore.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm0.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm1.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm2.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm3.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm4.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm5.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm6.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm7.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm0.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm1.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm2.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm3.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm4.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm5.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm6.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm7.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadTsc.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadPmc.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/Monitor.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/Mwait.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/EnablePaging32.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DisablePaging32.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/EnablePaging64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/Wbinvd.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/Invd.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/FlushCacheLine.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/InterlockedIncrement.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/InterlockedDecrement.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/InterlockedCompareExchange32.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/InterlockedCompareExchange64.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/EnableInterrupts.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DisableInterrupts.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/EnableDisableInterrupts.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuSleep.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuPause.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuBreakpoint.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuFlushTlb.S</Filename> + <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/Thunk16.S</Filename> + + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/CpuBreakpoint.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/CpuFlushTlb.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/CpuIdEx.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/CpuId.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/CpuPause.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/CpuSleep.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/DisableInterrupts.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/DisablePaging64.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/EnableDisableInterrupts.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/EnableInterrupts.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/EnablePaging64.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/FlushCacheLine.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/FxRestore.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/FxSave.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/InterlockedCompareExchange32.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/InterlockedCompareExchange64.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/InterlockedDecrement.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/InterlockedIncrement.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/Invd.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/LongJump.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/Monitor.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/Mwait.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadCr0.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadCr2.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadCr3.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadCr4.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadCs.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr0.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr1.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr2.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr3.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr4.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr5.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr6.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDr7.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadDs.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadEflags.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadEs.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadFs.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadGdtr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadGs.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadIdtr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadLdtr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm0.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm1.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm2.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm3.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm4.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm5.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm6.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMm7.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadMsr64.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadPmc.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadSs.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadTr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/ReadTsc.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/SetJump.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/SwitchStack.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/Thunk16.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/Wbinvd.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteCr0.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteCr2.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteCr3.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteCr4.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr0.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr1.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr2.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr3.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr4.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr5.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr6.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteDr7.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteGdtr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteIdtr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteLdtr.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm0.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm1.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm2.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm3.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm4.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm5.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm6.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMm7.S</Filename> + <Filename SupArchList="X64" ToolChainFamily="GCC">X64/WriteMsr64.S</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ARShiftU64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/CpuBreakpoint.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/CpuFlushTlb.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/CpuSleep.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/CpuId.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/CpuIdEx.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/CpuPause.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/DisableInterrupts.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/DisablePaging32.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/DivU64x32.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/DivU64x32Remainder.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/DivU64x64Remainder.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/EnableDisableInterrupts.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/EnableInterrupts.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/EnablePaging32.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/EnablePaging64.asm</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/FlushCacheLine.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/FxSave.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/FxRestore.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/InterlockedIncrement.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/InterlockedDecrement.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/InterlockedCompareExchange32.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/InterlockedCompareExchange64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/Invd.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/LongJump.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/LRotU64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/LShiftU64.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/MultU64x32.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/MultU64x64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ModU64x32.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/Monitor.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/Mwait.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadCr0.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadCr2.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadCr3.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadCr4.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr0.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr1.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr2.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr3.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr4.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr5.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr6.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDr7.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadEflags.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm0.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm1.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm2.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm3.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm4.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm5.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm6.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMm7.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadMsr64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadCs.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadDs.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadEs.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadFs.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadGs.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadSs.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadTr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadGdtr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadIdtr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadLdtr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadTsc.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/ReadPmc.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/RShiftU64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/RRotU64.c</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/SetJump.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/SwapBytes64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/Thunk16.asm</Filename> + + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMsr64.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteCr0.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteCr2.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteCr3.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteCr4.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr0.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr1.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr2.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr3.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr4.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr5.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr6.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteDr7.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteGdtr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteIdtr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteLdtr.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm0.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm1.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm2.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm3.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm4.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm5.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm6.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/WriteMm7.c</Filename> + <Filename SupArchList="IA32" ToolChainFamily="MSFT">Ia32/Wbinvd.c</Filename> + + <Filename SupArchList="X64">x86DisablePaging32.c</Filename> + <Filename SupArchList="X64">x86DisablePaging64.c</Filename> + <Filename SupArchList="X64">x86EnablePaging32.c</Filename> + <Filename SupArchList="X64">x86EnablePaging64.c</Filename> + <Filename SupArchList="X64">x86FxRestore.c</Filename> + <Filename SupArchList="X64">x86FxSave.c</Filename> + <Filename SupArchList="X64">x86GetInterruptState.c</Filename> + <Filename SupArchList="X64">x86MemoryFence.c</Filename> + <Filename SupArchList="X64">x86Msr.c</Filename> + <Filename SupArchList="X64">x86ReadGdtr.c</Filename> + <Filename SupArchList="X64">x86ReadIdtr.c</Filename> + <Filename SupArchList="X64">x86Thunk.c</Filename> + <Filename SupArchList="X64">x86WriteGdtr.c</Filename> + <Filename SupArchList="X64">x86WriteIdtr.c</Filename> + <Filename SupArchList="X64">Unaligned.c</Filename> + <Filename SupArchList="X64">Math64.c</Filename> + <Filename SupArchList="X64">X64/Non-existing.c</Filename> + <Filename SupArchList="X64">X64/SwitchStack.asm</Filename> + <Filename SupArchList="X64">X64/SetJump.asm</Filename> + <Filename SupArchList="X64">X64/LongJump.asm</Filename> + <Filename SupArchList="X64">X64/CpuId.asm</Filename> + <Filename SupArchList="X64">X64/CpuIdEx.asm</Filename> + <Filename SupArchList="X64">X64/ReadEflags.asm</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/ReadMsr64.c</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/WriteMsr64.c</Filename> + <Filename SupArchList="X64">X64/ReadCr0.asm</Filename> + <Filename SupArchList="X64">X64/ReadCr2.asm</Filename> + <Filename SupArchList="X64">X64/ReadCr3.asm</Filename> + <Filename SupArchList="X64">X64/ReadCr4.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr0.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr2.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr3.asm</Filename> + <Filename SupArchList="X64">X64/WriteCr4.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr0.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr1.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr2.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr3.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr4.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr5.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr6.asm</Filename> + <Filename SupArchList="X64">X64/ReadDr7.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr0.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr1.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr2.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr3.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr4.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr5.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr6.asm</Filename> + <Filename SupArchList="X64">X64/WriteDr7.asm</Filename> + <Filename SupArchList="X64">X64/ReadCs.asm</Filename> + <Filename SupArchList="X64">X64/ReadDs.asm</Filename> + <Filename SupArchList="X64">X64/ReadEs.asm</Filename> + <Filename SupArchList="X64">X64/ReadFs.asm</Filename> + <Filename SupArchList="X64">X64/ReadGs.asm</Filename> + <Filename SupArchList="X64">X64/ReadSs.asm</Filename> + <Filename SupArchList="X64">X64/ReadTr.asm</Filename> + <Filename SupArchList="X64">X64/ReadGdtr.asm</Filename> + <Filename SupArchList="X64">X64/WriteGdtr.asm</Filename> + <Filename SupArchList="X64">X64/ReadIdtr.asm</Filename> + <Filename SupArchList="X64">X64/WriteIdtr.asm</Filename> + <Filename SupArchList="X64">X64/ReadLdtr.asm</Filename> + <Filename SupArchList="X64">X64/WriteLdtr.asm</Filename> + <Filename SupArchList="X64">X64/FxSave.asm</Filename> + <Filename SupArchList="X64">X64/FxRestore.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm0.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm1.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm2.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm3.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm4.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm5.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm6.asm</Filename> + <Filename SupArchList="X64">X64/ReadMm7.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm0.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm1.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm2.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm3.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm4.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm5.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm6.asm</Filename> + <Filename SupArchList="X64">X64/WriteMm7.asm</Filename> + <Filename SupArchList="X64">X64/ReadTsc.asm</Filename> + <Filename SupArchList="X64">X64/ReadPmc.asm</Filename> + <Filename SupArchList="X64">X64/Monitor.asm</Filename> + <Filename SupArchList="X64">X64/Mwait.asm</Filename> + <Filename SupArchList="X64">X64/EnablePaging64.asm</Filename> + <Filename SupArchList="X64">X64/DisablePaging64.asm</Filename> + <Filename SupArchList="X64">X64/Wbinvd.asm</Filename> + <Filename SupArchList="X64">X64/Invd.asm</Filename> + <Filename SupArchList="X64">X64/FlushCacheLine.asm</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedIncrement.c</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedDecrement.c</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedCompareExchange32.asm</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedCompareExchange64.asm</Filename> + <Filename SupArchList="X64">X64/EnableInterrupts.asm</Filename> + <Filename SupArchList="X64">X64/DisableInterrupts.asm</Filename> + <Filename SupArchList="X64">X64/EnableDisableInterrupts.asm</Filename> + <Filename SupArchList="X64">X64/CpuSleep.asm</Filename> + <Filename SupArchList="X64">X64/CpuPause.asm</Filename> + <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/CpuBreakpoint.c</Filename> + <Filename SupArchList="X64">X64/CpuFlushTlb.asm</Filename> + <Filename SupArchList="X64">X64/Thunk16.asm</Filename> + + <Filename SupArchList="IPF">Math64.c</Filename> + <Filename SupArchList="IPF">Ipf/asm.h</Filename> + <Filename SupArchList="IPF">Ipf/ia_64gen.h</Filename> + <Filename SupArchList="IPF">Ipf/PalCallStatic.s</Filename> + <Filename SupArchList="IPF">Ipf/setjmp.s</Filename> + <Filename SupArchList="IPF">Ipf/longjmp.s</Filename> + <Filename SupArchList="IPF">Ipf/SwitchStack.s</Filename> + <Filename SupArchList="IPF">Ipf/Unaligned.c</Filename> + <Filename SupArchList="IPF">Ipf/CpuBreakpoint.c</Filename> + <Filename SupArchList="IPF">Ipf/InterlockedCompareExchange32.s</Filename> + <Filename SupArchList="IPF">Ipf/InterlockedCompareExchange64.s</Filename> + <Filename SupArchList="IPF">Ipf/Synchronization.c</Filename> + <Filename SupArchList="IPF">Ipf/CpuPause.s</Filename> + <Filename SupArchList="IPF">Ipf/CpuFlushTlb.s</Filename> + <Filename SupArchList="IPF">Ipf/GetInterruptState.s</Filename> + <Filename SupArchList="IPF">Ipf/InternalSwitchStack.c</Filename> + <Filename SupArchList="IPF">Ipf/FlushCacheRange.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessDbr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessEicr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessGcr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessKr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessPmr.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessPsr.s</Filename> + <Filename SupArchList="IPF">Ipf/AsmPalCall.s</Filename> + <Filename SupArchList="IPF">Ipf/ExecFc.s</Filename> + <Filename SupArchList="IPF">Ipf/ReadCpuid.s</Filename> + <Filename SupArchList="IPF">Ipf/AccessGp.s</Filename> + + <Filename SupArchList="EBC">Math64.c</Filename> + <Filename SupArchList="EBC">Unaligned.c</Filename> + <Filename SupArchList="EBC">Ebc/SwitchStack.c</Filename> + <Filename SupArchList="EBC">Ebc/SetJumpLongJump.c</Filename> + <Filename SupArchList="EBC">Ebc/CpuBreakpoint.c</Filename> + <Filename SupArchList="EBC">Ebc/Synchronization.c</Filename> + <Filename SupArchList="EBC">Synchronization.c</Filename> + <Filename>CheckSum.c</Filename> + </SourceFiles> + <NonProcessedFiles> + <Filename>Ia32/ARShiftU64.asm</Filename> + <Filename>Ia32/CpuBreakpoint.asm</Filename> + <Filename>Ia32/CpuFlushTlb.asm</Filename> + <Filename>Ia32/CpuId.asm</Filename> + <Filename>Ia32/CpuIdEx.asm</Filename> + <Filename>Ia32/CpuPause.asm</Filename> + <Filename>Ia32/CpuSleep.asm</Filename> + <Filename>Ia32/DisableInterrupts.asm</Filename> + <Filename>Ia32/DisablePaging32.asm</Filename> + <Filename>Ia32/DivU64x32.asm</Filename> + <Filename>Ia32/DivU64x32Remainder.asm</Filename> + <Filename>Ia32/DivU64x64Remainder.asm</Filename> + <Filename>Ia32/EnableDisableInterrupts.asm</Filename> + <Filename>Ia32/EnableInterrupts.asm</Filename> + <Filename>Ia32/EnablePaging32.asm</Filename> + <Filename>Ia32/EnablePaging64.asm</Filename> + <Filename>Ia32/FlushCacheLine.asm</Filename> + <Filename>Ia32/FxRestore.asm</Filename> + <Filename>Ia32/FxSave.asm</Filename> + <Filename>Ia32/InterlockedCompareExchange32.asm</Filename> + <Filename>Ia32/InterlockedCompareExchange64.asm</Filename> + <Filename>Ia32/InterlockedDecrement.asm</Filename> + <Filename>Ia32/InterlockedIncrement.asm</Filename> + <Filename>Ia32/Invd.asm</Filename> + <Filename>Ia32/LongJump.asm</Filename> + <Filename>Ia32/LRotU64.asm</Filename> + <Filename>Ia32/LShiftU64.asm</Filename> + <Filename>Ia32/ModU64x32.asm</Filename> + <Filename>Ia32/Monitor.asm</Filename> + <Filename>Ia32/MultU64x32.asm</Filename> + <Filename>Ia32/MultU64x64.asm</Filename> + <Filename>Ia32/Mwait.asm</Filename> + <Filename>Ia32/ReadCr0.asm</Filename> + <Filename>Ia32/ReadCr2.asm</Filename> + <Filename>Ia32/ReadCr3.asm</Filename> + <Filename>Ia32/ReadCr4.asm</Filename> + <Filename>Ia32/ReadCs.asm</Filename> + <Filename>Ia32/ReadDr0.asm</Filename> + <Filename>Ia32/ReadDr1.asm</Filename> + <Filename>Ia32/ReadDr2.asm</Filename> + <Filename>Ia32/ReadDr3.asm</Filename> + <Filename>Ia32/ReadDr4.asm</Filename> + <Filename>Ia32/ReadDr5.asm</Filename> + <Filename>Ia32/ReadDr6.asm</Filename> + <Filename>Ia32/ReadDr7.asm</Filename> + <Filename>Ia32/ReadDs.asm</Filename> + <Filename>Ia32/ReadEflags.asm</Filename> + <Filename>Ia32/ReadEs.asm</Filename> + <Filename>Ia32/ReadFs.asm</Filename> + <Filename>Ia32/ReadGdtr.asm</Filename> + <Filename>Ia32/ReadGs.asm</Filename> + <Filename>Ia32/ReadIdtr.asm</Filename> + <Filename>Ia32/ReadLdtr.asm</Filename> + <Filename>Ia32/ReadMm0.asm</Filename> + <Filename>Ia32/ReadMm1.asm</Filename> + <Filename>Ia32/ReadMm2.asm</Filename> + <Filename>Ia32/ReadMm3.asm</Filename> + <Filename>Ia32/ReadMm4.asm</Filename> + <Filename>Ia32/ReadMm5.asm</Filename> + <Filename>Ia32/ReadMm6.asm</Filename> + <Filename>Ia32/ReadMm7.asm</Filename> + <Filename>Ia32/ReadMsr64.asm</Filename> + <Filename>Ia32/ReadPmc.asm</Filename> + <Filename>Ia32/ReadSs.asm</Filename> + <Filename>Ia32/ReadTr.asm</Filename> + <Filename>Ia32/ReadTsc.asm</Filename> + <Filename>Ia32/RRotU64.asm</Filename> + <Filename>Ia32/RShiftU64.asm</Filename> + <Filename>Ia32/SetJump.asm</Filename> + <Filename>Ia32/SwapBytes64.asm</Filename> + <Filename>Ia32/Thunk16.asm</Filename> + <Filename>Ia32/Wbinvd.asm</Filename> + <Filename>Ia32/WriteCr0.asm</Filename> + <Filename>Ia32/WriteCr2.asm</Filename> + <Filename>Ia32/WriteCr3.asm</Filename> + <Filename>Ia32/WriteCr4.asm</Filename> + <Filename>Ia32/WriteDr0.asm</Filename> + <Filename>Ia32/WriteDr1.asm</Filename> + <Filename>Ia32/WriteDr2.asm</Filename> + <Filename>Ia32/WriteDr3.asm</Filename> + <Filename>Ia32/WriteDr4.asm</Filename> + <Filename>Ia32/WriteDr5.asm</Filename> + <Filename>Ia32/WriteDr6.asm</Filename> + <Filename>Ia32/WriteDr7.asm</Filename> + <Filename>Ia32/WriteGdtr.asm</Filename> + <Filename>Ia32/WriteIdtr.asm</Filename> + <Filename>Ia32/WriteLdtr.asm</Filename> + <Filename>Ia32/WriteMm0.asm</Filename> + <Filename>Ia32/WriteMm1.asm</Filename> + <Filename>Ia32/WriteMm2.asm</Filename> + <Filename>Ia32/WriteMm3.asm</Filename> + <Filename>Ia32/WriteMm4.asm</Filename> + <Filename>Ia32/WriteMm5.asm</Filename> + <Filename>Ia32/WriteMm6.asm</Filename> + <Filename>Ia32/WriteMm7.asm</Filename> + <Filename>Ia32/WriteMsr64.asm</Filename> + </NonProcessedFiles> + <PackageDependencies> + <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/> + </PackageDependencies> + <Externs> + <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification> + <Specification>EDK_RELEASE_VERSION 0x00020000</Specification> + </Externs> + <PcdCoded> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdMaximumUnicodeStringLength</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdMaximumUnicodeStringLength is not zero, the maximum + number of characters (not counting the NULL-terminator) in a + Unicode string cannot exceed it.</HelpText> + </PcdEntry> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdMaximumAsciiStringLength</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdMaximumAsciiStringLength is not zero, the maximum number + of characters (not counting the NULL-terminator) in an ASCII + string cannot exceed it.</HelpText> + </PcdEntry> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdMaximumLinkedListLength</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdMaximumLinkedListLength is not zero, the maximum number + of nodes (not counting the list header) in a linked list + cannot exceed it.</HelpText> + </PcdEntry> + <PcdEntry PcdItemType="FIXED_AT_BUILD"> + <C_Name>PcdSpinLockTimeout</C_Name> + <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName> + <HelpText>If PcdSpinLockTimeout is not zero, it stands for the timeout + value (unit: millisecond) for spin lock.</HelpText> + </PcdEntry> + </PcdCoded> +</ModuleSurfaceArea> diff --git a/OldMdePkg/Library/BaseLib/BaseLibInternals.h b/OldMdePkg/Library/BaseLib/BaseLibInternals.h new file mode 100644 index 0000000000..685b8ce99b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/BaseLibInternals.h @@ -0,0 +1,867 @@ +/** @file + Declaration of internal functions in BaseLib. + + Copyright (c) 2006 - 2007, Intel Corporation<BR> + All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + Module Name: BaseLibInternals.h + +**/ + +#ifndef __BASE_LIB_INTERNALS__ +#define __BASE_LIB_INTERNALS__ + +#define QUIENT_MAX_UINTN_DIVIDED_BY_10 ((UINTN) -1 / 10) +#define REMINDER_MAX_UINTN_DIVIDED_BY_10 ((UINTN) -1 % 10) + +#define QUIENT_MAX_UINTN_DIVIDED_BY_16 ((UINTN) -1 / 16) +#define REMINDER_MAX_UINTN_DIVIDED_BY_16 ((UINTN) -1 % 16) + +#define QUIENT_MAX_UINT64_DIVIDED_BY_10 ((UINT64) -1 / 10) +#define REMINDER_MAX_UINT64_DIVIDED_BY_10 ((UINT64) -1 % 10) + +#define QUIENT_MAX_UINT64_DIVIDED_BY_16 ((UINT64) -1 / 16) +#define REMINDER_MAX_UINT64_DIVIDED_BY_16 ((UINT64) -1 % 16) + +// +// Math functions +// + +/** + Shifts a 64-bit integer left between 0 and 63 bits. The low bits + are filled with zeros. The shifted value is returned. + + This function shifts the 64-bit value Operand to the left by Count bits. The + low Count bits are set to zero. The shifted value is returned. + + @param Operand The 64-bit operand to shift left. + @param Count The number of bits to shift left. + + @return Operand << Count + +**/ +UINT64 +EFIAPI +InternalMathLShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Shifts a 64-bit integer right between 0 and 63 bits. This high bits + are filled with zeros. The shifted value is returned. + + This function shifts the 64-bit value Operand to the right by Count bits. The + high Count bits are set to zero. The shifted value is returned. + + @param Operand The 64-bit operand to shift right. + @param Count The number of bits to shift right. + + @return Operand >> Count + +**/ +UINT64 +EFIAPI +InternalMathRShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Shifts a 64-bit integer right between 0 and 63 bits. The high bits + are filled with original integer's bit 63. The shifted value is returned. + + This function shifts the 64-bit value Operand to the right by Count bits. The + high Count bits are set to bit 63 of Operand. The shifted value is returned. + + @param Operand The 64-bit operand to shift right. + @param Count The number of bits to shift right. + + @return Operand arithmetically shifted right by Count + +**/ +UINT64 +EFIAPI +InternalMathARShiftU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Rotates a 64-bit integer left between 0 and 63 bits, filling + the low bits with the high bits that were rotated. + + This function rotates the 64-bit value Operand to the left by Count bits. The + low Count bits are fill with the high Count bits of Operand. The rotated + value is returned. + + @param Operand The 64-bit operand to rotate left. + @param Count The number of bits to rotate left. + + @return Operand <<< Count + +**/ +UINT64 +EFIAPI +InternalMathLRotU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Rotates a 64-bit integer right between 0 and 63 bits, filling + the high bits with the high low bits that were rotated. + + This function rotates the 64-bit value Operand to the right by Count bits. + The high Count bits are fill with the low Count bits of Operand. The rotated + value is returned. + + @param Operand The 64-bit operand to rotate right. + @param Count The number of bits to rotate right. + + @return Operand >>> Count + +**/ +UINT64 +EFIAPI +InternalMathRRotU64 ( + IN UINT64 Operand, + IN UINTN Count + ); + +/** + Switches the endianess of a 64-bit integer. + + This function swaps the bytes in a 64-bit unsigned value to switch the value + from little endian to big endian or vice versa. The byte swapped value is + returned. + + @param Operand A 64-bit unsigned value. + + @return The byte swaped Operand. + +**/ +UINT64 +EFIAPI +InternalMathSwapBytes64 ( + IN UINT64 Operand + ); + +/** + Multiples a 64-bit unsigned integer by a 32-bit unsigned integer + and generates a 64-bit unsigned result. + + This function multiples the 64-bit unsigned value Multiplicand by the 32-bit + unsigned value Multiplier and generates a 64-bit unsigned result. This 64- + bit unsigned result is returned. + + @param Multiplicand A 64-bit unsigned value. + @param Multiplier A 32-bit unsigned value. + + @return Multiplicand * Multiplier + +**/ +UINT64 +EFIAPI +InternalMathMultU64x32 ( + IN UINT64 Multiplicand, + IN UINT32 Multiplier + ); + +/** + Multiples a 64-bit unsigned integer by a 64-bit unsigned integer + and generates a 64-bit unsigned result. + + This function multiples the 64-bit unsigned value Multiplicand by the 64-bit + unsigned value Multiplier and generates a 64-bit unsigned result. This 64- + bit unsigned result is returned. + + @param Multiplicand A 64-bit unsigned value. + @param Multiplier A 64-bit unsigned value. + + @return Multiplicand * Multiplier + +**/ +UINT64 +EFIAPI +InternalMathMultU64x64 ( + IN UINT64 Multiplicand, + IN UINT64 Multiplier + ); + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and + generates a 64-bit unsigned result. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. This + function returns the 64-bit unsigned quotient. + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + + @return Dividend / Divisor + +**/ +UINT64 +EFIAPI +InternalMathDivU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor + ); + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and + generates a 32-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 32-bit remainder. This function + returns the 32-bit unsigned remainder. + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + + @return Dividend % Divisor + +**/ +UINT32 +EFIAPI +InternalMathModU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor + ); + +/** + Divides a 64-bit unsigned integer by a 32-bit unsigned integer and + generates a 64-bit unsigned result and an optional 32-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 32-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 32-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + @param Dividend A 64-bit unsigned value. + @param Divisor A 32-bit unsigned value. + @param Remainder A pointer to a 32-bit unsigned value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor + +**/ +UINT64 +EFIAPI +InternalMathDivRemU64x32 ( + IN UINT64 Dividend, + IN UINT32 Divisor, + OUT UINT32 *Remainder + ); + +/** + Divides a 64-bit unsigned integer by a 64-bit unsigned integer and + generates a 64-bit unsigned result and an optional 64-bit unsigned remainder. + + This function divides the 64-bit unsigned value Dividend by the 64-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 64-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + @param Dividend A 64-bit unsigned value. + @param Divisor A 64-bit unsigned value. + @param Remainder A pointer to a 64-bit unsigned value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor + +**/ +UINT64 +EFIAPI +InternalMathDivRemU64x64 ( + IN UINT64 Dividend, + IN UINT64 Divisor, + OUT UINT64 *Remainder + ); + +/** + Divides a 64-bit signed integer by a 64-bit signed integer and + generates a 64-bit signed result and a optional 64-bit signed remainder. + + This function divides the 64-bit unsigned value Dividend by the 64-bit + unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder + is not NULL, then the 64-bit unsigned remainder is returned in Remainder. + This function returns the 64-bit unsigned quotient. + + @param Dividend A 64-bit signed value. + @param Divisor A 64-bit signed value. + @param Remainder A pointer to a 64-bit signed value. This parameter is + optional and may be NULL. + + @return Dividend / Divisor + +**/ +INT64 +InternalMathDivRemS64x64 ( + IN INT64 Dividend, + IN INT64 Divisor, + OUT INT64 *Remainder OPTIONAL + ); + +/** + Transfers control to a function starting with a new stack. + + Transfers control to the function specified by EntryPoint using the + new stack specified by NewStack and passing in the parameters specified + by Context1 and Context2. Context1 and Context2 are optional and may + be NULL. The function EntryPoint must never return. + Marker will be ignored on IA-32, x64, and EBC. + IPF CPUs expect one additional parameter of type VOID * that specifies + the new backing store pointer. + + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + @param EntryPoint A pointer to function to call with the new stack. + @param Context1 A pointer to the context to pass into the EntryPoint + function. + @param Context2 A pointer to the context to pass into the EntryPoint + function. + @param NewStack A pointer to the new stack to use for the EntryPoint + function. + @param Marker VA_LIST marker for the variable argument list. + +**/ +VOID +EFIAPI +InternalSwitchStack ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack, + IN VA_LIST Marker + ); + + +/** + Worker function that locates the Node in the List + + By searching the List, finds the location of the Node in List. At the same time, + verifies the validity of this list. + + If List is NULL, then ASSERT(). + If List->ForwardLink is NULL, then ASSERT(). + If List->backLink is NULL, then ASSERT(). + If Node is NULL, then ASSERT(); + If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number + of nodes in ListHead, including the ListHead node, is greater than or + equal to PcdMaximumLinkedListLength, then ASSERT(). + + @param List A pointer to a node in a linked list. + @param Node A pointer to one nod. + + @retval TRUE Node is in List + @retval FALSE Node isn't in List, or List is invalid + +**/ +BOOLEAN +IsNodeInList ( + IN CONST LIST_ENTRY *List, + IN CONST LIST_ENTRY *Node + ); + + +/** + Performs an atomic increment of an 32-bit unsigned integer. + + Performs an atomic increment of the 32-bit unsigned integer specified by + Value and returns the incremented value. The increment operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to increment. + + @return The incremented value. + +**/ +UINT32 +EFIAPI +InternalSyncIncrement ( + IN volatile UINT32 *Value + ); + + +/** + Performs an atomic decrement of an 32-bit unsigned integer. + + Performs an atomic decrement of the 32-bit unsigned integer specified by + Value and returns the decrement value. The decrement operation must be + performed using MP safe mechanisms. The state of the return value is not + guaranteed to be MP safe. + + @param Value A pointer to the 32-bit value to decrement. + + @return The decrement value. + +**/ +UINT32 +EFIAPI +InternalSyncDecrement ( + IN volatile UINT32 *Value + ); + + +/** + Performs an atomic compare exchange operation on a 32-bit unsigned integer. + + Performs an atomic compare exchange operation on the 32-bit unsigned integer + specified by Value. If Value is equal to CompareValue, then Value is set to + ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, + then Value is returned. The compare exchange operation must be performed using + MP safe mechanisms. + + @param Value A pointer to the 32-bit value for the compare exchange + operation. + @param CompareValue 32-bit value used in compare operation. + @param ExchangeValue 32-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +UINT32 +EFIAPI +InternalSyncCompareExchange32 ( + IN volatile UINT32 *Value, + IN UINT32 CompareValue, + IN UINT32 ExchangeValue + ); + + +/** + Performs an atomic compare exchange operation on a 64-bit unsigned integer. + + Performs an atomic compare exchange operation on the 64-bit unsigned integer specified + by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and + CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. + The compare exchange operation must be performed using MP safe mechanisms. + + @param Value A pointer to the 64-bit value for the compare exchange + operation. + @param CompareValue 64-bit value used in compare operation. + @param ExchangeValue 64-bit value used in exchange operation. + + @return The original *Value before exchange. + +**/ +UINT64 +EFIAPI +InternalSyncCompareExchange64 ( + IN volatile UINT64 *Value, + IN UINT64 CompareValue, + IN UINT64 ExchangeValue + ); + + +/** + Worker function that returns a bit field from Operand + + Returns the bitfield specified by the StartBit and the EndBit from Operand. + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + @param EndBit The ordinal of the most significant bit in the bit field. + + @return The bit field read. + +**/ +unsigned int +BitFieldReadUint ( + IN unsigned int Operand, + IN UINTN StartBit, + IN UINTN EndBit + ); + + +/** + Worker function that reads a bit field from Operand, performs a bitwise OR, + and returns the result. + + Performs a bitwise OR between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new value is returned. + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + @param EndBit The ordinal of the most significant bit in the bit field. + @param OrData The value to OR with the read value from the value + + @return The new value. + +**/ +unsigned int +BitFieldOrUint ( + IN unsigned int Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN unsigned int OrData + ); + + +/** + Worker function that reads a bit field from Operand, performs a bitwise AND, + and returns the result. + + Performs a bitwise AND between the bit field specified by StartBit and EndBit + in Operand and the value specified by AndData. All other bits in Operand are + preserved. The new value is returned. + + @param Operand Operand on which to perform the bitfield operation. + @param StartBit The ordinal of the least significant bit in the bit field. + @param EndBit The ordinal of the most significant bit in the bit field. + @param AndData The value to And with the read value from the value + + @return The new value. + +**/ +unsigned int +BitFieldAndUint ( + IN unsigned int Operand, + IN UINTN StartBit, + IN UINTN EndBit, + IN unsigned int AndData + ); + + +/** + Worker function that checks ASSERT condition for JumpBuffer + + Checks ASSERT condition for JumpBuffer. + + If JumpBuffer is NULL, then ASSERT(). + For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT(). + + @param JumpBuffer A pointer to CPU context buffer. + +**/ +VOID +InternalAssertJumpBuffer ( + IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer + ); + + +/** + Restores the CPU context that was saved with SetJump(). + + Restores the CPU context from the buffer specified by JumpBuffer. + This function never returns to the caller. + Instead is resumes execution based on the state of JumpBuffer. + + @param JumpBuffer A pointer to CPU context buffer. + @param Value The value to return when the SetJump() context is restored. + +**/ +VOID +EFIAPI +InternalLongJump ( + IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, + IN UINTN Value + ); + + +// +// Ia32 and x64 specific functions +// +#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) + +/** + Reads the current Global Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current GDTR descriptor and returns it in Gdtr. This + function is only available on IA-32 and X64. + + @param Gdtr Pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86ReadGdtr ( + OUT IA32_DESCRIPTOR *Gdtr + ); + +/** + Writes the current Global Descriptor Table Register (GDTR) descriptor. + + Writes and the current GDTR descriptor specified by Gdtr. This function is + only available on IA-32 and X64. + + @param Gdtr Pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86WriteGdtr ( + IN CONST IA32_DESCRIPTOR *Gdtr + ); + +/** + Reads the current Interrupt Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current IDTR descriptor and returns it in Idtr. This + function is only available on IA-32 and X64. + + @param Idtr Pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86ReadIdtr ( + OUT IA32_DESCRIPTOR *Idtr + ); + +/** + Writes the current Interrupt Descriptor Table Register(GDTR) descriptor. + + Writes the current IDTR descriptor and returns it in Idtr. This function is + only available on IA-32 and X64. + + @param Idtr Pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86WriteIdtr ( + IN CONST IA32_DESCRIPTOR *Idtr + ); + +/** + Save the current floating point/SSE/SSE2 context to a buffer. + + Saves the current floating point/SSE/SSE2 state to the buffer specified by + Buffer. Buffer must be aligned on a 16-byte boundary. This function is only + available on IA-32 and X64. + + @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +InternalX86FxSave ( + OUT IA32_FX_BUFFER *Buffer + ); + +/** + Restores the current floating point/SSE/SSE2 context from a buffer. + + Restores the current floating point/SSE/SSE2 state from the buffer specified + by Buffer. Buffer must be aligned on a 16-byte boundary. This function is + only available on IA-32 and X64. + + @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +InternalX86FxRestore ( + IN CONST IA32_FX_BUFFER *Buffer + ); + +/** + Enables the 32-bit paging mode on the CPU. + + Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode. This function is + only available on IA-32. After the 32-bit paging mode is enabled, control is + transferred to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit protected mode with flat descriptors. This + means all descriptors must have a base of 0 and a limit of 4GB. + 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat + descriptors. + 4) CR3 must point to valid page tables that will be used once the transition + is complete, and those page tables must guarantee that the pages for this + function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is enabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is enabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is enabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is enabled. + +**/ +VOID +EFIAPI +InternalX86EnablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + +/** + Disables the 32-bit paging mode on the CPU. + + Disables the 32-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 32-paged protected + mode. This function is only available on IA-32. After the 32-bit paging mode + is disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be NULL. The function EntryPoint must never return. + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit paged mode. + 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode. + 4) CR3 must point to valid page tables that guarantee that the pages for + this function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is disabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is disabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is + disabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is disabled. + +**/ +VOID +EFIAPI +InternalX86DisablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ); + +/** + Enables the 64-bit paging mode on the CPU. + + Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode with flat + descriptors. This function is only available on IA-32. After the 64-bit + paging mode is enabled, control is transferred to the function specified by + EntryPoint using the new stack specified by NewStack and passing in the + parameters specified by Context1 and Context2. Context1 and Context2 are + optional and may be 0. The function EntryPoint must never return. + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for long mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is enabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is enabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is enabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is enabled. + +**/ +VOID +EFIAPI +InternalX86EnablePaging64 ( + IN UINT16 Cs, + IN UINT64 EntryPoint, + IN UINT64 Context1, OPTIONAL + IN UINT64 Context2, OPTIONAL + IN UINT64 NewStack + ); + +/** + Disables the 64-bit paging mode on the CPU. + + Disables the 64-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 64-paging mode. + This function is only available on X64. After the 64-bit paging mode is + disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be 0. The function EntryPoint must never return. + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for 32-bit protected mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is disabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is disabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is disabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is disabled. + +**/ +VOID +EFIAPI +InternalX86DisablePaging64 ( + IN UINT16 Cs, + IN UINT32 EntryPoint, + IN UINT32 Context1, OPTIONAL + IN UINT32 Context2, OPTIONAL + IN UINT32 NewStack + ); + + +#elif defined (MDE_CPU_IPF) +// +// +// IPF specific functions +// + +/** + Transfers control to a function starting with a new stack. + + Transfers control to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + If EntryPoint is NULL, then ASSERT(). + If NewStack is NULL, then ASSERT(). + + @param EntryPoint A pointer to function to call with the new stack. + @param Context1 A pointer to the context to pass into the EntryPoint + function. + @param Context2 A pointer to the context to pass into the EntryPoint + function. + @param NewStack A pointer to the new stack to use for the EntryPoint + function. + @param NewBsp A pointer to the new memory location for RSE backing + store. + +**/ +VOID +EFIAPI +AsmSwitchStackAndBackingStore ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack, + IN VOID *NewBsp + ); +#else + +#endif + +#endif diff --git a/OldMdePkg/Library/BaseLib/BitField.c b/OldMdePkg/Library/BaseLib/BitField.c new file mode 100644 index 0000000000..3db8a23c95 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/BitField.c @@ -0,0 +1,867 @@ +/** @file
+ Bit field functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BitField.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that returns a bit field from Operand
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+
+ @return The bit field read.
+
+**/
+unsigned int
+BitFieldReadUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return (Operand & ~((unsigned int)-2 << EndBit)) >> StartBit;
+}
+
+/**
+ Worker function that reads a bit field from Operand, performs a bitwise OR,
+ and returns the result.
+
+ Performs a bitwise OR between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new value is returned.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new value.
+
+**/
+unsigned int
+BitFieldOrUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int OrData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand | ((OrData << StartBit) & ~((unsigned int) -2 << EndBit));
+}
+
+/**
+ Worker function that reads a bit field from Operand, performs a bitwise AND,
+ and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new value is returned.
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ @param AndData The value to And with the read value from the value
+
+ @return The new value.
+
+**/
+unsigned int
+BitFieldAndUint (
+ IN unsigned int Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN unsigned int AndData
+ )
+{
+ //
+ // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]
+ // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.
+ //
+ return Operand & ~((~AndData << StartBit) & ~((unsigned int) -2 << EndBit));
+}
+
+/**
+ Returns a bit field from an 8-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The bit field read.
+
+**/
+UINT8
+EFIAPI
+BitFieldRead8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an 8-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 8-bit value is
+ returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldWrite8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr8 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAnd8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT8)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAndThenOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr8 (
+ BitFieldAnd8 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 16-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The bit field read.
+
+**/
+UINT16
+EFIAPI
+BitFieldRead16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 16-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 16-bit value is
+ returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldWrite16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr16 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAnd16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT16)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAndThenOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr16 (
+ BitFieldAnd16 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 32-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read.
+
+**/
+UINT32
+EFIAPI
+BitFieldRead32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldReadUint (Operand, StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to a 32-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 32-bit value is
+ returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldWrite32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr32 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldOrUint (Operand, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAnd32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)BitFieldAndUint (Operand, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAndThenOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr32 (
+ BitFieldAnd32 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
+
+/**
+ Returns a bit field from a 64-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The bit field read.
+
+**/
+UINT64
+EFIAPI
+BitFieldRead64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return RShiftU64 (Operand & ~LShiftU64 ((UINT64)-2, EndBit), StartBit);
+}
+
+/**
+ Writes a bit field to a 64-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 64-bit value is
+ returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldWrite64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldAndThenOr64 (Operand, StartBit, EndBit, 0, Value);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ UINT64 Value1;
+ UINT64 Value2;
+
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+
+ Value1 = LShiftU64 (OrData, StartBit);
+ Value2 = LShiftU64 ((UINT64) - 2, EndBit);
+
+ return Operand | (Value1 & ~Value2);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAnd64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ UINT64 Value1;
+ UINT64 Value2;
+
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+
+ Value1 = LShiftU64 (~AndData, StartBit);
+ Value2 = LShiftU64 ((UINT64)-2, EndBit);
+
+ return Operand & ~(Value1 & ~Value2);
+}
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAndThenOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (Operand) * 8);
+ ASSERT (StartBit <= EndBit);
+ return BitFieldOr64 (
+ BitFieldAnd64 (Operand, StartBit, EndBit, AndData),
+ StartBit,
+ EndBit,
+ OrData
+ );
+}
diff --git a/OldMdePkg/Library/BaseLib/CheckSum.c b/OldMdePkg/Library/BaseLib/CheckSum.c new file mode 100644 index 0000000000..e851164998 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/CheckSum.c @@ -0,0 +1,334 @@ +/** @file
+ Utility functions to generate checksum based on 2's complement
+ algorithm.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CheckSum.c
+
+**/
+
+/**
+ Calculate the sum of all elements in a buffer in unit of UINT8.
+ During calculation, the carry bits are dropped.
+
+ This function calculates the sum of all elements in a buffer
+ in unit of UINT8. The carry bits in result of addition are dropped.
+ The result is returned as UINT8. If Length is Zero, then Zero is
+ returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer .
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT8
+EFIAPI
+CalculateSum8 (
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT8 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = (UINT8) (Sum + *(Buffer + Count));
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer
+ of 8-bit values.
+
+ This function first calculates the sum of the 8-bit values in the
+ buffer specified by Buffer and Length. The carry bits in the result
+ of addition are dropped. Then, the two's complement of the sum is
+ returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT8
+EFIAPI
+CalculateCheckSum8 (
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT8 CheckSum;
+
+ CheckSum = CalculateSum8 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT8) (0x100 - CheckSum);
+}
+
+/**
+ Returns the sum of all elements in a buffer of 16-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 16-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 16-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT16
+EFIAPI
+CalculateSum16 (
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT16 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN) Buffer & 0x1) == 0);
+ ASSERT ((Length & 0x1) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = (UINT16) (Sum + *(Buffer + Count));
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 16-bit values.
+
+ This function first calculates the sum of the 16-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT16
+EFIAPI
+CalculateCheckSum16 (
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT16 CheckSum;
+
+ CheckSum = CalculateSum16 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT16) (0x10000 - CheckSum);
+}
+
+
+/**
+ Returns the sum of all elements in a buffer of 32-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 32-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 32-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT32
+EFIAPI
+CalculateSum32 (
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT32 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN) Buffer & 0x3) == 0);
+ ASSERT ((Length & 0x3) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = Sum + *(Buffer + Count);
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 32-bit values.
+
+ This function first calculates the sum of the 32-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT32
+EFIAPI
+CalculateCheckSum32 (
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT32 CheckSum;
+
+ CheckSum = CalculateSum32 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT32) ((UINT32)(-1) - CheckSum + 1);
+}
+
+
+/**
+ Returns the sum of all elements in a buffer of 64-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 64-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 64-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT64
+EFIAPI
+CalculateSum64 (
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT64 Sum;
+ UINTN Count;
+
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN) Buffer & 0x7) == 0);
+ ASSERT ((Length & 0x7) == 0);
+ ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));
+
+ for (Sum = 0, Count = 0; Count < Length; Count++) {
+ Sum = Sum + *(Buffer + Count);
+ }
+
+ return Sum;
+}
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 64-bit values.
+
+ This function first calculates the sum of the 64-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT64
+EFIAPI
+CalculateCheckSum64 (
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT64 CheckSum;
+
+ CheckSum = CalculateSum64 (Buffer, Length);
+
+ //
+ // Return the checksum based on 2's complement.
+ //
+ return (UINT64) ((UINT64)(-1) - CheckSum + 1);
+}
+
+
diff --git a/OldMdePkg/Library/BaseLib/Cpu.c b/OldMdePkg/Library/BaseLib/Cpu.c new file mode 100644 index 0000000000..cc7a608f83 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Cpu.c @@ -0,0 +1,67 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Cpu.c
+
+**/
+
+/**
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ @retval TRUE CPU interrupts were enabled on entry to this call.
+ @retval FALSE CPU interrupts were disabled on entry to this call.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndDisableInterrupts (
+ VOID
+ )
+{
+ BOOLEAN InterruptState;
+
+ InterruptState = GetInterruptState ();
+ DisableInterrupts ();
+ return InterruptState;
+}
+
+/**
+ Set the current CPU interrupt state.
+
+ Sets the current CPU interrupt state to the state specified by
+ InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+ InterruptState is FALSE, then interrupts are disabled. InterruptState is
+ returned.
+
+ @param InterruptState TRUE if interrupts should enabled. FALSE if
+ interrupts should be disabled.
+
+ @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+SetInterruptState (
+ IN BOOLEAN InterruptState
+ )
+{
+ if (InterruptState) {
+ EnableInterrupts ();
+ } else {
+ DisableInterrupts ();
+ }
+ return InterruptState;
+}
diff --git a/OldMdePkg/Library/BaseLib/CpuDeadLoop.c b/OldMdePkg/Library/BaseLib/CpuDeadLoop.c new file mode 100644 index 0000000000..f8f530207a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/CpuDeadLoop.c @@ -0,0 +1,33 @@ +/** @file
+ Base Library CPU Functions for all architectures.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+/**
+ Executes an infinite loop.
+
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip
+ past the loop and the code that follows the loop must execute properly. This
+ implies that the infinite loop must not cause the code that follow it to be
+ optimized away.
+
+**/
+VOID
+EFIAPI
+CpuDeadLoop (
+ VOID
+ )
+{
+ volatile UINTN Index;
+
+ for (Index = 0; Index == 0;);
+}
diff --git a/OldMdePkg/Library/BaseLib/DivS64x64Remainder.c b/OldMdePkg/Library/BaseLib/DivS64x64Remainder.c new file mode 100644 index 0000000000..efa091088e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/DivS64x64Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit signed
+ value Divisor and generates a 64-bit signed quotient. If Remainder is not
+ NULL, then the 64-bit signed remainder is returned in Remainder. This
+ function returns the 64-bit signed quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+DivS64x64Remainder (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemS64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/OldMdePkg/Library/BaseLib/DivU64x32.c b/OldMdePkg/Library/BaseLib/DivU64x32.c new file mode 100644 index 0000000000..b223c6c87b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/DivU64x32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivU64x32 (Dividend, Divisor);
+}
diff --git a/OldMdePkg/Library/BaseLib/DivU64x32Remainder.c b/OldMdePkg/Library/BaseLib/DivU64x32Remainder.c new file mode 100644 index 0000000000..e7a3094c6e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/DivU64x32Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32Remainder (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x32 (Dividend, Divisor, Remainder);
+}
diff --git a/OldMdePkg/Library/BaseLib/DivU64x64Remainder.c b/OldMdePkg/Library/BaseLib/DivU64x64Remainder.c new file mode 100644 index 0000000000..c39537e4fb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/DivU64x64Remainder.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x64Remainder (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathDivRemU64x64 (Dividend, Divisor, Remainder);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c b/OldMdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c new file mode 100644 index 0000000000..352e1c7c1f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ebc/CpuBreakpoint.c @@ -0,0 +1,164 @@ +/** @file
+ Base Library CPU Functions for EBC
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+extern
+UINT64
+_break (
+ CHAR8 BreakCode
+ );
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ _break (3);
+}
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+}
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+ return FALSE;
+}
+
+/**
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+**/
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ )
+{
+ EnableInterrupts ();
+ DisableInterrupts ();
+}
+
+/**
+ Requests CPU to pause for a short period of time.
+
+ Requests CPU to pause for a short period of time. Typically used in MP
+ systems to prevent memory starvation while waiting for a spin lock.
+
+**/
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ )
+{
+}
+
+/**
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+**/
+VOID
+EFIAPI
+CpuFlushTlb (
+ VOID
+ )
+{
+ ASSERT (FALSE);
+}
+
+/**
+ Places the CPU in a sleep state until an interrupt is received.
+
+ Places the CPU in a sleep state until an interrupt is received. If interrupts
+ are disabled prior to calling this function, then the CPU will be placed in a
+ sleep state indefinitely.
+
+**/
+VOID
+EFIAPI
+CpuSleep (
+ VOID
+ )
+{
+}
diff --git a/OldMdePkg/Library/BaseLib/Ebc/SetJumpLongJump.c b/OldMdePkg/Library/BaseLib/Ebc/SetJumpLongJump.c new file mode 100644 index 0000000000..b485d3e495 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ebc/SetJumpLongJump.c @@ -0,0 +1,78 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetJumpLongJump.c
+
+**/
+
+/**
+ Worker function that checks ASSERT condition for JumpBuffer
+
+ Checks ASSERT condition for JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+**/
+VOID
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+/**
+ Saves the current CPU context that can be restored with a call to LongJump() and returns 0.
+
+ Saves the current CPU context in the buffer specified by JumpBuffer and returns 0. The initial
+ call to SetJump() must always return 0. Subsequent calls to LongJump() cause a non-zero
+ value to be returned by SetJump().
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+**/
+UINTN
+EFIAPI
+SetJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ InternalAssertJumpBuffer (JumpBuffer);
+ return 0;
+}
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer.
+ This function never returns to the caller.
+ Instead is resumes execution based on the state of JumpBuffer.
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is restored.
+
+**/
+VOID
+EFIAPI
+InternalLongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ //
+ // This function cannot work on EBC
+ //
+ ASSERT (FALSE);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ebc/SwitchStack.c b/OldMdePkg/Library/BaseLib/Ebc/SwitchStack.c new file mode 100644 index 0000000000..d2861c4f85 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ebc/SwitchStack.c @@ -0,0 +1,64 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return.
+ Marker will be ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param Marker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+InternalSwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VA_LIST Marker
+ )
+
+{
+ //
+ // This version of this function does not actually change the stack pointer
+ // This is to support compilation of CPU types that do not support assemblers
+ // such as EBC
+ //
+
+ //
+ // Stack should be aligned with CPU_STACK_ALIGNMENT
+ //
+ ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
+
+ EntryPoint (Context1, Context2);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ebc/Synchronization.c b/OldMdePkg/Library/BaseLib/Ebc/Synchronization.c new file mode 100644 index 0000000000..5d5bc2ff11 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ebc/Synchronization.c @@ -0,0 +1,99 @@ +/** @file
+ Implementation of synchronization functions on EBC.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ return *Value != CompareValue ? *Value :
+ ((*Value = ExchangeValue), CompareValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN volatile UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ return *Value != CompareValue ? *Value :
+ ((*Value = ExchangeValue), CompareValue);
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ )
+{
+ return ++*Value;
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decrement value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decrement value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ )
+{
+ return --*Value;
+}
diff --git a/OldMdePkg/Library/BaseLib/GetPowerOfTwo32.c b/OldMdePkg/Library/BaseLib/GetPowerOfTwo32.c new file mode 100644 index 0000000000..a639fd4a6d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/GetPowerOfTwo32.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 32-bit value. Equivalent to
+ 1 << HighBitSet32(x).
+
+ This function computes the value of the highest bit set in the 32-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return 1 << HighBitSet32(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT32
+EFIAPI
+GetPowerOfTwo32 (
+ IN UINT32 Operand
+ )
+{
+ if (Operand == 0) {
+ return 0;
+ }
+
+ return 1ul << HighBitSet32 (Operand);
+}
diff --git a/OldMdePkg/Library/BaseLib/GetPowerOfTwo64.c b/OldMdePkg/Library/BaseLib/GetPowerOfTwo64.c new file mode 100644 index 0000000000..52d148c924 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/GetPowerOfTwo64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the value of the highest bit set in a 64-bit value. Equivalent to
+ 1 << HighBitSet64(x).
+
+ This function computes the value of the highest bit set in the 64-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return 1 << HighBitSet64(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT64
+EFIAPI
+GetPowerOfTwo64 (
+ IN UINT64 Operand
+ )
+{
+ if (Operand == 0) {
+ return 0;
+ }
+
+ return LShiftU64 (1, HighBitSet64 (Operand));
+}
diff --git a/OldMdePkg/Library/BaseLib/HighBitSet32.c b/OldMdePkg/Library/BaseLib/HighBitSet32.c new file mode 100644 index 0000000000..5ab4d7fe8d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/HighBitSet32.c @@ -0,0 +1,44 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 32-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return - 1;
+ }
+ for (BitIndex = 31; (INT32)Operand > 0; BitIndex--, Operand <<= 1);
+ return BitIndex;
+}
diff --git a/OldMdePkg/Library/BaseLib/HighBitSet64.c b/OldMdePkg/Library/BaseLib/HighBitSet64.c new file mode 100644 index 0000000000..6b3c585f37 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/HighBitSet64.c @@ -0,0 +1,52 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the highest bit set in a 64-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ if (Operand == (UINT32)Operand) {
+ //
+ // Operand is just a 32-bit integer
+ //
+ return HighBitSet32 ((UINT32)Operand);
+ }
+
+ //
+ // Operand is really a 64-bit integer
+ //
+ if (sizeof (UINTN) == sizeof (UINT32)) {
+ return HighBitSet32 (((UINT32*)&Operand)[1]) + 32;
+ } else {
+ return HighBitSet32 ((UINT32)RShiftU64 (Operand, 32)) + 32;
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.S b/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.S new file mode 100644 index 0000000000..5498d2e991 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ARShiftU64.asm
+#
+# Abstract:
+#
+# 64-bit arithmetic right shift function for IA-32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathARShiftU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathARShiftU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathARShiftU64):
+ movb 12(%esp), %cl
+ movl 8(%esp), %eax
+ cltd
+ testb $32, %cl
+ cmovz %eax, %edx
+ cmovz 4(%esp), %eax
+ shrdl %cl, %edx, %eax
+ sar %cl, %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.asm b/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.asm new file mode 100644 index 0000000000..17f07bb66c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ARShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit arithmetic right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathARShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathARShiftU64 PROC
+ mov cl, [esp + 12]
+ mov eax, [esp + 8]
+ cdq
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ sar edx, cl
+ ret
+InternalMathARShiftU64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.c b/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.c new file mode 100644 index 0000000000..01e0bdf7a2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ARShiftU64.c @@ -0,0 +1,33 @@ +/** @file
+ 64-bit arithmetic right shift function for IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov eax, dword ptr [Operand + 4]
+ cdq
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, dword ptr [Operand + 0]
+ shrd eax, edx, cl
+ sar edx, cl
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S b/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S new file mode 100644 index 0000000000..e82434b670 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuBreakpoint.s
+#
+# Abstract:
+#
+# CpuBreakpoint function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuBreakpoint)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuBreakpoint (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuBreakpoint):
+ int $3
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm b/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm new file mode 100644 index 0000000000..a4d397874d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_CpuBreakpoint PROC
+ int 3
+ ret
+_CpuBreakpoint ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c b/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c new file mode 100644 index 0000000000..fc5b63734b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c @@ -0,0 +1,30 @@ +/** @file
+ CpuBreakpoint function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+void __debugbreak ();
+
+#pragma intrinsic(__debugbreak)
+
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __debugbreak ();
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S b/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S new file mode 100644 index 0000000000..f8b1cdc7ee --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuFlushTlb.Asm
+#
+# Abstract:
+#
+# CpuFlushTlb function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuFlushTlb)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuFlushTlb (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuFlushTlb):
+ movl %cr3, %eax
+ movl %eax, %cr3
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm b/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm new file mode 100644 index 0000000000..4f0c4f9944 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuFlushTlb PROC
+ mov eax, cr3
+ mov cr3, eax ; moving to CR3 flushes TLB
+ ret
+CpuFlushTlb ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c b/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c new file mode 100644 index 0000000000..2eea64d05c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c @@ -0,0 +1,26 @@ +/** @file
+ CpuFlushTlb function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+CpuFlushTlb (
+ VOID
+ )
+{
+ _asm {
+ mov eax, cr3
+ mov cr3, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuId.S b/OldMdePkg/Library/BaseLib/Ia32/CpuId.S new file mode 100644 index 0000000000..6f41e72227 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuId.S @@ -0,0 +1,63 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuId.Asm
+#
+# Abstract:
+#
+# AsmCpuid function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmCpuid)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmCpuid (
+# IN UINT32 RegisterInEax,
+# OUT UINT32 *RegisterOutEax OPTIONAL,
+# OUT UINT32 *RegisterOutEbx OPTIONAL,
+# OUT UINT32 *RegisterOutEcx OPTIONAL,
+# OUT UINT32 *RegisterOutEdx OPTIONAL
+# )
+#------------------------------------------------------------------------------
+ASM_PFX(AsmCpuid):
+ push %ebx
+ push %ebp
+ movl %esp, %ebp
+ movl 12(%ebp), %eax
+ cpuid
+ push %ecx
+ movl 16(%ebp), %ecx
+ jecxz L1
+ movl %eax, (%ecx)
+L1:
+ movl 20(%ebp), %ecx
+ jecxz L2
+ movl %ebx, (%ecx)
+L2:
+ movl 24(%ebp), %ecx
+ jecxz L3
+ popl (%ecx)
+L3:
+ movl 28(%ebp), %ecx
+ jecxz L4
+ movl %edx, (%ecx)
+L4:
+ movl 12(%ebp), %eax
+ leave
+ pop %ebx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuId.asm b/OldMdePkg/Library/BaseLib/Ia32/CpuId.asm new file mode 100644 index 0000000000..5c0eb1ffc8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuId.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmCpuid (
+; IN UINT32 RegisterInEax,
+; OUT UINT32 *RegisterOutEax OPTIONAL,
+; OUT UINT32 *RegisterOutEbx OPTIONAL,
+; OUT UINT32 *RegisterOutEcx OPTIONAL,
+; OUT UINT32 *RegisterOutEdx OPTIONAL
+; );
+;------------------------------------------------------------------------------
+AsmCpuid PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 16]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ pop [ecx]
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuid ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuId.c b/OldMdePkg/Library/BaseLib/Ia32/CpuId.c new file mode 100644 index 0000000000..64b215a462 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuId.c @@ -0,0 +1,49 @@ +/** @file
+ AsmCpuid function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT32
+EFIAPI
+AsmCpuid (
+ IN UINT32 Index,
+ OUT UINT32 *RegisterEax, OPTIONAL
+ OUT UINT32 *RegisterEbx, OPTIONAL
+ OUT UINT32 *RegisterEcx, OPTIONAL
+ OUT UINT32 *RegisterEdx OPTIONAL
+ )
+{
+ _asm {
+ mov eax, Index
+ cpuid
+ push ecx
+ mov ecx, RegisterEax
+ jecxz SkipEax
+ mov [ecx], eax
+SkipEax:
+ mov ecx, RegisterEbx
+ jecxz SkipEbx
+ mov [ecx], ebx
+SkipEbx:
+ pop eax
+ mov ecx, RegisterEcx
+ jecxz SkipEcx
+ mov [ecx], eax
+SkipEcx:
+ mov ecx, RegisterEdx
+ jecxz SkipEdx
+ mov [ecx], edx
+SkipEdx:
+ mov eax, Index
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.S b/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.S new file mode 100644 index 0000000000..48554cc96b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.S @@ -0,0 +1,67 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuIdEx.Asm +# +# Abstract: +# +# AsmCpuidEx function +# +# Notes: +# +#------------------------------------------------------------------------------ + + .686: + .code: + +#------------------------------------------------------------------------------ +# UINT32 +# EFIAPI +# AsmCpuidEx ( +# IN UINT32 RegisterInEax, +# IN UINT32 RegisterInEcx, +# OUT UINT32 *RegisterOutEax OPTIONAL, +# OUT UINT32 *RegisterOutEbx OPTIONAL, +# OUT UINT32 *RegisterOutEcx OPTIONAL, +# OUT UINT32 *RegisterOutEdx OPTIONAL +# ) +#------------------------------------------------------------------------------ +.globl ASM_PFX(AsmCpuidEx) +ASM_PFX(AsmCpuidEx): + push %ebx + push %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + movl 16(%ebp), %ecx + cpuid + push %ecx + movl 20(%ebp), %ecx + jecxz L1 + movl %eax, (%ecx) +L1: + movl 24(%ebp), %ecx + jecxz L2 + movl %ebx, (%ecx) +L2: + movl 28(%ebp), %ecx + jecxz L3 + popl (%ecx) +L3: + movl 32(%ebp), %edx + jecxz L4 + movl %edx, (%ecx) +L4: + movl 12(%ebp), %eax + leave + pop %ebx + ret diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.asm b/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.asm new file mode 100644 index 0000000000..cdebec2114 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.asm @@ -0,0 +1,68 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuIdEx.Asm
+; +; Abstract: +; +; AsmCpuidEx function
+; +; Notes: +; +;------------------------------------------------------------------------------ + + .686
+ .model flat,C
+ .code + +;------------------------------------------------------------------------------ +; UINT32 +; EFIAPI +; AsmCpuidEx (
+; IN UINT32 RegisterInEax, +; IN UINT32 RegisterInEcx, +; OUT UINT32 *RegisterOutEax OPTIONAL, +; OUT UINT32 *RegisterOutEbx OPTIONAL, +; OUT UINT32 *RegisterOutEcx OPTIONAL, +; OUT UINT32 *RegisterOutEdx OPTIONAL +; ) +;------------------------------------------------------------------------------ +AsmCpuidEx PROC USES ebx
+ push ebp
+ mov ebp, esp
+ mov eax, [ebp + 12]
+ mov ecx, [ebp + 16]
+ cpuid
+ push ecx
+ mov ecx, [ebp + 20]
+ jecxz @F
+ mov [ecx], eax
+@@:
+ mov ecx, [ebp + 24]
+ jecxz @F
+ mov [ecx], ebx
+@@:
+ mov ecx, [ebp + 28]
+ jecxz @F
+ pop [ecx]
+@@:
+ mov edx, [ebp + 32]
+ jecxz @F
+ mov [ecx], edx
+@@:
+ mov eax, [ebp + 12]
+ leave
+ ret
+AsmCpuidEx ENDP
+ + END diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.c b/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.c new file mode 100644 index 0000000000..8e475d833d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuIdEx.c @@ -0,0 +1,50 @@ +/** @file
+ AsmCpuidEx function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT32
+EFIAPI
+AsmCpuidEx (
+ IN UINT32 Index,
+ IN UINT32 SubIndex,
+ OUT UINT32 *RegisterEax, OPTIONAL
+ OUT UINT32 *RegisterEbx, OPTIONAL
+ OUT UINT32 *RegisterEcx, OPTIONAL
+ OUT UINT32 *RegisterEdx OPTIONAL
+ )
+{
+ _asm {
+ mov eax, Index
+ mov ecx, SubIndex
+ cpuid
+ push ecx
+ mov ecx, RegisterEax
+ jecxz SkipEax
+ mov [ecx], eax
+SkipEax:
+ mov ecx, RegisterEbx
+ jecxz SkipEbx
+ mov [ecx], ebx
+SkipEbx:
+ pop eax
+ mov ecx, RegisterEcx
+ jecxz SkipEcx
+ mov [ecx], eax
+SkipEcx:
+ mov ecx, RegisterEdx
+ jecxz SkipEdx
+ mov [ecx], edx
+SkipEdx:
+ mov eax, Index
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuPause.S b/OldMdePkg/Library/BaseLib/Ia32/CpuPause.S new file mode 100644 index 0000000000..5fef9c8d5c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuPause.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuPause.Asm
+#
+# Abstract:
+#
+# CpuPause function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuPause)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuPause (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuPause):
+ pause
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuPause.asm b/OldMdePkg/Library/BaseLib/Ia32/CpuPause.asm new file mode 100644 index 0000000000..4c7135fc9c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuPause.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuPause PROC
+ pause
+ ret
+CpuPause ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuPause.c b/OldMdePkg/Library/BaseLib/Ia32/CpuPause.c new file mode 100644 index 0000000000..0a4c101884 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuPause.c @@ -0,0 +1,25 @@ +/** @file
+ CpuPause function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ )
+{
+ _asm {
+ pause
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.S b/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.S new file mode 100644 index 0000000000..ac39e8fcba --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuSleep.Asm
+#
+# Abstract:
+#
+# CpuSleep function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(CpuSleep)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuSleep (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(CpuSleep):
+ hlt
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.asm b/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.asm new file mode 100644 index 0000000000..8a779f7017 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuSleep PROC
+ hlt
+ ret
+CpuSleep ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.c b/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.c new file mode 100644 index 0000000000..fa00381bd0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/CpuSleep.c @@ -0,0 +1,25 @@ +/** @file
+ CpuSleep function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+CpuSleep (
+ VOID
+ )
+{
+ _asm {
+ hlt
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.S b/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.S new file mode 100644 index 0000000000..ea04225fd6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisableInterrupts.Asm
+#
+# Abstract:
+#
+# DisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(DisableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# DisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(DisableInterrupts):
+ cli
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm b/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm new file mode 100644 index 0000000000..35209ff0d4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+DisableInterrupts PROC
+ cli
+ ret
+DisableInterrupts ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.c b/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.c new file mode 100644 index 0000000000..5d694090f6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DisableInterrupts.c @@ -0,0 +1,25 @@ +/** @file
+ DisableInterrupts function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ cli
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.S b/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.S new file mode 100644 index 0000000000..7898e8103a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.S @@ -0,0 +1,52 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisablePaging32.Asm
+#
+# Abstract:
+#
+# InternalX86DisablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86DisablePaging32)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86DisablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86DisablePaging32):
+ movl 4(%esp), %ebx
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ pushfl
+ pop %edi
+ cli
+ movl %cr0, %eax
+ btrl $31, %eax
+ movl 16(%esp), %esp
+ movl %eax, %cr0
+ push %edi
+ popfl
+ push %edx
+ push %ecx
+ call *%ebx
+ jmp .
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.asm b/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.asm new file mode 100644 index 0000000000..d2949773b3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging32.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86DisablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ ; EntryPoint() should not return
+InternalX86DisablePaging32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.c b/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.c new file mode 100644 index 0000000000..58597ce133 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DisablePaging32.c @@ -0,0 +1,46 @@ +/** @file
+ AsmDisablePaging32 function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+__declspec (naked)
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ _asm {
+ push ebp
+ mov ebp, esp
+ mov ebx, EntryPoint
+ mov ecx, Context1
+ mov edx, Context2
+ pushfd
+ pop edi // save EFLAGS to edi
+ cli
+ mov eax, cr0
+ btr eax, 31
+ mov esp, NewStack
+ mov cr0, eax
+ push edi
+ popfd // restore EFLAGS from edi
+ push edx
+ push ecx
+ call ebx
+ jmp $ // EntryPoint() should not return
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c b/OldMdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c new file mode 100644 index 0000000000..1dfac5d317 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c @@ -0,0 +1,54 @@ +/** @file
+ Integer division worker functions for Ia32.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DivS64x64Remainder.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+/**
+ Worker function that Divides a 64-bit signed integer by a 64-bit signed integer and
+ generates a 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ INT64 Quot;
+
+ Quot = InternalMathDivRemU64x64 (
+ Dividend >= 0 ? Dividend : -Dividend,
+ Divisor >= 0 ? Divisor : -Divisor,
+ (UINT64 *) Remainder
+ );
+ if (Remainder != NULL && Dividend < 0) {
+ *Remainder = -*Remainder;
+ }
+ return (Dividend ^ Divisor) >= 0 ? Quot : -Quot;
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.S b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.S new file mode 100644 index 0000000000..b858278e64 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# DivU64x32.asm +# +# Abstract: +# +# Calculate the quotient of a 64-bit integer by a 32-bit integer +# +#------------------------------------------------------------------------------ + +.globl ASM_PFX(InternalMathDivU64x32) + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# InternalMathDivU64x32 ( +# IN UINT64 Dividend, +# IN UINT32 Divisor +# ); +#------------------------------------------------------------------------------ +ASM_PFX(InternalMathDivU64x32): + movl 8(%esp), %eax + movl 12(%esp), %ecx + xorl %edx, %edx + divl %ecx + push %eax + movl 8(%esp), %eax + divl %ecx + pop %edx + ret diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.asm b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.asm new file mode 100644 index 0000000000..25ca074ad9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+InternalMathDivU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, [esp + 8]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ ret
+InternalMathDivU64x32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.c b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.c new file mode 100644 index 0000000000..7ec3c2d985 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32.c @@ -0,0 +1,33 @@ +/** @file
+ Calculate the quotient of a 64-bit integer by a 32-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ _asm {
+ mov eax, dword ptr [Dividend + 4]
+ mov ecx, Divisor
+ xor edx, edx
+ div ecx
+ push eax ; save quotient on stack
+ mov eax, dword ptr [Dividend]
+ div ecx
+ pop edx ; restore high-order dword of the quotient
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S new file mode 100644 index 0000000000..974373d284 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivError.asm
+#
+# Abstract:
+#
+# Set error flag for all division functions
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathDivRemU64x32)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivRemU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor,
+# OUT UINT32 *Remainder
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivRemU64x32):
+ movl 12(%esp), %ecx
+ movl 8(%esp), %eax
+ xorl %edx, %edx
+ divl %ecx
+ push %eax
+ movl 8(%esp), %eax
+ divl %ecx
+ movl 20(%esp), %ecx
+ jecxz L1
+ movl %edx, (%ecx)
+L1:
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm new file mode 100644 index 0000000000..e025b22c2d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm @@ -0,0 +1,51 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivError.asm
+;
+; Abstract:
+;
+; Set error flag for all division functions
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor,
+; OUT UINT32 *Remainder
+; );
+;------------------------------------------------------------------------------
+InternalMathDivRemU64x32 PROC
+ mov ecx, [esp + 12] ; ecx <- divisor
+ mov eax, [esp + 8] ; eax <- dividend[32..63]
+ xor edx, edx
+ div ecx ; eax <- quotient[32..63], edx <- remainder
+ push eax
+ mov eax, [esp + 8] ; eax <- dividend[0..31]
+ div ecx ; eax <- quotient[0..31]
+ mov ecx, [esp + 20] ; ecx <- Remainder
+ jecxz @F ; abandon remainder if Remainder == NULL
+ mov [ecx], edx
+@@:
+ pop edx ; edx <- quotient[32..63]
+ ret
+InternalMathDivRemU64x32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c new file mode 100644 index 0000000000..8f74930618 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c @@ -0,0 +1,38 @@ +/** @file
+ Set error flag for all division functions
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder
+ )
+{
+ _asm {
+ mov ecx, Divisor
+ mov eax, dword ptr [Dividend + 4]
+ xor edx, edx
+ div ecx
+ push eax
+ mov eax, dword ptr [Dividend + 0]
+ div ecx
+ mov ecx, Remainder
+ jecxz RemainderNull // abandon remainder if Remainder == NULL
+ mov [ecx], edx
+RemainderNull:
+ pop edx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S b/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S new file mode 100644 index 0000000000..cac7169d58 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S @@ -0,0 +1,89 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x64Remainder.asm
+#
+# Abstract:
+#
+# Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+# both the quotient and the remainder
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathDivRemU64x32), ASM_PFX(InternalMathDivRemU64x64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathDivRemU64x64 (
+# IN UINT64 Dividend,
+# IN UINT64 Divisor,
+# OUT UINT64 *Remainder OPTIONAL
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathDivRemU64x64):
+ movl 16(%esp), %ecx
+ testl %ecx, %ecx
+ jnz Hard
+ movl 20(%esp), %ecx
+ jecxz L1
+ and $0, 4(%ecx)
+ movl %ecx, 16(%esp)
+L1:
+ jmp ASM_PFX(InternalMathDivRemU64x32)
+Hard:
+ push %ebx
+ push %esi
+ push %edi
+ mov 20(%esp), %edx
+ mov 16(%esp), %eax
+ movl %edx, %edi
+ movl %eax, %esi
+ mov 24(%esp), %ebx
+L2:
+ shrl %edx
+ rcrl $1, %eax
+ shrdl $1, %ecx, %ebx
+ shrl %ecx
+ jnz L2
+ divl %ebx
+ movl %eax, %ebx
+ movl 28(%esp), %ecx
+ mull 24(%esp)
+ imull %ebx, %ecx
+ addl %ecx, %edx
+ mov 32(%esp), %ecx
+ jc TooLarge
+ cmpl %edx, %edi
+ ja Correct
+ jb TooLarge
+ cmpl %eax, %esi
+ jae Correct
+TooLarge:
+ decl %ebx
+ jecxz Return
+ sub 24(%esp), %eax
+ sbb 28(%esp), %edx
+Correct:
+ jecxz Return
+ subl %eax, %esi
+ sbbl %edx, %edi
+ movl %esi, (%ecx)
+ movl %edi, 4(%ecx)
+Return:
+ movl %ebx, %eax
+ xorl %edx, %edx
+ pop %edi
+ pop %esi
+ pop %ebx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm b/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm new file mode 100644 index 0000000000..95e57efac1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm @@ -0,0 +1,92 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x64Remainder.asm
+;
+; Abstract:
+;
+; Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+; both the quotient and the remainder
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+EXTERN InternalMathDivRemU64x32:PROC
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathDivRemU64x64 (
+; IN UINT64 Dividend,
+; IN UINT64 Divisor,
+; OUT UINT64 *Remainder OPTIONAL
+; );
+;------------------------------------------------------------------------------
+InternalMathDivRemU64x64 PROC
+ mov ecx, [esp + 16] ; ecx <- divisor[32..63]
+ test ecx, ecx
+ jnz _@DivRemU64x64 ; call _@DivRemU64x64 if Divisor > 2^32
+ mov ecx, [esp + 20]
+ jecxz @F
+ and dword ptr [ecx + 4], 0 ; zero high dword of remainder
+ mov [esp + 16], ecx ; set up stack frame to match DivRemU64x32
+@@:
+ jmp InternalMathDivRemU64x32
+InternalMathDivRemU64x64 ENDP
+
+_@DivRemU64x64 PROC USES ebx esi edi
+ mov edx, dword ptr [esp + 20]
+ mov eax, dword ptr [esp + 16] ; edx:eax <- dividend
+ mov edi, edx
+ mov esi, eax ; edi:esi <- dividend
+ mov ebx, dword ptr [esp + 24] ; ecx:ebx <- divisor
+@@:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz @B
+ div ebx
+ mov ebx, eax ; ebx <- quotient
+ mov ecx, [esp + 28] ; ecx <- high dword of divisor
+ mul dword ptr [esp + 24] ; edx:eax <- quotient * divisor[0..31]
+ imul ecx, ebx ; ecx <- quotient * divisor[32..63]
+ add edx, ecx ; edx <- (quotient * divisor)[32..63]
+ mov ecx, dword ptr [esp + 32] ; ecx <- addr for Remainder
+ jc @TooLarge ; product > 2^64
+ cmp edi, edx ; compare high 32 bits
+ ja @Correct
+ jb @TooLarge ; product > dividend
+ cmp esi, eax
+ jae @Correct ; product <= dividend
+@TooLarge:
+ dec ebx ; adjust quotient by -1
+ jecxz @Return ; return if Remainder == NULL
+ sub eax, dword ptr [esp + 24]
+ sbb edx, dword ptr [esp + 28] ; edx:eax <- (quotient - 1) * divisor
+@Correct:
+ jecxz @Return
+ sub esi, eax
+ sbb edi, edx ; edi:esi <- remainder
+ mov [ecx], esi
+ mov [ecx + 4], edi
+@Return:
+ mov eax, ebx ; eax <- quotient
+ xor edx, edx ; quotient is 32 bits long
+ ret
+_@DivRemU64x64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c b/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c new file mode 100644 index 0000000000..14b2f2789b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c @@ -0,0 +1,66 @@ +/** @file
+ Calculate the quotient of a 64-bit integer by a 64-bit integer and returns
+ both the quotient and the remainderSet error flag for all division functions
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ )
+{
+ _asm {
+ mov edx, dword ptr [Dividend + 4]
+ mov eax, dword ptr [Dividend + 0] // edx:eax <- dividend
+ mov edi, edx
+ mov esi, eax // edi:esi <- dividend
+ mov ecx, dword ptr [Divisor + 4]
+ mov ebx, dword ptr [Divisor + 0] // ecx:ebx <- divisor
+BitLoop:
+ shr edx, 1
+ rcr eax, 1
+ shrd ebx, ecx, 1
+ shr ecx, 1
+ jnz BitLoop
+ div ebx
+ mov ebx, eax // ebx <- quotient
+ mov ecx, dword ptr [Divisor + 4]
+ mul dword ptr [Divisor]
+ imul ecx, ebx
+ add edx, ecx
+ mov ecx, Remainder
+ jc TooLarge // product > 2^64
+ cmp edi, edx // compare high 32 bits
+ ja Correct
+ jb TooLarge // product > dividend
+ cmp esi, eax
+ jae Correct // product <= dividend
+TooLarge:
+ dec ebx // adjust quotient by -1
+ jecxz Return // return if Remainder == NULL
+ sub eax, dword ptr [Divisor + 0]
+ sbb edx, dword ptr [Divisor + 4]
+Correct:
+ jecxz Return
+ sub esi, eax
+ sbb edi, edx // edi:esi <- remainder
+ mov [ecx], esi
+ mov [ecx + 4], edi
+Return:
+ mov eax, ebx // eax <- quotient
+ xor edx, edx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S b/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S new file mode 100644 index 0000000000..c5742aee53 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableDisableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableDisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(EnableDisableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableDisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(EnableDisableInterrupts):
+ sti
+ cli
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm b/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..fe2016da87 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+_EnableDisableInterrupts ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c b/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c new file mode 100644 index 0000000000..fe6ebf78dc --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c @@ -0,0 +1,28 @@ +/** @file
+ EnableDisableInterrupts function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ sti
+ nop
+ nop
+ cli
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.S b/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.S new file mode 100644 index 0000000000..2d608036f7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnableInterrupts.Asm
+#
+# Abstract:
+#
+# EnableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(EnableInterrupts)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# EnableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(EnableInterrupts):
+ sti
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm b/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm new file mode 100644 index 0000000000..194dd8f935 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_EnableInterrupts PROC
+ sti
+ ret
+_EnableInterrupts ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.c b/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.c new file mode 100644 index 0000000000..2770e637b5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnableInterrupts.c @@ -0,0 +1,25 @@ +/** @file
+ EnableInterrupts function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ _asm {
+ sti
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.S b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.S new file mode 100644 index 0000000000..df5d67cfac --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.S @@ -0,0 +1,52 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging32.Asm
+#
+# Abstract:
+#
+# InternalX86EnablePaging32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86EnablePaging32)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86EnablePaging32 (
+# IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+# IN VOID *Context1, OPTIONAL
+# IN VOID *Context2, OPTIONAL
+# IN VOID *NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86EnablePaging32):
+ movl 4(%esp), %ebx
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ pushfl
+ pop %edi
+ cli
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl 16(%esp), %esp
+ movl %eax, %cr0
+ push %edi
+ popfl
+ push %edx
+ push %ecx
+ call *%ebx
+ jmp .
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.asm b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.asm new file mode 100644 index 0000000000..ae98b93285 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.asm @@ -0,0 +1,57 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging32.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging32 (
+; IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+; IN VOID *Context1, OPTIONAL
+; IN VOID *Context2, OPTIONAL
+; IN VOID *NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging32 PROC
+ mov ebx, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ pushfd
+ pop edi ; save flags in edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, [esp + 16]
+ mov cr0, eax
+ push edi
+ popfd ; restore flags
+ push edx
+ push ecx
+ call ebx
+ jmp $
+InternalX86EnablePaging32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.c b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.c new file mode 100644 index 0000000000..7aecd01790 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging32.c @@ -0,0 +1,46 @@ +/** @file
+ AsmEnablePaging32 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+__declspec (naked)
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ _asm {
+ push ebp
+ mov ebp, esp
+ mov ebx, EntryPoint
+ mov ecx, Context1
+ mov edx, Context2
+ pushfd
+ pop edi
+ cli
+ mov eax, cr0
+ bts eax, 31
+ mov esp, NewStack
+ mov cr0, eax
+ push edi
+ popfd
+ push edx
+ push ecx
+ call ebx
+ jmp $
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnablePaging64.S b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging64.S new file mode 100644 index 0000000000..ffa9beb0a1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging64.S @@ -0,0 +1,63 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# EnablePaging64.Asm
+#
+# Abstract:
+#
+# InternalX86EnablePaging64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86EnablePaging64)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86EnablePaging64 (
+# IN UINT16 CodeSelector,
+# IN UINT64 EntryPoint,
+# IN UINT64 Context1, OPTIONAL
+# IN UINT64 Context2, OPTIONAL
+# IN UINT64 NewStack
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86EnablePaging64):
+ cli
+ movl $LongStart, (%esp)
+ movl %cr4, %eax
+ orb $0x20, %al
+ movl %eax, %cr4 # enable PAE
+ movl $0xc0000080, %ecx
+ rdmsr
+ orb $1, %ah # set LME
+ wrmsr
+ movl %cr0, %eax
+ btsl $31, %eax
+ movl %eax, %cr0 # enable paging
+ lret
+LongStart: # long mode starts here
+ .byte 0x67, 0x48
+ movl (%esp), %ebx # mov rbx, [esp]
+ .byte 0x67, 0x48
+ movl 8(%esp), %ecx # mov rcx, [esp + 8]
+ .byte 0x67, 0x48
+ movl 0x10(%esp), %edx # mov rdx, [esp + 10h]
+ .byte 0x67, 0x48
+ movl 0x18(%esp), %esp # mov rsp, [esp + 18h]
+ .byte 0x48
+ addl $0x-20, %esp # add rsp, -20h
+ call *%ebx # call rbx
+ jmp .
diff --git a/OldMdePkg/Library/BaseLib/Ia32/EnablePaging64.asm b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging64.asm new file mode 100644 index 0000000000..435bb39105 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/EnablePaging64.asm @@ -0,0 +1,68 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging64 (
+; IN UINT16 Cs,
+; IN UINT64 EntryPoint,
+; IN UINT64 Context1, OPTIONAL
+; IN UINT64 Context2, OPTIONAL
+; IN UINT64 NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging64 PROC
+ cli
+ mov [esp], @F ; offset for far retf, seg is the 1st arg
+ mov eax, cr4
+ or al, (1 SHL 5)
+ mov cr4, eax ; enable PAE
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov eax, cr0
+ bts eax, 31 ; set PG
+ mov cr0, eax ; enable paging
+ retf ; topmost 2 dwords hold the address
+@@: ; long mode starts here
+ DB 67h, 48h ; 32-bit address size, 64-bit operand size
+ mov ebx, [esp] ; mov rbx, [esp]
+ DB 67h, 48h
+ mov ecx, [esp + 8] ; mov rcx, [esp + 8]
+ DB 67h, 48h
+ mov edx, [esp + 10h] ; mov rdx, [esp + 10h]
+ DB 67h, 48h
+ mov esp, [esp + 18h] ; mov rsp, [esp + 18h]
+ DB 48h
+ add esp, -20h ; add rsp, -20h
+ call ebx ; call rbx
+ hlt ; no one should get here
+InternalX86EnablePaging64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.S b/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.S new file mode 100644 index 0000000000..07a92619d2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FlushCacheLine.Asm
+#
+# Abstract:
+#
+# AsmFlushCacheLine function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmFlushCacheLine)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmFlushCacheLine (
+# IN VOID *LinearAddress
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmFlushCacheLine):
+ movl 4(%esp), %eax
+ clflush (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm b/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm new file mode 100644 index 0000000000..f4ad87de7b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ mov eax, [esp + 4]
+ clflush [eax]
+ ret
+AsmFlushCacheLine ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.c new file mode 100644 index 0000000000..4b3c7f7b62 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FlushCacheLine.c @@ -0,0 +1,26 @@ +/** @file
+ AsmFlushCacheLine function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID *
+EFIAPI
+AsmFlushCacheLine (
+ IN VOID *LinearAddress
+ )
+{
+ _asm {
+ mov eax, LinearAddress
+ clflush [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FxRestore.S b/OldMdePkg/Library/BaseLib/Ia32/FxRestore.S new file mode 100644 index 0000000000..9cfa14be0f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FxRestore.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxRestore.Asm
+#
+# Abstract:
+#
+# InternalX86FxRestore function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86FxRestore)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86FxRestore (
+# IN CONST IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86FxRestore):
+ movl 4(%esp), %eax
+ fxrstor (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FxRestore.asm b/OldMdePkg/Library/BaseLib/Ia32/FxRestore.asm new file mode 100644 index 0000000000..5def311700 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FxRestore.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxRestore PROC
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxrstor [eax]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FxRestore.c b/OldMdePkg/Library/BaseLib/Ia32/FxRestore.c new file mode 100644 index 0000000000..155a1599b1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FxRestore.c @@ -0,0 +1,26 @@ +/** @file
+ AsmFxRestore function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalX86FxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ _asm {
+ mov eax, Buffer
+ fxrstor [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FxSave.S b/OldMdePkg/Library/BaseLib/Ia32/FxSave.S new file mode 100644 index 0000000000..8857a8ec77 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FxSave.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# FxSave.Asm
+#
+# Abstract:
+#
+# InternalX86FxSave function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86FxSave)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86FxSave (
+# OUT IA32_FX_BUFFER *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86FxSave):
+ movl 4(%esp), %eax
+ fxsave (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FxSave.asm b/OldMdePkg/Library/BaseLib/Ia32/FxSave.asm new file mode 100644 index 0000000000..d3a9f9cd48 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FxSave.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxSave PROC
+ mov eax, [esp + 4] ; Buffer must be 16-byte aligned
+ fxsave [eax]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/FxSave.c b/OldMdePkg/Library/BaseLib/Ia32/FxSave.c new file mode 100644 index 0000000000..9a013e11be --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/FxSave.c @@ -0,0 +1,26 @@ +/** @file
+ AsmFxSave function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalX86FxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ _asm {
+ mov eax, Buffer
+ fxsave [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S new file mode 100644 index 0000000000..a0a6ad9eb0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange32.Asm
+#
+# Abstract:
+#
+# InternalSyncCompareExchange32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncCompareExchange32)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalSyncCompareExchange32 (
+# IN UINT32 *Value,
+# IN UINT32 CompareValue,
+# IN UINT32 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncCompareExchange32):
+ movl 4(%esp), %ecx
+ movl 8(%esp), %eax
+ movl 12(%esp), %edx
+ lock
+ cmpxchgl %edx, (%ecx)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..47d959fa6a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov ecx, [esp + 4]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ lock cmpxchg [ecx], edx
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c new file mode 100644 index 0000000000..07be35e1df --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c @@ -0,0 +1,30 @@ +/** @file
+ InterlockedCompareExchange32 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ _asm {
+ mov ecx, Value
+ mov eax, CompareValue
+ mov edx, ExchangeValue
+ lock cmpxchg [ecx], edx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S new file mode 100644 index 0000000000..98a20a5e29 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S @@ -0,0 +1,47 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange64.Asm
+#
+# Abstract:
+#
+# InternalSyncCompareExchange64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncCompareExchange64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalSyncCompareExchange64 (
+# IN UINT64 *Value,
+# IN UINT64 CompareValue,
+# IN UINT64 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncCompareExchange64):
+ push %esi
+ push %ebx
+ movl 12(%esp), %esi
+ movl 16(%esp), %eax
+ movl 20(%esp), %edx
+ movl 24(%esp), %ebx
+ movl 28(%esp), %ecx
+ lock
+ cmpxchg8b (%esi)
+ pop %ebx
+ pop %esi
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..18311e77d3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalSyncCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC USES esi ebx
+ mov esi, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov ebx, [esp + 24]
+ mov ecx, [esp + 28]
+ lock cmpxchg8b qword ptr [esi]
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c new file mode 100644 index 0000000000..d3747bed2c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c @@ -0,0 +1,31 @@ +/** @file
+ InterlockedCompareExchange64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ _asm {
+ mov esi, Value
+ mov eax, dword ptr [CompareValue + 0]
+ mov edx, dword ptr [CompareValue + 4]
+ mov ebx, dword ptr [ExchangeValue + 0]
+ mov ecx, dword ptr [ExchangeValue + 4]
+ lock cmpxchg8b qword ptr [esi]
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S b/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S new file mode 100644 index 0000000000..dc8f7215cc --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedDecrement.Asm
+#
+# Abstract:
+#
+# InternalSyncDecrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncDecrement)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalSyncDecrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncDecrement):
+ movl 4(%esp), %eax
+ lock
+ decl (%eax)
+ movl (%eax), %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm b/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm new file mode 100644 index 0000000000..082429e520 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ mov eax, [esp + 4]
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c b/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c new file mode 100644 index 0000000000..c3854e96be --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c @@ -0,0 +1,26 @@ +/** @file
+ InterlockedDecrement function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN UINT32 *Value
+ )
+{
+ _asm {
+ mov eax, Value
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S b/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S new file mode 100644 index 0000000000..ecbbc7540c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedIncrement.Asm
+#
+# Abstract:
+#
+# InternalSyncIncrement function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalSyncIncrement)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalSyncIncrement (
+# IN UINT32 *Value
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalSyncIncrement):
+ movl 4(%esp), %eax
+ lock
+ incl (%eax)
+ movl (%eax), %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm b/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm new file mode 100644 index 0000000000..ea27e666ca --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ mov eax, [esp + 4]
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c b/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c new file mode 100644 index 0000000000..4fa35c6e08 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c @@ -0,0 +1,27 @@ +/** @file
+ InterLockedIncrement function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN UINT32 *Value
+ )
+{
+ _asm {
+ mov eax, Value
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c b/OldMdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c new file mode 100644 index 0000000000..c918f9f571 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c @@ -0,0 +1,65 @@ +/** @file
+ SwitchStack() function for IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: InternalSwitchStack.c
+
+**/
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return.
+ Marker will be ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param Marker VA_LIST marker for the variable argument list.
+
+**/
+VOID
+EFIAPI
+InternalSwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VA_LIST Marker
+ )
+{
+ BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
+
+ //
+ // Stack should be aligned with CPU_STACK_ALIGNMENT
+ //
+ ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
+
+ JumpBuffer.Eip = (UINTN)EntryPoint;
+ JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);
+ JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2);
+ ((VOID**)JumpBuffer.Esp)[1] = Context1;
+ ((VOID**)JumpBuffer.Esp)[2] = Context2;
+
+ LongJump (&JumpBuffer, (UINTN)-1);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Invd.S b/OldMdePkg/Library/BaseLib/Ia32/Invd.S new file mode 100644 index 0000000000..0a0c1a244a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Invd.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Invd.Asm
+#
+# Abstract:
+#
+# AsmInvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmInvd)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmInvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmInvd):
+ invd
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Invd.asm b/OldMdePkg/Library/BaseLib/Ia32/Invd.asm new file mode 100644 index 0000000000..5767f54848 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Invd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+_AsmInvd PROC
+ invd
+ ret
+_AsmInvd ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Invd.c b/OldMdePkg/Library/BaseLib/Ia32/Invd.c new file mode 100644 index 0000000000..2fdfd28e22 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Invd.c @@ -0,0 +1,25 @@ +/** @file
+ AsmInvd function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmInvd (
+ VOID
+ )
+{
+ _asm {
+ invd
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LRotU64.S b/OldMdePkg/Library/BaseLib/Ia32/LRotU64.S new file mode 100644 index 0000000000..3b866e2700 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LRotU64.S @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LRotU64.asm
+#
+# Abstract:
+#
+# 64-bit left rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathLRotU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathLRotU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathLRotU64):
+ push %ebx
+ movb 16(%esp), %cl
+ movl 12(%esp), %edx
+ movl 8(%esp), %eax
+ shldl %cl, %edx, %ebx
+ shldl %cl, %eax, %edx
+ rorl %cl, %ebx
+ shldl %cl, %ebx, %eax
+ testb $32, %cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LRotU64.asm b/OldMdePkg/Library/BaseLib/Ia32/LRotU64.asm new file mode 100644 index 0000000000..a6437d868f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LRotU64.asm @@ -0,0 +1,49 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LRotU64.asm
+;
+; Abstract:
+;
+; 64-bit left rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathLRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathLRotU64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LRotU64.c b/OldMdePkg/Library/BaseLib/Ia32/LRotU64.c new file mode 100644 index 0000000000..7761b9549b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LRotU64.c @@ -0,0 +1,36 @@ +/** @file
+ 64-bit left rotation for Ia32
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov edx, dword ptr [Operand + 4]
+ mov eax, dword ptr [Operand + 0]
+ shld ebx, edx, cl
+ shld edx, eax, cl
+ ror ebx, cl
+ shld eax, ebx, cl
+ test cl, 32 ; Count >= 32?
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.S b/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.S new file mode 100644 index 0000000000..a4b99eb80a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# LShiftU64.asm +# +# Abstract: +# +# 64-bit left shift function for IA-32 +# +#------------------------------------------------------------------------------ + +.globl ASM_PFX(InternalMathLShiftU64) + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# InternalMathLShiftU64 ( +# IN UINT64 Operand, +# IN UINTN Count +# ); +#------------------------------------------------------------------------------ +ASM_PFX(InternalMathLShiftU64): + movb 12(%esp), %cl + xorl %eax, %eax + movl 4(%esp), %edx + testb $32, %cl + cmovz %edx, %eax + cmovz 0x8(%esp), %edx + shld %cl, %eax, %edx + shl %cl, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.asm b/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.asm new file mode 100644 index 0000000000..6c3d9a4ee6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit left shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathLShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathLShiftU64 PROC
+ mov cl, [esp + 12]
+ xor eax, eax
+ mov edx, [esp + 4]
+ test cl, 32 ; Count >= 32?
+ cmovz eax, edx
+ cmovz edx, [esp + 8]
+ shld edx, eax, cl
+ shl eax, cl
+ ret
+InternalMathLShiftU64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.c b/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.c new file mode 100644 index 0000000000..193a41222f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LShiftU64.c @@ -0,0 +1,33 @@ +/** @file
+ 64-bit left shift function for IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ xor eax, eax
+ mov edx, dword ptr [Operand + 0]
+ test cl, 32 // Count >= 32?
+ cmovz eax, edx
+ cmovz edx, dword ptr [Operand + 4]
+ shld edx, eax, cl
+ shl eax, cl
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LongJump.S b/OldMdePkg/Library/BaseLib/Ia32/LongJump.S new file mode 100644 index 0000000000..0b76896085 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LongJump.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# LongJump.Asm +# +# Abstract: +# +# Implementation of _LongJump() on IA-32. +# +#------------------------------------------------------------------------------ + +.globl ASM_PFX(InternalLongJump) + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalLongJump ( +# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, +# IN UINTN Value +# ); +#------------------------------------------------------------------------------ +ASM_PFX(InternalLongJump): + pop %eax + pop %edx + pop %eax + movl (%edx), %ebx + movl 4(%edx), %esi + movl 8(%edx), %edi + movl 12(%edx), %ebp + movl 16(%edx), %esp + jmp *20(%edx) diff --git a/OldMdePkg/Library/BaseLib/Ia32/LongJump.asm b/OldMdePkg/Library/BaseLib/Ia32/LongJump.asm new file mode 100644 index 0000000000..0309f6ae71 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LongJump.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of _LongJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalLongJump (
+; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+InternalLongJump PROC
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20] ; restore "eip"
+InternalLongJump ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/LongJump.c b/OldMdePkg/Library/BaseLib/Ia32/LongJump.c new file mode 100644 index 0000000000..0e58625a65 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/LongJump.c @@ -0,0 +1,35 @@ +/** @file
+ Implementation of _LongJump() on IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+__declspec (naked)
+VOID
+EFIAPI
+InternalLongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ _asm {
+ pop eax ; skip return address
+ pop edx ; edx <- JumpBuffer
+ pop eax ; eax <- Value
+ mov ebx, [edx]
+ mov esi, [edx + 4]
+ mov edi, [edx + 8]
+ mov ebp, [edx + 12]
+ mov esp, [edx + 16]
+ jmp dword ptr [edx + 20]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.S b/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.S new file mode 100644 index 0000000000..00dc6a08ab --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.S @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DivU64x32.S
+#
+# Abstract:
+#
+# Calculate the remainder of a 64-bit integer by a 32-bit integer
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathModU64x32)
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InternalMathModU64x32 (
+# IN UINT64 Dividend,
+# IN UINT32 Divisor
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathModU64x32):
+ movl 8(%esp), %eax
+ movl 12(%esp), %ecx
+ xorl %edx, %edx
+ divl %ecx
+ movl 4(%esp), %eax
+ divl %ecx
+ movl %edx, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.asm b/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.asm new file mode 100644 index 0000000000..9e5f9aeda9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DivU64x32.asm
+;
+; Abstract:
+;
+; Calculate the remainder of a 64-bit integer by a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalMathModU64x32 (
+; IN UINT64 Dividend,
+; IN UINT32 Divisor
+; );
+;------------------------------------------------------------------------------
+InternalMathModU64x32 PROC
+ mov eax, [esp + 8]
+ mov ecx, [esp + 12]
+ xor edx, edx
+ div ecx
+ mov eax, [esp + 4]
+ div ecx
+ mov eax, edx
+ ret
+InternalMathModU64x32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.c b/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.c new file mode 100644 index 0000000000..f935632f6b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ModU64x32.c @@ -0,0 +1,31 @@ +/** @file
+ Calculate the remainder of a 64-bit integer by a 32-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ _asm {
+ mov eax, dword ptr [Dividend + 4]
+ mov ecx, Divisor
+ xor edx, edx
+ div ecx
+ mov eax, dword ptr [Dividend + 0]
+ div ecx
+ mov eax, edx
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Monitor.S b/OldMdePkg/Library/BaseLib/Ia32/Monitor.S new file mode 100644 index 0000000000..6e9284dcd4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Monitor.S @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Monitor.Asm
+#
+# Abstract:
+#
+# AsmMonitor function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmMonitor)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMonitor (
+# IN UINTN Eax,
+# IN UINTN Ecx,
+# IN UINTN Edx
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmMonitor):
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ movl 12(%esp), %edx
+ monitor %eax, %ecx, %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Monitor.asm b/OldMdePkg/Library/BaseLib/Ia32/Monitor.asm new file mode 100644 index 0000000000..174bd7665f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Monitor.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+AsmMonitor PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ mov edx, [esp + 12]
+ DB 0fh, 1, 0c8h ; monitor
+ ret
+AsmMonitor ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Monitor.c b/OldMdePkg/Library/BaseLib/Ia32/Monitor.c new file mode 100644 index 0000000000..e1f52b99be --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Monitor.c @@ -0,0 +1,32 @@ +/** @file
+ AsmMonitor function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmMonitor (
+ IN UINTN RegisterEax,
+ IN UINTN RegisterEcx,
+ IN UINTN RegisterEdx
+ )
+{
+ _asm {
+ mov eax, RegisterEax
+ mov ecx, RegisterEcx
+ mov edx, RegisterEdx
+ _emit 0x0f // monitor
+ _emit 0x01
+ _emit 0xc8
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.S b/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.S new file mode 100644 index 0000000000..b9d1eb8ca7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# MultU64x32.asm +# +# Abstract: +# +# Calculate the product of a 64-bit integer and a 32-bit integer +# +#------------------------------------------------------------------------------ + + .386: + .code: + +.globl ASM_PFX(InternalMathMultU64x32) + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# InternalMathMultU64x32 ( +# IN UINT64 Multiplicand, +# IN UINT32 Multiplier +# ); +#------------------------------------------------------------------------------ +ASM_PFX(InternalMathMultU64x32): + movl 12(%esp), %ecx + movl %ecx, %eax + imull 8(%esp), %ecx + mull 0x4(%esp) + addl %ecx, %edx + ret diff --git a/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.asm b/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.asm new file mode 100644 index 0000000000..9c9ef06996 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x32.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and a 32-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x32 (
+; IN UINT64 Multiplicand,
+; IN UINT32 Multiplier
+; );
+;------------------------------------------------------------------------------
+InternalMathMultU64x32 PROC
+ mov ecx, [esp + 12]
+ mov eax, ecx
+ imul ecx, [esp + 8] ; overflow not detectable
+ mul dword ptr [esp + 4]
+ add edx, ecx
+ ret
+InternalMathMultU64x32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.c b/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.c new file mode 100644 index 0000000000..ea0643d830 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/MultU64x32.c @@ -0,0 +1,30 @@ +/** @file
+ Calculate the product of a 64-bit integer and a 32-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ _asm {
+ mov ecx, Multiplier
+ mov eax, ecx
+ imul ecx, dword ptr [Multiplicand + 4] // overflow not detectable
+ mul dword ptr [Multiplicand + 0]
+ add edx, ecx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.S b/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.S new file mode 100644 index 0000000000..03523865f6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.S @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# MultU64x64.asm
+#
+# Abstract:
+#
+# Calculate the product of a 64-bit integer and another 64-bit integer
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathMultU64x64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathMultU64x64 (
+# IN UINT64 Multiplicand,
+# IN UINT64 Multiplier
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathMultU64x64):
+ push %ebx
+ movl 8(%esp), %ebx
+ movl 16(%esp), %edx
+ movl %ebx, %ecx
+ movl %edx, %eax
+ imull 20(%esp), %ebx
+ imull 12(%esp), %edx
+ addl %edx, %ebx
+ mull %ecx
+ addl %ebx, %edx
+ pop %ebx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.asm b/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.asm new file mode 100644 index 0000000000..f3679548f1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; MultU64x64.asm
+;
+; Abstract:
+;
+; Calculate the product of a 64-bit integer and another 64-bit integer
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathMultU64x64 (
+; IN UINT64 Multiplicand,
+; IN UINT64 Multiplier
+; );
+;------------------------------------------------------------------------------
+InternalMathMultU64x64 PROC USES ebx
+ mov ebx, [esp + 8] ; ebx <- M1[0..31]
+ mov edx, [esp + 16] ; edx <- M2[0..31]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, [esp + 20] ; ebx <- M1[0..31] * M2[32..63]
+ imul edx, [esp + 12] ; edx <- M1[32..63] * M2[0..31]
+ add ebx, edx ; carries are abandoned
+ mul ecx ; edx:eax <- M1[0..31] * M2[0..31]
+ add edx, ebx ; carries are abandoned
+ ret
+InternalMathMultU64x64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.c b/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.c new file mode 100644 index 0000000000..a014b4406e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/MultU64x64.c @@ -0,0 +1,34 @@ +/** @file
+ Calculate the product of a 64-bit integer and another 64-bit integer
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ _asm {
+ mov ebx, dword ptr [Multiplicand + 0]
+ mov edx, dword ptr [Multiplier + 0]
+ mov ecx, ebx
+ mov eax, edx
+ imul ebx, dword ptr [Multiplier + 4]
+ imul edx, dword ptr [Multiplicand + 4]
+ add ebx, edx
+ mul ecx
+ add edx, ebx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Mwait.S b/OldMdePkg/Library/BaseLib/Ia32/Mwait.S new file mode 100644 index 0000000000..12f6a87511 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Mwait.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Mwait.Asm
+#
+# Abstract:
+#
+# AsmMwait function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmMwait)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmMwait (
+# IN UINTN Eax,
+# IN UINTN Ecx
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmMwait):
+ movl 4(%esp), %eax
+ movl 8(%esp), %ecx
+ mwait %eax, %ecx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Mwait.asm b/OldMdePkg/Library/BaseLib/Ia32/Mwait.asm new file mode 100644 index 0000000000..3e5f48c280 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Mwait.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+AsmMwait PROC
+ mov eax, [esp + 4]
+ mov ecx, [esp + 8]
+ DB 0fh, 1, 0c9h ; mwait
+ ret
+AsmMwait ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Mwait.c b/OldMdePkg/Library/BaseLib/Ia32/Mwait.c new file mode 100644 index 0000000000..0256f2c841 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Mwait.c @@ -0,0 +1,30 @@ +/** @file
+ AsmMwait function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmMwait (
+ IN UINTN RegisterEax,
+ IN UINTN RegisterEcx
+ )
+{
+ _asm {
+ mov eax, RegisterEax
+ mov ecx, RegisterEcx
+ _emit 0x0f // mwait
+ _emit 0x01
+ _emit 0xC9
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Non-existing.c b/OldMdePkg/Library/BaseLib/Ia32/Non-existing.c new file mode 100644 index 0000000000..89ba2f2ced --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Non-existing.c @@ -0,0 +1,60 @@ +/** @file
+ Non-existing BaseLib functions on Ia32
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+InternalX86DisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ //
+ // This function cannot work on IA32 platform
+ //
+ ASSERT (FALSE);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/RRotU64.S b/OldMdePkg/Library/BaseLib/Ia32/RRotU64.S new file mode 100644 index 0000000000..35935639b9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/RRotU64.S @@ -0,0 +1,46 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# RRotU64.asm
+#
+# Abstract:
+#
+# 64-bit right rotation for Ia32
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalMathRRotU64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# InternalMathRRotU64 (
+# IN UINT64 Operand,
+# IN UINTN Count
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalMathRRotU64):
+ push %ebx
+ movb 16(%esp), %cl
+ movl 8(%esp), %eax
+ movl 12(%esp), %edx
+ shrdl %cl, %eax, %ebx
+ shrdl %cl, %edx, %eax
+ roll %cl, %ebx
+ shrdl %cl, %ebx, %edx
+ testb $32, %cl
+ cmovnz %eax, %ecx
+ cmovnz %edx, %eax
+ cmovnz %ecx, %edx
+ pop %ebx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/RRotU64.asm b/OldMdePkg/Library/BaseLib/Ia32/RRotU64.asm new file mode 100644 index 0000000000..fe13abc0d5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/RRotU64.asm @@ -0,0 +1,49 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.asm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathRRotU64 PROC USES ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 ; Count >= 32?
+ cmovnz ecx, eax ; switch eax & edx if Count >= 32
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ ret
+InternalMathRRotU64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/RRotU64.c b/OldMdePkg/Library/BaseLib/Ia32/RRotU64.c new file mode 100644 index 0000000000..f91fc378a2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/RRotU64.c @@ -0,0 +1,36 @@ +/** @file
+ 64-bit right rotation for Ia32
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ mov eax, dword ptr [Operand + 0]
+ mov edx, dword ptr [Operand + 4]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 // Count >= 32?
+ cmovnz ecx, eax
+ cmovnz eax, edx
+ cmovnz edx, ecx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.S b/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.S new file mode 100644 index 0000000000..ca78394e39 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.S @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# RShiftU64.asm +# +# Abstract: +# +# 64-bit logical right shift function for IA-32 +# +#------------------------------------------------------------------------------ + + .686: + .code: + +.globl ASM_PFX(InternalMathRShiftU64) + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# InternalMathRShiftU64 ( +# IN UINT64 Operand, +# IN UINTN Count +# ); +#------------------------------------------------------------------------------ +ASM_PFX(InternalMathRShiftU64): + movb 12(%esp), %cl + xorl %edx, %edx + movl 8(%esp), %eax + testb $32, %cl + cmovz %eax, %edx + cmovz 0x4(%esp), %eax + shrdl %cl, %edx, %eax + shr %cl, %edx + ret diff --git a/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.asm b/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.asm new file mode 100644 index 0000000000..faa4e96771 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RShiftU64.asm
+;
+; Abstract:
+;
+; 64-bit logical right shift function for IA-32
+;
+;------------------------------------------------------------------------------
+
+ .686
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRShiftU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+InternalMathRShiftU64 PROC
+ mov cl, [esp + 12] ; cl <- Count
+ xor edx, edx
+ mov eax, [esp + 8]
+ test cl, 32 ; Count >= 32?
+ cmovz edx, eax
+ cmovz eax, [esp + 4]
+ shrd eax, edx, cl
+ shr edx, cl
+ ret
+InternalMathRShiftU64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.c b/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.c new file mode 100644 index 0000000000..cc878e878c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/RShiftU64.c @@ -0,0 +1,33 @@ +/** @file
+ 64-bit logical right shift function for IA-32
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ _asm {
+ mov cl, byte ptr [Count]
+ xor edx, edx
+ mov eax, dword ptr [Operand + 4]
+ test cl, 32
+ cmovz edx, eax
+ cmovz eax, dword ptr [Operand + 0]
+ shrd eax, edx, cl
+ shr edx, cl
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.S b/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.S new file mode 100644 index 0000000000..3433344b7b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr0.Asm
+#
+# Abstract:
+#
+# AsmReadCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr0)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr0):
+ movl %cr0, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.asm new file mode 100644 index 0000000000..a8fe4a7e89 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr0 PROC
+ mov eax, cr0
+ ret
+AsmReadCr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.c b/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.c new file mode 100644 index 0000000000..ce43048a36 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr0.c @@ -0,0 +1,24 @@ +/** @file
+ AsmReadCr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadCr0 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr0
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.S b/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.S new file mode 100644 index 0000000000..d308895367 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr2.Asm
+#
+# Abstract:
+#
+# AsmReadCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr2)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr2):
+ movl %cr2, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.asm new file mode 100644 index 0000000000..a6a9b8c08f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr2 PROC
+ mov eax, cr2
+ ret
+AsmReadCr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.c b/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.c new file mode 100644 index 0000000000..2a61e1bbb6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr2.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadCr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadCr2 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr2
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.S b/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.S new file mode 100644 index 0000000000..aaec1f01d0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr3.Asm
+#
+# Abstract:
+#
+# AsmReadCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr3)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr3):
+ movl %cr3, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.asm new file mode 100644 index 0000000000..97b9ee4b99 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr3 PROC
+ mov eax, cr3
+ ret
+AsmReadCr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.c b/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.c new file mode 100644 index 0000000000..c151accabb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr3.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadCr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadCr3 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, cr3
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.S b/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.S new file mode 100644 index 0000000000..442d359eda --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCr4.Asm
+#
+# Abstract:
+#
+# AsmReadCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCr4)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadCr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCr4):
+ movl %cr4, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.asm new file mode 100644 index 0000000000..a454903387 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr4 PROC
+ mov eax, cr4
+ ret
+AsmReadCr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.c b/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.c new file mode 100644 index 0000000000..c88dd311e1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCr4.c @@ -0,0 +1,27 @@ +/** @file
+ AsmReadCr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadCr4 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f // mov eax, cr4
+ _emit 0x20
+ _emit 0xE0
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCs.S b/OldMdePkg/Library/BaseLib/Ia32/ReadCs.S new file mode 100644 index 0000000000..a3ad69d304 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCs.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadCs.Asm
+#
+# Abstract:
+#
+# AsmReadCs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadCs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadCs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadCs):
+ movl %cs, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCs.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadCs.asm new file mode 100644 index 0000000000..68497e21fe --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCs PROC
+ mov eax, cs
+ ret
+AsmReadCs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadCs.c b/OldMdePkg/Library/BaseLib/Ia32/ReadCs.c new file mode 100644 index 0000000000..f93e16cb93 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadCs.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadCs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadCs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, cs
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.S new file mode 100644 index 0000000000..d4c61f1484 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr0.Asm
+#
+# Abstract:
+#
+# AsmReadDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr0)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr0):
+ movl %dr0, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.asm new file mode 100644 index 0000000000..8792ce40b9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr0 PROC
+ mov eax, dr0
+ ret
+AsmReadDr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.c new file mode 100644 index 0000000000..b3ff929552 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr0.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadDr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr0 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr0
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.S new file mode 100644 index 0000000000..27c5554257 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr1.Asm
+#
+# Abstract:
+#
+# AsmReadDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr1)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr1):
+ movl %dr1, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.asm new file mode 100644 index 0000000000..e924407d57 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr1 PROC
+ mov eax, dr1
+ ret
+AsmReadDr1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.c new file mode 100644 index 0000000000..6d9f8999b6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr1.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadDr1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr1 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr1
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.S new file mode 100644 index 0000000000..cca84b9efd --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr2.Asm
+#
+# Abstract:
+#
+# AsmReadDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr2)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr2):
+ movl %dr2, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.asm new file mode 100644 index 0000000000..bbbef7e2fa --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr2 PROC
+ mov eax, dr2
+ ret
+AsmReadDr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.c new file mode 100644 index 0000000000..638bf8f7ae --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr2.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadDr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr2 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr2
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.S new file mode 100644 index 0000000000..60b0550381 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr3.Asm
+#
+# Abstract:
+#
+# AsmReadDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr3)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr3):
+ movl %dr3, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.asm new file mode 100644 index 0000000000..af2e7a2689 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr3 PROC
+ mov eax, dr3
+ ret
+AsmReadDr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.c new file mode 100644 index 0000000000..82a3f860be --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr3.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadDr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr3 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr3
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.S new file mode 100644 index 0000000000..84883df971 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr4.Asm
+#
+# Abstract:
+#
+# AsmReadDr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr4)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr4):
+ movl %dr4, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.asm new file mode 100644 index 0000000000..606f26fe2a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr4 PROC
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 21h, 0e0h
+ ret
+AsmReadDr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.c new file mode 100644 index 0000000000..d68de88ba5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr4.c @@ -0,0 +1,27 @@ +/** @file
+ AsmReadDr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr4 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f
+ _emit 0x21
+ _emit 0xe0
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.S new file mode 100644 index 0000000000..5abb226b91 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr5.Asm
+#
+# Abstract:
+#
+# AsmReadDr5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr5)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr5 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr5):
+ movl %dr5, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.asm new file mode 100644 index 0000000000..091792dab9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr5 PROC
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 21h, 0e8h
+ ret
+AsmReadDr5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.c new file mode 100644 index 0000000000..175e6f641c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr5.c @@ -0,0 +1,27 @@ +/** @file
+ AsmReadDr5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr5 (
+ VOID
+ )
+{
+ __asm {
+ _emit 0x0f
+ _emit 0x21
+ _emit 0xe8
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.S new file mode 100644 index 0000000000..9594851c7e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr6.Asm
+#
+# Abstract:
+#
+# AsmReadDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr6)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr6):
+ movl %dr6, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.asm new file mode 100644 index 0000000000..479414b3e6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr6 PROC
+ mov eax, dr6
+ ret
+AsmReadDr6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.c new file mode 100644 index 0000000000..28a918283a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr6.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadDr6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr6 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr6
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.S new file mode 100644 index 0000000000..4ba13efcb4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDr7.Asm
+#
+# Abstract:
+#
+# AsmReadDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDr7)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadDr7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDr7):
+ movl %dr7, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.asm new file mode 100644 index 0000000000..7dee98121c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr7 PROC
+ mov eax, dr7
+ ret
+AsmReadDr7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.c new file mode 100644 index 0000000000..b0ac10fe96 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDr7.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadDr7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadDr7 (
+ VOID
+ )
+{
+ __asm {
+ mov eax, dr7
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDs.S b/OldMdePkg/Library/BaseLib/Ia32/ReadDs.S new file mode 100644 index 0000000000..c3dc8451ad --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDs.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadDs.Asm
+#
+# Abstract:
+#
+# AsmReadDs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadDs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadDs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadDs):
+ movl %ds, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDs.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadDs.asm new file mode 100644 index 0000000000..b8edcb6996 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDs PROC
+ mov eax, ds
+ ret
+AsmReadDs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadDs.c b/OldMdePkg/Library/BaseLib/Ia32/ReadDs.c new file mode 100644 index 0000000000..13990b5195 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadDs.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadDs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadDs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, ds
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.S b/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.S new file mode 100644 index 0000000000..ab5e522739 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEflags.Asm
+#
+# Abstract:
+#
+# AsmReadEflags function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadEflags)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadEflags (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadEflags):
+ pushfl
+ pop %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.asm new file mode 100644 index 0000000000..32d55b35b9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEflags PROC
+ pushfd
+ pop eax
+ ret
+AsmReadEflags ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.c b/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.c new file mode 100644 index 0000000000..c927d66a59 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadEflags.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadEflags function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmReadEflags (
+ VOID
+ )
+{
+ __asm {
+ pushfd
+ pop eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadEs.S b/OldMdePkg/Library/BaseLib/Ia32/ReadEs.S new file mode 100644 index 0000000000..26ed55d9e1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadEs.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadEs.Asm
+#
+# Abstract:
+#
+# AsmReadEs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadEs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadEs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadEs):
+ movl %es, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadEs.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadEs.asm new file mode 100644 index 0000000000..48f141748e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadEs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEs PROC
+ mov eax, es
+ ret
+AsmReadEs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadEs.c b/OldMdePkg/Library/BaseLib/Ia32/ReadEs.c new file mode 100644 index 0000000000..2fa183b00a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadEs.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadEs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadEs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, es
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadFs.S b/OldMdePkg/Library/BaseLib/Ia32/ReadFs.S new file mode 100644 index 0000000000..bd38c6ac10 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadFs.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadFs.Asm
+#
+# Abstract:
+#
+# AsmReadFs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadFs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadFs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadFs):
+ movl %fs, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadFs.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadFs.asm new file mode 100644 index 0000000000..ae87107599 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadFs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadFs PROC
+ mov eax, fs
+ ret
+AsmReadFs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadFs.c b/OldMdePkg/Library/BaseLib/Ia32/ReadFs.c new file mode 100644 index 0000000000..d142e4d370 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadFs.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadFs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadFs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, fs
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.S b/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.S new file mode 100644 index 0000000000..8869164606 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGdtr.Asm
+#
+# Abstract:
+#
+# InternalX86ReadGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86ReadGdtr)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86ReadGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86ReadGdtr):
+ movl 4(%esp), %eax
+ sgdt (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.asm new file mode 100644 index 0000000000..beacb62b0d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadGdtr PROC
+ mov eax, [esp + 4]
+ sgdt fword ptr [eax]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.c b/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.c new file mode 100644 index 0000000000..86bb10d12e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadGdtr.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadGdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalX86ReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ _asm {
+ mov eax, Gdtr
+ sgdt fword ptr [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadGs.S b/OldMdePkg/Library/BaseLib/Ia32/ReadGs.S new file mode 100644 index 0000000000..82b396661d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadGs.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadGs.Asm
+#
+# Abstract:
+#
+# AsmReadGs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadGs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadGs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadGs):
+ movl %gs, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadGs.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadGs.asm new file mode 100644 index 0000000000..93313b8998 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadGs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadGs PROC
+ mov eax, gs
+ ret
+AsmReadGs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadGs.c b/OldMdePkg/Library/BaseLib/Ia32/ReadGs.c new file mode 100644 index 0000000000..3cebfd60cb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadGs.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadGs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadGs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, gs
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.S b/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.S new file mode 100644 index 0000000000..0e5d32e3d8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadIdtr.Asm
+#
+# Abstract:
+#
+# InternalX86ReadIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(InternalX86ReadIdtr)
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86ReadIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(InternalX86ReadIdtr):
+ movl 4(%esp), %eax
+ sidt (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.asm new file mode 100644 index 0000000000..dc7d473507 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadIdtr (
+; OUT IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadIdtr PROC
+ mov eax, [esp + 4]
+ sidt fword ptr [eax]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.c b/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.c new file mode 100644 index 0000000000..e5885cce59 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadIdtr.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadIdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalX86ReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ _asm {
+ mov eax, Idtr
+ sidt fword ptr [eax]
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.S b/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.S new file mode 100644 index 0000000000..addb1757d0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadLdtr.Asm
+#
+# Abstract:
+#
+# AsmReadLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadLdtr)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadLdtr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadLdtr):
+ sldt %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.asm new file mode 100644 index 0000000000..449b7cfe99 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadLdtr PROC
+ sldt ax
+ ret
+AsmReadLdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.c b/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.c new file mode 100644 index 0000000000..0950f8bad5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadLdtr.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadLdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadLdtr (
+ VOID
+ )
+{
+ _asm {
+ sldt ax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.S new file mode 100644 index 0000000000..f191337f68 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm0.Asm
+#
+# Abstract:
+#
+# AsmReadMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm0)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm0 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm0):
+ push %eax
+ push %eax
+ movq %mm0, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.asm new file mode 100644 index 0000000000..e43c45fab4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm0 PROC
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ ret
+AsmReadMm0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.c new file mode 100644 index 0000000000..d42f95e8b5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm0.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm0 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm0
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.S new file mode 100644 index 0000000000..790541aaeb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm1.Asm
+#
+# Abstract:
+#
+# AsmReadMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm1)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm1 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm1):
+ push %eax
+ push %eax
+ movq %mm1, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.asm new file mode 100644 index 0000000000..9f92a44aa0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm1 PROC
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ ret
+AsmReadMm1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.c new file mode 100644 index 0000000000..e4d0e08b93 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm1.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm1 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm1
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.S new file mode 100644 index 0000000000..231d62c762 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm2.Asm
+#
+# Abstract:
+#
+# AsmReadMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm2)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm2 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm2):
+ push %eax
+ push %eax
+ movq %mm2, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.asm new file mode 100644 index 0000000000..38e4cb0047 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm2 PROC
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ ret
+AsmReadMm2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.c new file mode 100644 index 0000000000..c2e49209b8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm2.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm2 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm2
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.S new file mode 100644 index 0000000000..1e1f6dd684 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm3.Asm
+#
+# Abstract:
+#
+# AsmReadMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm3)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm3 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm3):
+ push %eax
+ push %eax
+ movq %mm3, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.asm new file mode 100644 index 0000000000..e646762bf3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm3 PROC
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ ret
+AsmReadMm3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.c new file mode 100644 index 0000000000..680db3be05 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm3.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm3 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm3
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.S new file mode 100644 index 0000000000..5da446befe --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm4.Asm
+#
+# Abstract:
+#
+# AsmReadMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm4)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm4 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm4):
+ push %eax
+ push %eax
+ movq %mm4, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.asm new file mode 100644 index 0000000000..8da079d82c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm4 PROC
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ ret
+AsmReadMm4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.c new file mode 100644 index 0000000000..b51619cb99 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm4.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm4 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm4
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.S new file mode 100644 index 0000000000..5528fe1812 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm5.Asm
+#
+# Abstract:
+#
+# AsmReadMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm5)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm5 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm5):
+ push %eax
+ push %eax
+ movq %mm5, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.asm new file mode 100644 index 0000000000..9d6b4746a6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm5 PROC
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ ret
+AsmReadMm5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.c new file mode 100644 index 0000000000..a502e38d96 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm5.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm5 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm5
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.S new file mode 100644 index 0000000000..5d9bd11269 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm6.Asm
+#
+# Abstract:
+#
+# AsmReadMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm6)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm6 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm6):
+ push %eax
+ push %eax
+ movq %mm6, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.asm new file mode 100644 index 0000000000..95c73f601b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm6 PROC
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ ret
+AsmReadMm6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.c new file mode 100644 index 0000000000..a97aae68ed --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm6.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm6 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm6
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.S new file mode 100644 index 0000000000..26866b6a09 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMm7.Asm
+#
+# Abstract:
+#
+# AsmReadMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMm7)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmReadMm7 (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMm7):
+ push %eax
+ push %eax
+ movq %mm7, (%esp)
+ pop %eax
+ pop %edx
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.asm new file mode 100644 index 0000000000..0bd3b9b61f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm7 PROC
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ ret
+AsmReadMm7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.c new file mode 100644 index 0000000000..4ae5d63de5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMm7.c @@ -0,0 +1,30 @@ +/** @file
+ AsmReadMm7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMm7 (
+ VOID
+ )
+{
+ _asm {
+ push eax
+ push eax
+ movq [esp], mm7
+ pop eax
+ pop edx
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.S b/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.S new file mode 100644 index 0000000000..505b7e688b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadMsr64.Asm
+#
+# Abstract:
+#
+# AsmReadMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadMsr64)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadMsr64 (
+# IN UINT32 Index
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadMsr64):
+ movl 4(%esp), %ecx
+ rdmsr
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.asm new file mode 100644 index 0000000000..9a3e11ccca --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT64 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr64 PROC
+ mov ecx, [esp + 4]
+ rdmsr
+ ret
+AsmReadMsr64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.c b/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.c new file mode 100644 index 0000000000..fb7554805e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadMsr64.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadMsr64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ )
+{
+ _asm {
+ mov ecx, Index
+ rdmsr
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.S b/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.S new file mode 100644 index 0000000000..055e99c25a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadPmc.Asm
+#
+# Abstract:
+#
+# AsmReadPmc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadPmc)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadPmc (
+# IN UINT32 PmcIndex
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadPmc):
+ movl 4(%esp), %ecx
+ rdpmc
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.asm new file mode 100644 index 0000000000..17156d4652 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+AsmReadPmc PROC
+ mov ecx, [esp + 4]
+ rdpmc
+ ret
+AsmReadPmc ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.c b/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.c new file mode 100644 index 0000000000..a8b647dfbd --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadPmc.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadPmc function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT32 PmcIndex
+ )
+{
+ _asm {
+ mov ecx, PmcIndex
+ rdpmc
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadSs.S b/OldMdePkg/Library/BaseLib/Ia32/ReadSs.S new file mode 100644 index 0000000000..4f15248f1a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadSs.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadSs.Asm
+#
+# Abstract:
+#
+# AsmReadSs function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadSs)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadSs (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadSs):
+ movl %ss, %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadSs.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadSs.asm new file mode 100644 index 0000000000..414353755f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadSs.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadSs PROC
+ mov eax, ss
+ ret
+AsmReadSs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadSs.c b/OldMdePkg/Library/BaseLib/Ia32/ReadSs.c new file mode 100644 index 0000000000..62ad42453d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadSs.c @@ -0,0 +1,26 @@ +/** @file
+ AsmReadSs function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadSs (
+ VOID
+ )
+{
+ __asm {
+ xor eax, eax
+ mov ax, ss
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadTr.S b/OldMdePkg/Library/BaseLib/Ia32/ReadTr.S new file mode 100644 index 0000000000..af12dd2f3f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadTr.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTr.Asm
+#
+# Abstract:
+#
+# AsmReadTr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadTr)
+
+#------------------------------------------------------------------------------
+# UINT16
+# EFIAPI
+# AsmReadTr (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadTr):
+ str %eax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadTr.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadTr.asm new file mode 100644 index 0000000000..4f4e64b186 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadTr.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTr PROC
+ str ax
+ ret
+AsmReadTr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadTr.c b/OldMdePkg/Library/BaseLib/Ia32/ReadTr.c new file mode 100644 index 0000000000..5068c7f0a6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadTr.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadTr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT16
+EFIAPI
+AsmReadTr (
+ VOID
+ )
+{
+ _asm {
+ str ax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.S b/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.S new file mode 100644 index 0000000000..cab29661ae --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# ReadTsc.Asm
+#
+# Abstract:
+#
+# AsmReadTsc function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(AsmReadTsc)
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmReadTsc (
+# VOID
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(AsmReadTsc):
+ rdtsc
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.asm b/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.asm new file mode 100644 index 0000000000..fff38292ef --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTsc PROC
+ rdtsc
+ ret
+AsmReadTsc ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.c b/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.c new file mode 100644 index 0000000000..2fa89f934d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/ReadTsc.c @@ -0,0 +1,25 @@ +/** @file
+ AsmReadTsc function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmReadTsc (
+ VOID
+ )
+{
+ _asm {
+ rdtsc
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/SetJump.S b/OldMdePkg/Library/BaseLib/Ia32/SetJump.S new file mode 100644 index 0000000000..c8993084ac --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/SetJump.S @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# SetJump.Asm
+#
+# Abstract:
+#
+# Implementation of SetJump() on IA-32.
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(SetJump), ASM_PFX(InternalAssertJumpBuffer)
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# SetJump (
+# OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+# );
+#------------------------------------------------------------------------------
+ASM_PFX(SetJump):
+ pushl 0x4(%esp)
+ call ASM_PFX(InternalAssertJumpBuffer)
+ pop %ecx
+ pop %ecx
+ movl (%esp), %edx
+ movl %ebx, (%edx)
+ movl %esi, 4(%edx)
+ movl %edi, 8(%edx)
+ movl %ebp, 12(%edx)
+ movl %esp, 16(%edx)
+ movl %ecx, 20(%edx)
+ xorl %eax, %eax
+ jmp *%ecx
diff --git a/OldMdePkg/Library/BaseLib/Ia32/SetJump.asm b/OldMdePkg/Library/BaseLib/Ia32/SetJump.asm new file mode 100644 index 0000000000..4b7b40c47a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/SetJump.asm @@ -0,0 +1,51 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on IA-32.
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+InternalAssertJumpBuffer PROTO C
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; SetJump (
+; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+; );
+;------------------------------------------------------------------------------
+SetJump PROC
+ push [esp + 4]
+ call InternalAssertJumpBuffer ; To validate JumpBuffer
+ pop ecx
+ pop ecx ; ecx <- return address
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx ; eip value to restore in LongJump
+ xor eax, eax
+ jmp ecx
+SetJump ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/SetJump.c b/OldMdePkg/Library/BaseLib/Ia32/SetJump.c new file mode 100644 index 0000000000..4f4dbca057 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/SetJump.c @@ -0,0 +1,44 @@ +/** @file
+ Implementation of SetJump() on IA-32.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+_declspec (naked)
+UINTN
+EFIAPI
+SetJump (
+ OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ _asm {
+ push [esp + 4]
+ call InternalAssertJumpBuffer
+ pop ecx
+ pop ecx
+ mov edx, [esp]
+ mov [edx], ebx
+ mov [edx + 4], esi
+ mov [edx + 8], edi
+ mov [edx + 12], ebp
+ mov [edx + 16], esp
+ mov [edx + 20], ecx
+ xor eax, eax
+ jmp ecx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.S b/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.S new file mode 100644 index 0000000000..c15ca444f0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuId.Asm +# +# Abstract: +# +# AsmCpuid function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# InternalMathSwapBytes64 ( +# IN UINT64 Operand +# ); +#------------------------------------------------------------------------------ +.globl ASM_PFX(InternalMathSwapBytes64) +ASM_PFX(InternalMathSwapBytes64): + movl 8(%esp), %eax + movl 4(%esp), %edx + bswapl %eax + bswapl %edx + ret diff --git a/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.asm b/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.asm new file mode 100644 index 0000000000..7647880202 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuId.Asm
+;
+; Abstract:
+;
+; AsmCpuid function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathSwapBytes64 (
+; IN UINT64 Operand
+; );
+;------------------------------------------------------------------------------
+InternalMathSwapBytes64 PROC
+ mov eax, [esp + 8] ; eax <- upper 32 bits
+ mov edx, [esp + 4] ; edx <- lower 32 bits
+ bswap eax
+ bswap edx
+ ret
+InternalMathSwapBytes64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.c b/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.c new file mode 100644 index 0000000000..1dd6adb68d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/SwapBytes64.c @@ -0,0 +1,28 @@ +/** @file
+ Implementation of 64-bit swap bytes
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ _asm {
+ mov eax, dword ptr [Operand + 4]
+ mov edx, dword ptr [Operand + 0]
+ bswap eax
+ bswap edx
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Thunk16.S b/OldMdePkg/Library/BaseLib/Ia32/Thunk16.S new file mode 100644 index 0000000000..c45cdb0a2d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Thunk16.S @@ -0,0 +1,200 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Thunk16.S
+#
+# Abstract:
+#
+# Real mode thunk
+#
+#------------------------------------------------------------------------------
+
+.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
+.globl ASM_PFX(InternalAsmThunk16)
+
+ASM_PFX(m16Start):
+
+SavedGdt: .space 6
+
+ASM_PFX(BackFromUserCode):
+ push %ss
+ push %cs
+ .byte 0x66
+ call L_Base1 # push eip
+L_Base1:
+ pushfw # pushfd actually
+ cli # disable interrupts
+ push %gs
+ push %fs
+ push %es
+ push %ds
+ pushaw # pushad actually
+ .byte 0x66, 0xba # mov edx, imm32
+ASM_PFX(ThunkAttr): .space 4
+ testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
+ jz 1f
+ movl $0x15cd2401, %eax # mov ax, 2401h & int 15h
+ cli # disable interrupts
+ jnc 2f
+1:
+ testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
+ jz 2f
+ inb $0x92, %al
+ orb $2, %al
+ outb %al, $0x92 # deactivate A20M#
+2:
+ movl %ss, %eax
+ .byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
+ mov %ebp, 0xffffffd8(%esi)
+ mov 0xfffffff8(%esi), %ebx
+ shlw $4, %ax # shl eax, 4
+ addw %ax, %bp # add ebp, eax
+ .byte 0x66, 0xb8 # mov eax, imm32
+SavedCr4: .space 4
+ movl %eax, %cr4
+ lgdtw %cs:0xfffffff2(%edi)
+ .byte 0x66, 0xb8 # mov eax, imm32
+SavedCr0: .space 4
+ movl %eax, %cr0
+ .byte 0xb8 # mov ax, imm16
+SavedSs: .space 2
+ movl %eax, %ss
+ .byte 0x66, 0xbc # mov esp, imm32
+SavedEsp: .space 4
+ .byte 0x66
+ lret # return to protected mode
+
+_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
+ .word 0x8
+_16Idtr: .word 0x3ff
+ .long 0
+_16Gdtr: .word GdtEnd - _NullSegDesc - 1
+_16GdtrBase: .long _NullSegDesc
+
+ASM_PFX(ToUserCode):
+ movl %ss, %edx
+ movl %ecx, %ss # set new segment selectors
+ movl %ecx, %ds
+ movl %ecx, %es
+ movl %ecx, %fs
+ movl %ecx, %gs
+ movl %eax, %cr0
+ movl %ebp, %cr4 # real mode starts at next instruction
+ movl %esi, %ss # set up 16-bit stack segment
+ xchgw %bx, %sp # set up 16-bit stack pointer
+ .byte 0x66
+ call L_Base # push eip
+L_Base:
+ popw %bp # ebp <- offset L_Base
+ addr16 pushl 36(%si)
+ .byte 0x36
+ lea 0xc(%esi), %eax
+ push %eax
+ lret
+
+L_RealMode:
+ mov %edx, %cs:0xffffffc5(%esi)
+ mov %bx, %cs:0xffffffcb(%esi)
+ lidtw %cs:0xffffffd7(%esi)
+ popaw # popad actually
+ pop %ds
+ pop %es
+ pop %fs
+ pop %gs
+ popfw # popfd
+ lretw # transfer control to user code
+
+_NullSegDesc: .quad 0
+_16CsDesc:
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x9b
+ .byte 0x8f # 16-bit segment, 4GB limit
+ .byte 0
+_16DsDesc:
+ .word -1
+ .word 0
+ .byte 0
+ .byte 0x93
+ .byte 0x8f # 16-bit segment, 4GB limit
+ .byte 0
+GdtEnd:
+
+#
+# @param RegSet Pointer to a IA32_DWORD_REGS structure
+# @param Transition Pointer to the transition code
+# @return The address of the 16-bit stack after returning from user code
+#
+ASM_PFX(InternalAsmThunk16):
+ push %ebp
+ push %ebx
+ push %esi
+ push %edi
+ push %ds
+ push %es
+ push %fs
+ push %gs
+ movl 36(%esp), %esi # esi <- RegSet
+ movzwl 0x32(%esi), %edx
+ mov 0xc(%esi), %edi
+ add $0xffffffc8, %edi
+ movl %edi, %ebx # ebx <- stack offset
+ imul $0x10, %edx, %eax
+ push $0xd
+ addl %eax, %edi # edi <- linear address of 16-bit stack
+ pop %ecx
+ rep
+ movsl # copy RegSet
+ movl 40(%esp), %eax # eax <- address of transition code
+ movl %edx, %esi # esi <- 16-bit stack segment
+ lea 0x5e(%eax), %edx
+ movl %eax, %ecx
+ andl $0xf, %ecx
+ shll $12, %eax
+ lea 0x6(%ecx), %ecx
+ movw %cx, %ax
+ stosl # [edi] <- return address of user code
+ sgdtl 0xffffffa2(%edx)
+ sidtl 0x24(%esp)
+ movl %cr0, %eax
+ movl %eax, (%edx) # save CR0 in SavedCr0
+ andl $0x7ffffffe, %eax # clear PE, PG bits
+ movl %cr4, %ebp
+ mov %ebp, 0xfffffff1(%edx)
+ andl $0x300, %ebp # clear all but PCE and OSFXSR bits
+ pushl $0x10
+ pop %ecx # ecx <- selector for data segments
+ lgdtl 0x20(%edx)
+ pushfl
+ lcall *0x14(%edx)
+ popfl
+ lidtl 0x24(%esp)
+ lea 0xffffffcc(%ebp), %eax
+ pop %gs
+ pop %fs
+ pop %es
+ pop %ds
+ pop %edi
+ pop %esi
+ pop %ebx
+ pop %ebp
+ ret
+
+ .const:
+
+ASM_PFX(m16Size): .word _InternalAsmThunk16 - ASM_PFX(m16Start)
+ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
+ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
+ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
+ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Thunk16.asm b/OldMdePkg/Library/BaseLib/Ia32/Thunk16.asm new file mode 100644 index 0000000000..5c9bc81a2b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Thunk16.asm @@ -0,0 +1,248 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+ .686p
+ .model flat,C
+
+EXTERNDEF C m16Start:BYTE
+EXTERNDEF C m16Size:WORD
+EXTERNDEF C mThunk16Attr:WORD
+EXTERNDEF C m16Gdt:WORD
+EXTERNDEF C m16GdtrBase:WORD
+EXTERNDEF C mTransition:WORD
+
+;
+; Here is the layout of the real mode stack. _ToUserCode() is responsible for
+; loading all these registers from real mode stack.
+;
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_EFLAGS DD ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+ .const
+
+;
+; These are global constant to convey information to C code.
+;
+m16Size DW InternalAsmThunk16 - m16Start
+mThunk16Attr DW _ThunkAttr - m16Start
+m16Gdt DW _NullSegDesc - m16Start
+m16GdtrBase DW _16GdtrBase - m16Start
+mTransition DW _EntryPoint - m16Start
+
+ .code
+
+m16Start LABEL BYTE
+
+SavedGdt LABEL FWORD
+ DW ?
+ DD ?
+;------------------------------------------------------------------------------
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed
+; by user code. It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_BackFromUserCode PROC
+ ;
+ ; The order of saved registers on the stack matches the order they appears
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them
+ ; into that structure.
+ ;
+ push ss
+ push cs
+ DB 66h
+ call @Base ; push eip
+@Base:
+ pushf ; pushfd actually
+ cli ; disable interrupts
+ push gs
+ push fs
+ push es
+ push ds
+ pushaw ; pushad actually
+ DB 66h, 0bah ; mov edx, imm32
+_ThunkAttr DD ?
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15
+ jz @1
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h
+ cli ; disable interrupts
+ jnc @2
+@1:
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL
+ jz @2
+ in al, 92h
+ or al, 2
+ out 92h, al ; deactivate A20M#
+@2:
+ mov eax, ss
+ DB 67h
+ lea bp, [esp + sizeof (IA32_REGS)]
+ ;
+ ; esi's in the following 2 instructions are indeed bp in 16-bit code. Fact
+ ; is "esi" in 32-bit addressing mode has the same encoding of "bp" in 16-
+ ; bit addressing mode.
+ ;
+ mov word ptr (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._ESP, bp
+ mov ebx, (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._EIP
+ shl ax, 4 ; shl eax, 4
+ add bp, ax ; add ebp, eax
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr4 DD ?
+ mov cr4, eax
+ DB 66h
+ lgdt fword ptr cs:[edi + (SavedGdt - @Base)]
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr0 DD ?
+ mov cr0, eax
+ DB 0b8h ; mov ax, imm16
+SavedSs DW ?
+ mov ss, eax
+ DB 66h, 0bch ; mov esp, imm32
+SavedEsp DD ?
+ DB 66h
+ retf ; return to protected mode
+_BackFromUserCode ENDP
+
+_EntryPoint DD _ToUserCode - m16Start
+ DW 8h
+_16Idtr FWORD (1 SHL 10) - 1
+_16Gdtr LABEL FWORD
+ DW GdtEnd - _NullSegDesc - 1
+_16GdtrBase DD _NullSegDesc
+
+;------------------------------------------------------------------------------
+; _ToUserCode() takes control in real mode before passing control to user code.
+; It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_ToUserCode PROC
+ mov edx, ss
+ mov ss, ecx ; set new segment selectors
+ mov ds, ecx
+ mov es, ecx
+ mov fs, ecx
+ mov gs, ecx
+ mov cr0, eax
+ mov cr4, ebp ; real mode starts at next instruction
+ mov ss, esi ; set up 16-bit stack segment
+ xchg sp, bx ; set up 16-bit stack pointer
+ DB 66h
+ call @Base ; push eip
+@Base:
+ pop bp ; ebp <- address of @Base
+ DB 67h ; address size override
+ push [esp + sizeof (IA32_REGS) + 2]
+ lea eax, [esi + (@RealMode - @Base)]
+ push eax
+ retf
+@RealMode:
+ mov cs:[esi + (SavedSs - @Base)], edx
+ mov cs:[esi + (SavedEsp - @Base)], bx
+ DB 66h
+ lidt fword ptr cs:[esi + (_16Idtr - @Base)]
+ popaw ; popad actually
+ pop ds
+ pop es
+ pop fs
+ pop gs
+ popf ; popfd
+ DB 66h ; Use 32-bit addressing for "retf" below
+ retf ; transfer control to user code
+_ToUserCode ENDP
+
+_NullSegDesc DQ 0
+_16CsDesc LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+_16DsDesc LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+GdtEnd LABEL QWORD
+
+;------------------------------------------------------------------------------
+; IA32_REGISTER_SET *
+; EFIAPI
+; InternalAsmThunk16 (
+; IN IA32_REGISTER_SET *RegisterSet,
+; IN OUT VOID *Transition
+; );
+;------------------------------------------------------------------------------
+InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
+ mov esi, [esp + 36] ; esi <- RegSet, the 1st parameter
+ movzx edx, (IA32_REGS ptr [esi])._SS
+ mov edi, (IA32_REGS ptr [esi])._ESP
+ add edi, - (sizeof (IA32_REGS) + 4) ; reserve stack space
+ mov ebx, edi ; ebx <- stack offset
+ imul eax, edx, 16 ; eax <- edx * 16
+ push sizeof (IA32_REGS) / 4
+ add edi, eax ; edi <- linear address of 16-bit stack
+ pop ecx
+ rep movsd ; copy RegSet
+ mov eax, [esp + 40] ; eax <- address of transition code
+ mov esi, edx ; esi <- 16-bit stack segment
+ lea edx, [eax + (SavedCr0 - m16Start)]
+ mov ecx, eax
+ and ecx, 0fh
+ shl eax, 12
+ lea ecx, [ecx + (_BackFromUserCode - m16Start)]
+ mov ax, cx
+ stosd ; [edi] <- return address of user code
+ sgdt fword ptr [edx + (SavedGdt - SavedCr0)]
+ sidt fword ptr [esp + 36] ; save IDT stack in argument space
+ mov eax, cr0
+ mov [edx], eax ; save CR0 in SavedCr0
+ and eax, 7ffffffeh ; clear PE, PG bits
+ mov ebp, cr4
+ mov [edx + (SavedCr4 - SavedCr0)], ebp
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ push 10h
+ pop ecx ; ecx <- selector for data segments
+ lgdt fword ptr [edx + (_16Gdtr - SavedCr0)]
+ pushfd ; Save df/if indeed
+ call fword ptr [edx + (_EntryPoint - SavedCr0)]
+ popfd
+ lidt fword ptr [esp + 36] ; restore protected mode IDTR
+ lea eax, [ebp - sizeof (IA32_REGS)] ; eax <- the address of IA32_REGS
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.S b/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.S new file mode 100644 index 0000000000..b19348dad9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# Wbinvd.Asm
+#
+# Abstract:
+#
+# AsmWbinvd function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWbinvd (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWbinvd)
+ASM_PFX(AsmWbinvd):
+ wbinvd
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.asm b/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.asm new file mode 100644 index 0000000000..1230c89c20 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWbinvd PROC
+ wbinvd
+ ret
+AsmWbinvd ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.c b/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.c new file mode 100644 index 0000000000..ae7576645d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/Wbinvd.c @@ -0,0 +1,25 @@ +/** @file
+ AsmWbinvd function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWbinvd (
+ VOID
+ )
+{
+ _asm {
+ wbinvd
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.S b/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.S new file mode 100644 index 0000000000..6bce3a4d50 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr0.Asm
+#
+# Abstract:
+#
+# AsmWriteCr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr0 (
+# IN UINTN Cr0
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr0)
+ASM_PFX(AsmWriteCr0):
+ movl 4(%esp), %eax
+ movl %eax, %cr0
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.asm new file mode 100644 index 0000000000..5eab67f819 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; UINTN Cr0
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr0 PROC
+ mov eax, [esp + 4]
+ mov cr0, eax
+ ret
+AsmWriteCr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.c b/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.c new file mode 100644 index 0000000000..909b202907 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr0.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteCr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteCr0 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr0, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.S b/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.S new file mode 100644 index 0000000000..64d2c1b534 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr2.Asm
+#
+# Abstract:
+#
+# AsmWriteCr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr2 (
+# IN UINTN Cr2
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr2)
+ASM_PFX(AsmWriteCr2):
+ movl 4(%esp), %eax
+ movl %eax, %cr2
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.asm new file mode 100644 index 0000000000..0df84412bf --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; UINTN Cr2
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr2 PROC
+ mov eax, [esp + 4]
+ mov cr2, eax
+ ret
+AsmWriteCr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.c b/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.c new file mode 100644 index 0000000000..85921e0961 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr2.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteCr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteCr2 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr2, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.S b/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.S new file mode 100644 index 0000000000..767182ee4e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr3.Asm
+#
+# Abstract:
+#
+# AsmWriteCr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr3 (
+# IN UINTN Cr3
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr3)
+ASM_PFX(AsmWriteCr3):
+ movl 4(%esp), %eax
+ movl %eax, %cr3
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.asm new file mode 100644 index 0000000000..32b05fdf35 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; UINTN Cr3
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr3 PROC
+ mov eax, [esp + 4]
+ mov cr3, eax
+ ret
+AsmWriteCr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.c b/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.c new file mode 100644 index 0000000000..0714d8e76f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr3.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteCr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteCr3 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov cr3, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.S b/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.S new file mode 100644 index 0000000000..dc6828ac91 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteCr4.Asm
+#
+# Abstract:
+#
+# AsmWriteCr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteCr4 (
+# IN UINTN Cr4
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteCr4)
+ASM_PFX(AsmWriteCr4):
+ movl 4(%esp), %eax
+ movl %eax, %cr4
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.asm new file mode 100644 index 0000000000..4ed7f61030 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; UINTN Cr4
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr4 PROC
+ mov eax, [esp + 4]
+ mov cr4, eax
+ ret
+AsmWriteCr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.c b/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.c new file mode 100644 index 0000000000..e0f4bf0a88 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteCr4.c @@ -0,0 +1,28 @@ +/** @file
+ AsmWriteCr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteCr4 (
+ UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov cr4, eax
+ _emit 0x22
+ _emit 0xE0
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.S new file mode 100644 index 0000000000..c05af0ec1e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr0.Asm
+#
+# Abstract:
+#
+# AsmWriteDr0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr0 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr0)
+ASM_PFX(AsmWriteDr0):
+ movl 4(%esp), %eax
+ movl %eax, %dr0
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.asm new file mode 100644 index 0000000000..1bd39d50e4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr0 PROC
+ mov eax, [esp + 4]
+ mov dr0, eax
+ ret
+AsmWriteDr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.c new file mode 100644 index 0000000000..f98098076c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr0.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteDr0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr0 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr0, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.S new file mode 100644 index 0000000000..87031768ac --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr1.Asm
+#
+# Abstract:
+#
+# AsmWriteDr1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr1 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr1)
+ASM_PFX(AsmWriteDr1):
+ movl 4(%esp), %eax
+ movl %eax, %dr1
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.asm new file mode 100644 index 0000000000..542125ba55 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr1 PROC
+ mov eax, [esp + 4]
+ mov dr1, eax
+ ret
+AsmWriteDr1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.c new file mode 100644 index 0000000000..4f29303218 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr1.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteDr1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr1 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr1, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.S new file mode 100644 index 0000000000..ca4e301b93 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr2.Asm
+#
+# Abstract:
+#
+# AsmWriteDr2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr2 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr2)
+ASM_PFX(AsmWriteDr2):
+ movl 4(%esp), %eax
+ movl %eax, %dr2
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.asm new file mode 100644 index 0000000000..7638babc73 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr2 PROC
+ mov eax, [esp + 4]
+ mov dr2, eax
+ ret
+AsmWriteDr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.c new file mode 100644 index 0000000000..190fb228a8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr2.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteDr2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr2 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr2, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.S new file mode 100644 index 0000000000..ed23db7e90 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr3.Asm
+#
+# Abstract:
+#
+# AsmWriteDr3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr3 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr3)
+ASM_PFX(AsmWriteDr3):
+ movl 4(%esp), %eax
+ movl %eax, %dr3
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.asm new file mode 100644 index 0000000000..69a17b4ad3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr3 PROC
+ mov eax, [esp + 4]
+ mov dr3, eax
+ ret
+AsmWriteDr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.c new file mode 100644 index 0000000000..ad2d1ad75a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr3.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteDr3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr3 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr3, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.S new file mode 100644 index 0000000000..d17595213a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr4.Asm
+#
+# Abstract:
+#
+# AsmWriteDr4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr4 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr4)
+ASM_PFX(AsmWriteDr4):
+ movl 4(%esp), %eax
+ movl %eax, %dr4
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.asm new file mode 100644 index 0000000000..9c10305b4d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.asm @@ -0,0 +1,48 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr4 PROC
+ mov eax, [esp + 4]
+ ;
+ ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 23h, 0e0h
+ ret
+AsmWriteDr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.c new file mode 100644 index 0000000000..27862486be --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr4.c @@ -0,0 +1,28 @@ +/** @file
+ AsmWriteDr4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr4 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov dr4, eax
+ _emit 0x23
+ _emit 0xe0
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.S new file mode 100644 index 0000000000..7e3bb94f1f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr5.Asm
+#
+# Abstract:
+#
+# AsmWriteDr5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr5 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr5)
+ASM_PFX(AsmWriteDr5):
+ movl 4(%esp), %eax
+ movl %eax, %dr5
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.asm new file mode 100644 index 0000000000..e10434ef3d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.asm @@ -0,0 +1,48 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr5 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr5 PROC
+ mov eax, [esp + 4]
+ ;
+ ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to
+ ; this register will cause a #UD exception.
+ ;
+ ; MS assembler doesn't support this instruction since no one would use it
+ ; under normal circustances. Here opcode is used.
+ ;
+ DB 0fh, 23h, 0e8h
+ ret
+AsmWriteDr5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.c new file mode 100644 index 0000000000..c6e118e9fa --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr5.c @@ -0,0 +1,28 @@ +/** @file
+ AsmWriteDr5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr5 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ _emit 0x0f // mov dr5, eax
+ _emit 0x23
+ _emit 0xe8
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.S new file mode 100644 index 0000000000..0827f347bd --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr6.Asm
+#
+# Abstract:
+#
+# AsmWriteDr6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr6 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr6)
+ASM_PFX(AsmWriteDr6):
+ movl 4(%esp), %eax
+ movl %eax, %dr6
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.asm new file mode 100644 index 0000000000..4e5acf58b0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr6 PROC
+ mov eax, [esp + 4]
+ mov dr6, eax
+ ret
+AsmWriteDr6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.c new file mode 100644 index 0000000000..bc7d8048b0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr6.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteDr6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr6 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr6, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.S b/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.S new file mode 100644 index 0000000000..1f3e916675 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteDr7.Asm
+#
+# Abstract:
+#
+# AsmWriteDr7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINTN
+# EFIAPI
+# AsmWriteDr7 (
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteDr7)
+ASM_PFX(AsmWriteDr7):
+ movl 4(%esp), %eax
+ movl %eax, %dr7
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.asm new file mode 100644 index 0000000000..10e83d6fe7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr7 PROC
+ mov eax, [esp + 4]
+ mov dr7, eax
+ ret
+AsmWriteDr7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.c b/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.c new file mode 100644 index 0000000000..a3bd33cc95 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteDr7.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteDr7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINTN
+EFIAPI
+AsmWriteDr7 (
+ IN UINTN Value
+ )
+{
+ _asm {
+ mov eax, Value
+ mov dr7, eax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.S b/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.S new file mode 100644 index 0000000000..3aedf7dd68 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteGdtr.Asm
+#
+# Abstract:
+#
+# InternalX86WriteGdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86WriteGdtr (
+# OUT IA32_DESCRIPTOR *Gdtr
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(InternalX86WriteGdtr)
+ASM_PFX(InternalX86WriteGdtr):
+ movl 4(%esp), %eax
+ lgdt (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.asm new file mode 100644 index 0000000000..f1c7a92e3b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteGdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteGdtr PROC
+ mov eax, [esp + 4]
+ lgdt fword ptr [eax]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.c b/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.c new file mode 100644 index 0000000000..0f937e691b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteGdtr.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteGdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalX86WriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ _asm {
+ mov eax, Gdtr
+ lgdt fword ptr [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.S b/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.S new file mode 100644 index 0000000000..c3e6ad3353 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteIdtr.Asm
+#
+# Abstract:
+#
+# InternalX86WriteIdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalX86WriteIdtr (
+# OUT IA32_DESCRIPTOR *Idtr
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(InternalX86WriteIdtr)
+ASM_PFX(InternalX86WriteIdtr):
+ movl 4(%esp), %eax
+ lidt (%eax)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.asm new file mode 100644 index 0000000000..65fca407f2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteIdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteIdtr PROC
+ mov eax, [esp + 4]
+ lidt fword ptr [eax]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.c b/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.c new file mode 100644 index 0000000000..d43b204493 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteIdtr.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteIdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+InternalX86WriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ _asm {
+ mov eax, Idtr
+ lidt fword ptr [eax]
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.S b/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.S new file mode 100644 index 0000000000..8b2cc3c029 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteLdtr.Asm
+#
+# Abstract:
+#
+# AsmWriteLdtr function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteLdtr (
+# IN UINT16 Ldtr
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteLdtr)
+ASM_PFX(AsmWriteLdtr):
+ movl 4(%esp), %eax
+ lldtw %ax
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.asm new file mode 100644 index 0000000000..39f8b2ed5e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386p
+ .model flat
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+_AsmWriteLdtr PROC
+ mov eax, [esp + 4]
+ lldt ax
+ ret
+_AsmWriteLdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.c b/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.c new file mode 100644 index 0000000000..c320b96e14 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteLdtr.c @@ -0,0 +1,27 @@ +/** @file
+ AsmWriteLdtr function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteLdtr (
+ IN UINT16 Ldtr
+ )
+{
+ _asm {
+ xor eax, eax
+ mov ax, Ldtr
+ lldt ax
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.S new file mode 100644 index 0000000000..ef70763e52 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm0.Asm
+#
+# Abstract:
+#
+# AsmWriteMm0 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm0 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm0)
+ASM_PFX(AsmWriteMm0):
+ movq 4(%esp), %mm0
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.asm new file mode 100644 index 0000000000..15912f6c4a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm0 PROC
+ movq mm0, [esp + 4]
+ ret
+AsmWriteMm0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.c new file mode 100644 index 0000000000..d6e66d4632 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm0.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteMm0 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm0 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm0, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.S new file mode 100644 index 0000000000..74a3d711b5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm1.Asm
+#
+# Abstract:
+#
+# AsmWriteMm1 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm1 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm1)
+ASM_PFX(AsmWriteMm1):
+ movq 4(%esp), %mm1
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.asm new file mode 100644 index 0000000000..097e760e8c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm1 PROC
+ movq mm1, [esp + 4]
+ ret
+AsmWriteMm1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.c new file mode 100644 index 0000000000..abdda7f0ae --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm1.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteMm1 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm1 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm1, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.S new file mode 100644 index 0000000000..a3c548dcec --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm2.Asm
+#
+# Abstract:
+#
+# AsmWriteMm2 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm2 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm2)
+ASM_PFX(AsmWriteMm2):
+ movq 4(%esp), %mm2
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.asm new file mode 100644 index 0000000000..fea7081d28 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm2 PROC
+ movq mm2, [esp + 4]
+ ret
+AsmWriteMm2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.c new file mode 100644 index 0000000000..d0ff1eb5f4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm2.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteMm2 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm2 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm2, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.S new file mode 100644 index 0000000000..98b11a5818 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm3.Asm
+#
+# Abstract:
+#
+# AsmWriteMm3 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm3 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm3)
+ASM_PFX(AsmWriteMm3):
+ movq 4(%esp), %mm3
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.asm new file mode 100644 index 0000000000..1af24908f7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm3 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm3 PROC
+ movq mm3, [esp + 4]
+ ret
+AsmWriteMm3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.c new file mode 100644 index 0000000000..5851fb5b50 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm3.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteMm3 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm3 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm3, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.S new file mode 100644 index 0000000000..107c695cf7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm4.Asm
+#
+# Abstract:
+#
+# AsmWriteMm4 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm4 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm4)
+ASM_PFX(AsmWriteMm4):
+ movq 4(%esp), %mm4
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.asm new file mode 100644 index 0000000000..2cf9da095c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm4 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm4 PROC
+ movq mm4, [esp + 4]
+ ret
+AsmWriteMm4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.c new file mode 100644 index 0000000000..50017a93f1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm4.c @@ -0,0 +1,25 @@ +/** @file
+ AsmWriteMm4 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm4 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm4, qword ptr [Value]
+ emms
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.S new file mode 100644 index 0000000000..be6a6f78b2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm5.Asm
+#
+# Abstract:
+#
+# AsmWriteMm5 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm5 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm5)
+ASM_PFX(AsmWriteMm5):
+ movq 4(%esp), %mm5
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.asm new file mode 100644 index 0000000000..9c9882ef10 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm5 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm5 PROC
+ movq mm5, [esp + 4]
+ ret
+AsmWriteMm5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.c new file mode 100644 index 0000000000..df8d457100 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm5.c @@ -0,0 +1,25 @@ +/** @file
+ AsmWriteMm5 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm5 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm5, qword ptr [Value]
+ emms
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.S new file mode 100644 index 0000000000..51a8973460 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm6.Asm
+#
+# Abstract:
+#
+# AsmWriteMm6 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm6 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm6)
+ASM_PFX(AsmWriteMm6):
+ movq 4(%esp), %mm6
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.asm new file mode 100644 index 0000000000..5e0cfad563 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm6 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm6 PROC
+ movq mm6, [esp + 4]
+ ret
+AsmWriteMm6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.c new file mode 100644 index 0000000000..9058565baa --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm6.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteMm6 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm6 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm6, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.S new file mode 100644 index 0000000000..824bbeae17 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMm7.Asm
+#
+# Abstract:
+#
+# AsmWriteMm7 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# AsmWriteMm7 (
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMm7)
+ASM_PFX(AsmWriteMm7):
+ movq 4(%esp), %mm7
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.asm new file mode 100644 index 0000000000..faaa23bfd2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586
+ .model flat,C
+ .mmx
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm7 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm7 PROC
+ movq mm7, [esp + 4]
+ ret
+AsmWriteMm7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.c new file mode 100644 index 0000000000..7d9a3a6ed1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMm7.c @@ -0,0 +1,26 @@ +/** @file
+ AsmWriteMm7 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+VOID
+EFIAPI
+AsmWriteMm7 (
+ IN UINT64 Value
+ )
+{
+ _asm {
+ movq mm7, qword ptr [Value]
+ emms
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.S b/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.S new file mode 100644 index 0000000000..5c12c981a9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# WriteMsr64.Asm
+#
+# Abstract:
+#
+# AsmWriteMsr64 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINT64
+# EFIAPI
+# AsmWriteMsr64 (
+# IN UINT32 Index,
+# IN UINT64 Value
+# );
+#------------------------------------------------------------------------------
+.globl ASM_PFX(AsmWriteMsr64)
+ASM_PFX(AsmWriteMsr64):
+ movl 12(%esp), %edx
+ movl 8(%esp), %eax
+ movl 4(%esp), %ecx
+ wrmsr
+ ret
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.asm b/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.asm new file mode 100644 index 0000000000..14edba60c1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.asm @@ -0,0 +1,44 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586p
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr64 PROC
+ mov edx, [esp + 12]
+ mov eax, [esp + 8]
+ mov ecx, [esp + 4]
+ wrmsr
+ ret
+AsmWriteMsr64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.c b/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.c new file mode 100644 index 0000000000..7e2fda0804 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ia32/WriteMsr64.c @@ -0,0 +1,29 @@ +/** @file
+ AsmWriteMsr64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+UINT64
+EFIAPI
+AsmWriteMsr64 (
+ IN UINT32 Index,
+ IN UINT64 Value
+ )
+{
+ _asm {
+ mov edx, dword ptr [Value + 4]
+ mov eax, dword ptr [Value + 0]
+ mov ecx, Index
+ wrmsr
+ }
+}
+
diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessDbr.s b/OldMdePkg/Library/BaseLib/Ipf/AccessDbr.s new file mode 100644 index 0000000000..49d1fecbbf --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessDbr.s @@ -0,0 +1,118 @@ +/// @file
+/// IPF specific Debug Breakpoint Registers accessing functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessDbr.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadDbr
+//
+// This routine is used to Reads the current value of Data Breakpoint Register (DBR).
+//
+// Arguments :
+//
+// On Entry : The 8-bit DBR index to read.
+//
+// Return Value: The current value of DBR by Index.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadDbr, @function
+.proc AsmReadDbr
+.regstk 1, 0, 0, 0
+
+AsmReadDbr::
+ mov r8 = dbr[in0];;
+ br.ret.dpnt b0;;
+.endp AsmReadDbr
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteDbr
+//
+// This routine is used to write the current value to Data Breakpoint Register (DBR).
+//
+// Arguments :
+//
+// On Entry : The 8-bit DBR index to read.
+// The value should be written to DBR
+//
+// Return Value: The value written to DBR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteDbr, @function
+.proc AsmWriteDbr
+.regstk 2, 0, 0, 0
+
+AsmWriteDbr::
+ mov dbr[in0] = in1
+ mov r8 = in1;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteDbr
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIbr
+//
+// This routine is used to Reads the current value of Instruction Breakpoint Register (IBR).
+//
+// Arguments :
+//
+// On Entry : The 8-bit IBR index.
+//
+// Return Value: The current value of IBR by Index.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIbr, @function
+.proc AsmReadIbr
+.regstk 1, 0, 0, 0
+
+AsmReadIbr::
+ mov r8 = ibr[in0];;
+ br.ret.dpnt b0;;
+.endp AsmReadIbr
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteIbr
+//
+// This routine is used to write the current value to Instruction Breakpoint Register (IBR).
+//
+// Arguments :
+//
+// On Entry : The 8-bit IBR index.
+// The value should be written to IBR
+//
+// Return Value: The value written to IBR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteIbr, @function
+.proc AsmWriteIbr
+.regstk 2, 0, 0, 0
+
+AsmWriteIbr::
+ mov ibr[in0] = in1
+ mov r8 = in1;;
+ srlz.i;;
+ br.ret.dpnt b0;;
+.endp AsmWriteIbr
diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessEicr.s b/OldMdePkg/Library/BaseLib/Ipf/AccessEicr.s new file mode 100644 index 0000000000..03d7e034f8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessEicr.s @@ -0,0 +1,512 @@ +/// @file
+/// IPF specific External Interrupt Control Registers accessing functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessEicr.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadLid
+//
+// This routine is used to read the value of Local Interrupt ID Register (LID).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of LID.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadLid, @function
+.proc AsmReadLid
+
+AsmReadLid::
+ mov r8 = cr.lid;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmReadLid
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteLid
+//
+// This routine is used to write the value to Local Interrupt ID Register (LID).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to LID.
+//
+// Return Value: The value written to LID.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteLid, @function
+.proc AsmWriteLid
+.regstk 1, 0, 0, 0
+
+AsmWriteLid::
+ mov cr.lid = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteLid
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIvr
+//
+// This routine is used to read the value of External Interrupt Vector Register (IVR).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of IVR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIvr, @function
+.proc AsmReadIvr
+
+AsmReadIvr::
+ mov r8 = cr.ivr;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmReadIvr
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadTpr
+//
+// This routine is used to read the value of Task Priority Register (TPR).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of TPR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadTpr, @function
+.proc AsmReadTpr
+
+AsmReadTpr::
+ mov r8 = cr.tpr;;
+ br.ret.dpnt b0;;
+.endp AsmReadTpr
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteTpr
+//
+// This routine is used to write the value to Task Priority Register (TPR).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to TPR.
+//
+// Return Value: The value written to TPR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteTpr, @function
+.proc AsmWriteTpr
+.regstk 1, 0, 0, 0
+
+AsmWriteTpr::
+ mov cr.tpr = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteTpr
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteEoi
+//
+// This routine is used to write the value to End of External Interrupt Register (EOI).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to EOI.
+//
+// Return Value: The value written to EOI.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteEoi, @function
+.proc AsmWriteEoi
+
+AsmWriteEoi::
+ mov cr.eoi = r0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteEoi
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIrr0
+//
+// This routine is used to Read the value of External Interrupt Request Register 0 (IRR0).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of IRR0.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIrr0, @function
+.proc AsmReadIrr0
+
+AsmReadIrr0::
+ mov r8 = cr.irr0;;
+ br.ret.dpnt b0;;
+.endp AsmReadIrr0
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIrr1
+//
+// This routine is used to Read the value of External Interrupt Request Register 1 (IRR1).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of IRR1.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIrr1, @function
+.proc AsmReadIrr1
+
+AsmReadIrr1::
+ mov r8 = cr.irr1;;
+ br.ret.dpnt b0;;
+.endp AsmReadIrr1
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIrr2
+//
+// This routine is used to Read the value of External Interrupt Request Register 2 (IRR2).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of IRR2.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIrr2, @function
+.proc AsmReadIrr2
+
+AsmReadIrr2::
+ mov r8 = cr.irr2;;
+ br.ret.dpnt b0;;
+.endp AsmReadIrr2
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIrr3
+//
+// This routine is used to Read the value of External Interrupt Request Register 3 (IRR3).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of IRR3.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIrr3, @function
+.proc AsmReadIrr3
+
+AsmReadIrr3::
+ mov r8 = cr.irr3;;
+ br.ret.dpnt b0;;
+.endp AsmReadIrr3
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadItv
+//
+// This routine is used to Read the value of Interval Timer Vector Register (ITV).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of ITV.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadItv, @function
+.proc AsmReadItv
+
+AsmReadItv::
+ mov r8 = cr.itv;;
+ br.ret.dpnt b0;;
+.endp AsmReadItv
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteItv
+//
+// This routine is used to write the value to Interval Timer Vector Register (ITV).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to ITV
+//
+// Return Value: The value written to ITV.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteItv, @function
+.proc AsmWriteItv
+.regstk 1, 0, 0, 0
+
+AsmWriteItv::
+ mov cr.itv = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteItv
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadPmv
+//
+// This routine is used to Read the value of Performance Monitoring Vector Register (PMV).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of PMV.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadPmv, @function
+.proc AsmReadPmv
+
+AsmReadPmv::
+ mov r8 = cr.pmv;;
+ br.ret.dpnt b0;;
+.endp AsmReadPmv
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWritePmv
+//
+// This routine is used to write the value to Performance Monitoring Vector Register (PMV).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to PMV
+//
+// Return Value: The value written to PMV.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWritePmv, @function
+.proc AsmWritePmv
+.regstk 1, 0, 0, 0
+
+AsmWritePmv::
+ mov cr.pmv = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWritePmv
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadCmcv
+//
+// This routine is used to Read the value of Corrected Machine Check Vector Register (CMCV).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of CMCV.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadCmcv, @function
+.proc AsmReadCmcv
+
+AsmReadCmcv::
+ mov r8 = cr.cmcv;;
+ br.ret.dpnt b0;;
+.endp AsmReadCmcv
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteCmcv
+//
+// This routine is used to write the value to Corrected Machine Check Vector Register (CMCV).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to CMCV
+//
+// Return Value: The value written to CMCV.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteCmcv, @function
+.proc AsmWriteCmcv
+.regstk 1, 0, 0, 0
+
+AsmWriteCmcv::
+ mov cr.cmcv = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteCmcv
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadLrr0
+//
+// This routine is used to read the value of Local Redirection Register 0 (LRR0).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of LRR0.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadLrr0, @function
+.proc AsmReadLrr0
+
+AsmReadLrr0::
+ mov r8 = cr.lrr0;;
+ br.ret.dpnt b0;;
+.endp AsmReadLrr0
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteLrr0
+//
+// This routine is used to write the value to Local Redirection Register 0 (LRR0).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to LRR0.
+//
+// Return Value: The value written to LRR0.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteLrr0, @function
+.proc AsmWriteLrr0
+.regstk 1, 0, 0, 0
+
+AsmWriteLrr0::
+ mov cr.lrr0 = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteLrr0
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadLrr1
+//
+// This routine is used to read the value of Local Redirection Register 1 (LRR1).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of LRR1.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadLrr1, @function
+.proc AsmReadLrr1
+
+AsmReadLrr1::
+ mov r8 = cr.lrr1;;
+ br.ret.dpnt b0;;
+.endp AsmReadLrr1
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteLrr1
+//
+// This routine is used to write the value to Local Redirection Register 1 (LRR1).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to LRR1.
+//
+// Return Value: The value written to LRR1.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteLrr1, @function
+.proc AsmWriteLrr1
+.regstk 1, 0, 0, 0
+
+AsmWriteLrr1::
+ mov cr.lrr1 = in0
+ mov r8 = in0;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteLrr1
+
diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessGcr.s b/OldMdePkg/Library/BaseLib/Ipf/AccessGcr.s new file mode 100644 index 0000000000..54b3a30a6d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessGcr.s @@ -0,0 +1,264 @@ +/// @file
+/// IPF specific Global Control Registers accessing functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessGcr.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadDcr
+//
+// This routine is used to Read the value of Default Control Register (DCR).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of DCR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadDcr, @function
+.proc AsmReadDcr
+
+AsmReadDcr::
+ mov r8 = cr.dcr;;
+ br.ret.dpnt b0;;
+.endp AsmReadDcr
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteDcr
+//
+// This routine is used to write the value to Default Control Register (DCR).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to DCR
+//
+// Return Value: The value written to DCR.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteDcr, @function
+.proc AsmWriteDcr
+.regstk 1, 0, 0, 0
+
+AsmWriteDcr::
+ mov cr.dcr = in0
+ mov r8 = in0;;
+ srlz.i;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWriteDcr
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadItc
+//
+// This routine is used to Read the value of Interval Timer Counter Register (ITC).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of ITC.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadItc, @function
+.proc AsmReadItc
+
+AsmReadItc::
+ mov r8 = ar.itc;;
+ br.ret.dpnt b0;;
+.endp AsmReadItc
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteItc
+//
+// This routine is used to write the value to Interval Timer Counter Register (ITC).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to the ITC
+//
+// Return Value: The value written to the ITC.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteItc, @function
+.proc AsmWriteItc
+.regstk 1, 0, 0, 0
+
+AsmWriteItc::
+ mov ar.itc = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteItc
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadItm
+//
+// This routine is used to Read the value of Interval Timer Match Register (ITM).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of ITM.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadItm, @function
+.proc AsmReadItm
+
+AsmReadItm::
+ mov r8 = cr.itm;;
+ br.ret.dpnt b0;;
+.endp AsmReadItm
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteItm
+//
+// This routine is used to write the value to Interval Timer Match Register (ITM).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to ITM
+//
+// Return Value: The value written to ITM.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteItm, @function
+.proc AsmWriteItm
+.regstk 1, 0, 0, 0
+
+AsmWriteItm::
+ mov cr.itm = in0
+ mov r8 = in0;;
+ srlz.d;
+ br.ret.dpnt b0;;
+.endp AsmWriteItm
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadIva
+//
+// This routine is used to read the value of Interruption Vector Address Register (IVA).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of IVA.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadIva, @function
+.proc AsmReadIva
+
+AsmReadIva::
+ mov r8 = cr.iva;;
+ br.ret.dpnt b0;;
+.endp AsmReadIva
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteIva
+//
+// This routine is used to write the value to Interruption Vector Address Register (IVA).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to IVA
+//
+// Return Value: The value written to IVA.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteIva, @function
+.proc AsmWriteIva
+.regstk 1, 0, 0, 0
+
+AsmWriteIva::
+ mov cr.iva = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteIva
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadPta
+//
+// This routine is used to read the value of Page Table Address Register (PTA).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current value of PTA.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadPta, @function
+.proc AsmReadPta
+
+AsmReadPta::
+ mov r8 = cr.pta;;
+ br.ret.dpnt b0;;
+.endp AsmReadPta
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWritePta
+//
+// This routine is used to write the value to Page Table Address Register (PTA)).
+//
+// Arguments :
+//
+// On Entry : The value need to be written to PTA
+//
+// Return Value: The value written to PTA.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWritePta, @function
+.proc AsmWritePta
+.regstk 1, 0, 0, 0
+
+AsmWritePta::
+ mov cr.pta = in0
+ mov r8 = in0;;
+ srlz.i;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWritePta
\ No newline at end of file diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessGp.s b/OldMdePkg/Library/BaseLib/Ipf/AccessGp.s new file mode 100644 index 0000000000..5c5f20f584 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessGp.s @@ -0,0 +1,86 @@ +/// @file
+/// IPF specific Global Pointer and Stack Pointer accessing functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessGp.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadGp
+//
+// This routine is used to read the current value of 64-bit Global Pointer (GP).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current GP value.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadGp, @function
+.proc AsmReadGp
+
+AsmReadGp::
+ mov r8 = gp;;
+ br.ret.dpnt b0;;
+.endp AsmReadGp
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteGp
+//
+// This routine is used to write the current value of 64-bit Global Pointer (GP).
+//
+// Arguments :
+//
+// On Entry : The value need to be written.
+//
+// Return Value: The value have been written.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteGp, @function
+.proc AsmWriteGp
+.regstk 1, 0, 0, 0
+
+AsmWriteGp::
+ mov gp = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteGp
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadSp
+//
+// This routine is used to read the current value of 64-bit Stack Pointer (SP).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current SP value.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadSp, @function
+.proc AsmReadSp
+
+AsmReadSp::
+ mov r8 = sp;;
+ br.ret.dpnt b0;;
+.endp AsmReadSp
diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessKr.s b/OldMdePkg/Library/BaseLib/Ipf/AccessKr.s new file mode 100644 index 0000000000..5a38954292 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessKr.s @@ -0,0 +1,400 @@ +/// @file
+/// IPF specific AsmReadKrX() and AsmWriteKrX functions, 'X' is from '0' to '7'
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessKr.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr0
+//
+// This routine is used to get KR0.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR0.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr0, @function
+.proc AsmReadKr0
+
+AsmReadKr0::
+ mov r8 = ar.k0;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr0
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr0
+//
+// This routine is used to Write KR0.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR0.
+//
+//--
+//----------------------------------------------------------------------------------
+
+.text
+.type AsmWriteKr0, @function
+.proc AsmWriteKr0
+.regstk 1, 0, 0, 0
+
+AsmWriteKr0::
+ mov ar.k0 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr0
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr1
+//
+// This routine is used to get KR1.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR1.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr1, @function
+.proc AsmReadKr1
+
+AsmReadKr1::
+ mov r8 = ar.k1;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr1
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr1
+//
+// This routine is used to Write KR1.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR1.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr1, @function
+.proc AsmWriteKr1
+
+AsmWriteKr1::
+ mov ar.k1 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr1
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr2
+//
+// This routine is used to get KR2.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR2.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr2, @function
+.proc AsmReadKr2
+
+AsmReadKr2::
+ mov r8 = ar.k2;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr2
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr2
+//
+// This routine is used to Write KR2.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR2.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr2, @function
+.proc AsmWriteKr2
+
+AsmWriteKr2::
+ mov ar.k2 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr2
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr3
+//
+// This routine is used to get KR3.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR3.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr3, @function
+.proc AsmReadKr3
+
+AsmReadKr3::
+ mov r8 = ar.k3;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr3
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr3
+//
+// This routine is used to Write KR3.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR3.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr3, @function
+.proc AsmWriteKr3
+
+AsmWriteKr3::
+ mov ar.k3 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr3
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr4
+//
+// This routine is used to get KR4.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR4.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr4, @function
+.proc AsmReadKr4
+
+AsmReadKr4::
+ mov r8 = ar.k4;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr4
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr4
+//
+// This routine is used to Write KR4.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR4.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr4, @function
+.proc AsmWriteKr4
+
+AsmWriteKr4::
+ mov ar.k4 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr4
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr5
+//
+// This routine is used to get KR5.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR5.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr5, @function
+.proc AsmReadKr5
+
+AsmReadKr5::
+ mov r8 = ar.k5;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr5
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr5
+//
+// This routine is used to Write KR5.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR5.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr5, @function
+.proc AsmWriteKr5
+
+AsmWriteKr5::
+ mov ar.k5 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr5
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr6
+//
+// This routine is used to get KR6.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR6.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr6, @function
+.proc AsmReadKr6
+
+AsmReadKr6::
+ mov r8 = ar.k6;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr6
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr6
+//
+// This routine is used to write KR6.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR6.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr6, @function
+.proc AsmWriteKr6
+
+AsmWriteKr6::
+ mov ar.k6 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr6
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadKr7
+//
+// This routine is used to get KR7.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value store in KR7.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadKr7, @function
+.proc AsmReadKr7
+
+AsmReadKr7::
+ mov r8 = ar.k7;;
+ br.ret.dpnt b0;;
+.endp AsmReadKr7
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWriteKr7
+//
+// This routine is used to write KR7.
+//
+// Arguments :
+//
+// On Entry : None.
+//
+// Return Value: The value written to the KR7.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWriteKr7, @function
+.proc AsmWriteKr7
+
+AsmWriteKr7::
+ mov ar.k7 = in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmWriteKr7
diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessPmr.s b/OldMdePkg/Library/BaseLib/Ipf/AccessPmr.s new file mode 100644 index 0000000000..cea376c638 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessPmr.s @@ -0,0 +1,124 @@ +/// @file
+/// IPF specific Performance Monitor Configuration/Data Registers accessing functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessPmr.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadPmc
+//
+// This routine is used to Reads the current value of Performance Monitor Configuration Register (PMC).
+//
+// Arguments :
+//
+// On Entry : The 8-bit PMC index.
+//
+// Return Value: The current value of PMC by Index.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadPmc, @function
+.proc AsmReadPmc
+.regstk 1, 0, 0, 0
+
+AsmReadPmc::
+ srlz.i;;
+ srlz.d;;
+ mov r8 = pmc[in0];;
+ br.ret.dpnt b0;;
+.endp AsmReadPmc
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWritePmc
+//
+// This routine is used to write the current value to a Performance Monitor Configuration Register (PMC).
+//
+// Arguments :
+//
+// On Entry : The 8-bit PMC index.
+// The value should be written to PMC
+//
+// Return Value: The value written to PMC.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWritePmc, @function
+.proc AsmWritePmc
+.regstk 2, 0, 0, 0
+
+AsmWritePmc::
+ mov pmc[in0] = in1
+ mov r8 = in1;;
+ srlz.i;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWritePmc
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadPmd
+//
+// This routine is used to Reads the current value of Performance Monitor Data Register (PMD).
+//
+// Arguments :
+//
+// On Entry : The 8-bit PMD index.
+//
+// Return Value: The current value of PMD by Index.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadPmd, @function
+.proc AsmReadPmd
+.regstk 1, 0, 0, 0
+
+AsmReadPmd::
+ srlz.i;;
+ srlz.d;;
+ mov r8 = pmd[in0];;
+ br.ret.dpnt b0;;
+.endp AsmReadPmd
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWritePmd
+//
+// This routine is used to write the current value to Performance Monitor Data Register (PMD).
+//
+// Arguments :
+//
+// On Entry : The 8-bit PMD index.
+// The value should be written to PMD
+//
+// Return Value: The value written to PMD.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWritePmd, @function
+.proc AsmWritePmd
+.regstk 2, 0, 0, 0
+
+AsmWritePmd::
+ mov pmd[in0] = in1
+ mov r8 = in1;;
+ srlz.i;;
+ srlz.d;;
+ br.ret.dpnt b0;;
+.endp AsmWritePmd
diff --git a/OldMdePkg/Library/BaseLib/Ipf/AccessPsr.s b/OldMdePkg/Library/BaseLib/Ipf/AccessPsr.s new file mode 100644 index 0000000000..9b4fe49ff1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AccessPsr.s @@ -0,0 +1,110 @@ +/// @file
+/// IPF specific Processor Status Register accessing functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AccessPsr.s
+///
+///
+
+#define CpuModeMask 0x0000001008020000
+
+#define CpuInVirtualMode 0x1
+#define CpuInPhysicalMode 0x0
+#define CpuInMixMode (0x0 - 0x1)
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadPsr
+//
+// This routine is used to read the current value of Processor Status Register (PSR).
+//
+// Arguments :
+//
+// On Entry :
+//
+// Return Value: The current PSR value.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadPsr, @function
+.proc AsmReadPsr
+
+AsmReadPsr::
+ mov r8 = psr;;
+ br.ret.dpnt b0;;
+.endp AsmReadPsr
+
+//---------------------------------------------------------------------------------
+//++
+// AsmWritePsr
+//
+// This routine is used to write the value of Processor Status Register (PSR).
+//
+// Arguments :
+//
+// On Entry : The value need to be written.
+//
+// Return Value: The value have been written.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmWritePsr, @function
+.proc AsmWritePsr
+.regstk 1, 0, 0, 0
+
+AsmWritePsr::
+ mov psr.l = in0
+ mov r8 = in0;;
+ srlz.d;;
+ srlz.i;;
+ br.ret.dpnt b0;;
+.endp AsmWritePsr
+
+//---------------------------------------------------------------------------------
+//++
+// AsmCpuVirtual
+//
+// This routine is used to determines if the CPU is currently executing
+// in virtual, physical, or mixed mode.
+//
+// If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
+// If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
+// If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
+// and -1 is returned.
+//
+// Arguments:
+//
+// On Entry: None
+//
+// Return Value: The CPU mode flag
+// return 1 The CPU is in virtual mode.
+// return 0 The CPU is in physical mode.
+// return -1 The CPU is in mixed mode.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmCpuVirtual, @function
+.proc AsmCpuVirtual
+
+AsmCpuVirtual::
+ mov r29 = psr
+ movl r30 = CpuModeMask;;
+ and r28 = r30, r29;;
+ cmp.eq p6, p7 = r30, r28;;
+(p6) mov r8 = CpuInVirtualMode;;
+(p7) cmp.eq p6, p7 = 0x0, r28;;
+(p6) mov r8 = CpuInPhysicalMode;;
+(p7) mov r8 = CpuInMixMode;;
+ br.ret.dpnt b0;;
+.endp AsmCpuVirtual
\ No newline at end of file diff --git a/OldMdePkg/Library/BaseLib/Ipf/AsmPalCall.s b/OldMdePkg/Library/BaseLib/Ipf/AsmPalCall.s new file mode 100644 index 0000000000..9e70a78729 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/AsmPalCall.s @@ -0,0 +1,158 @@ +/// @file
+/// Contains an implementation of CallPalProcStacked on Itanium-based
+/// architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: AsmPalCall.s
+///
+///
+
+
+//-----------------------------------------------------------------------------
+//++
+// AsmPalCall
+//
+// Makes a PAL procedure call.
+// This is function to make a PAL procedure call. Based on the Index
+// value this API will make static or stacked PAL call. The following table
+// describes the usage of PAL Procedure Index Assignment. Architected procedures
+// may be designated as required or optional. If a PAL procedure is specified
+// as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
+// Status field of the PAL_CALL_RETURN structure.
+// This indicates that the procedure is not present in this PAL implementation.
+// It is the caller¡¯s responsibility to check for this return code after calling
+// any optional PAL procedure.
+// No parameter checking is performed on the 5 input parameters, but there are
+// some common rules that the caller should follow when making a PAL call. Any
+// address passed to PAL as buffers for return parameters must be 8-byte aligned.
+// Unaligned addresses may cause undefined results. For those parameters defined
+// as reserved or some fields defined as reserved must be zero filled or the invalid
+// argument return value may be returned or undefined result may occur during the
+// execution of the procedure. If the PalEntryPoint does not point to a valid
+// PAL entry point then the system behavior is undefined. This function is only
+// available on IPF.
+//
+// On Entry :
+// in0: PAL_PROC entrypoint
+// in1-in4 : PAL_PROC arguments
+//
+// Return Value:
+//
+// As per stacked calling conventions.
+//
+//--
+//---------------------------------------------------------------------------
+
+//
+// PAL function calls
+//
+#define PAL_MC_CLEAR_LOG 0x0015
+#define PAL_MC_DYNAMIC_STATE 0x0018
+#define PAL_MC_ERROR_INFO 0x0019
+#define PAL_MC_RESUME 0x001a
+
+
+.text
+.proc AsmPalCall
+.type AsmPalCall, @function
+
+AsmPalCall::
+ alloc loc1 = ar.pfs,5,8,4,0
+ mov loc0 = b0
+ mov loc3 = b5
+ mov loc4 = r2
+ mov loc7 = r1
+ mov r2 = psr;;
+ mov r28 = in1
+ mov loc5 = r2;;
+
+ movl loc6 = 0x100;;
+ cmp.ge p6,p7 = r28,loc6;;
+
+(p6) movl loc6 = 0x1FF;;
+(p7) br.dpnt.few PalCallStatic;; // 0 ~ 255 make a static Pal Call
+(p6) cmp.le p6,p7 = r28,loc6;;
+(p6) br.dpnt.few PalCallStacked;; // 256 ~ 511 make a stacked Pal Call
+(p7) movl loc6 = 0x300;;
+(p7) cmp.ge p6,p7 = r28,loc6;;
+(p7) br.dpnt.few PalCallStatic;; // 512 ~ 767 make a static Pal Call
+(p6) movl loc6 = 0x3FF;;
+(p6) cmp.le p6,p7 = r28,loc6;;
+(p6) br.dpnt.few PalCallStacked;; // 768 ~ 1023 make a stacked Pal Call
+
+(p7) mov r8 = 0xFFFFFFFFFFFFFFFF;; // > 1024 return invalid
+(p7) br.dpnt.few ComeBackFromPALCall;;
+
+PalCallStatic:
+ movl loc6 = PAL_MC_CLEAR_LOG;;
+ cmp.eq p6,p7 = r28,loc6;;
+
+(p7) movl loc6 = PAL_MC_DYNAMIC_STATE;;
+(p7) cmp.eq p6,p7 = r28,loc6;;
+
+(p7) movl loc6 = PAL_MC_ERROR_INFO;;
+(p7) cmp.eq p6,p7 = r28,loc6;;
+
+(p7) movl loc6 = PAL_MC_RESUME;;
+(p7) cmp.eq p6,p7 = r28,loc6 ;;
+
+ mov loc6 = 0x1;;
+(p7) dep r2 = loc6,r2,13,1;; // psr.ic = 1
+
+// p6 will be true, if it is one of the MCHK calls. There has been lots of debate
+// on psr.ic for these values. For now, do not do any thing to psr.ic
+
+ dep r2 = r0,r2,14,1;; // psr.i = 0
+
+ mov psr.l = r2
+ srlz.d // Needs data serailization.
+ srlz.i // Needs instruction serailization.
+
+StaticGetPALLocalIP:
+ mov loc2 = ip;;
+ add loc2 = ComeBackFromPALCall - StaticGetPALLocalIP,loc2;;
+ mov b0 = loc2 // return address after Pal call
+
+ mov r29 = in2
+ mov r30 = in3
+ mov r31 = in4
+ mov b5 = in0;; // get the PalProcEntrypt from input
+ br.sptk b5;; // Take the plunge.
+
+PalCallStacked:
+ dep r2 = r0,r2,14,1;; // psr.i = 0
+ mov psr.l = r2;;
+ srlz.d // Needs data serailization.
+ srlz.i // Needs instruction serailization.
+
+StackedGetPALLocalIP:
+ mov out0 = in1
+ mov out1 = in2
+ mov out2 = in3
+ mov out3 = in4
+ mov b5 = in0 ;; // get the PalProcEntrypt from input
+ br.call.dpnt b0 = b5 ;; // Take the plunge.
+
+ComeBackFromPALCall:
+ mov psr.l = loc5 ;;
+ srlz.d // Needs data serailization.
+ srlz.i // Needs instruction serailization.
+
+ mov b5 = loc3
+ mov r2 = loc4
+ mov r1 = loc7
+
+ mov b0 = loc0
+ mov ar.pfs = loc1;;
+ br.ret.dpnt b0;;
+
+.endp AsmPalCall
+
diff --git a/OldMdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c b/OldMdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c new file mode 100644 index 0000000000..49bd06b8c2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/CpuBreakpoint.c @@ -0,0 +1,118 @@ +/** @file
+ Base Library CPU functions for Itanium
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//void __mfa (void);
+
+#pragma intrinsic (_enable)
+#pragma intrinsic (_disable)
+#pragma intrinsic (__break)
+#pragma intrinsic (__mfa)
+
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __break (0);
+}
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+ __mfa ();
+}
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ )
+{
+ _disable ();
+}
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ )
+{
+ _enable ();
+}
+
+/**
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+**/
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ )
+{
+ EnableInterrupts ();
+ DisableInterrupts ();
+}
+
+/**
+ Places the CPU in a sleep state until an interrupt is received.
+
+ Places the CPU in a sleep state until an interrupt is received. If interrupts
+ are disabled prior to calling this function, then the CPU will be placed in a
+ sleep state indefinitely.
+
+**/
+VOID
+EFIAPI
+CpuSleep (
+ VOID
+ )
+{
+ PalCallStatic (NULL, 29, 0, 0, 0);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ipf/CpuFlushTlb.s b/OldMdePkg/Library/BaseLib/Ipf/CpuFlushTlb.s new file mode 100644 index 0000000000..520c51f6ba --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/CpuFlushTlb.s @@ -0,0 +1,58 @@ +/// @file
+/// CpuFlushTlb() function for Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: CpuFlushTlb.s
+///
+///
+
+.auto
+.text
+
+.globl PalCallStatic
+.type PalCallStatic, @function
+
+.proc CpuFlushTlb
+.type CpuFlushTlb, @function
+CpuFlushTlb::
+ alloc loc0 = ar.pfs, 0, 3, 5, 0
+ mov out0 = 0
+ mov out1 = 6
+ mov out2 = 0
+ mov out3 = 0
+ mov loc1 = b0
+ mov out4 = 0
+ brl.call.sptk b0 = PalCallStatic
+ mov loc2 = psr // save PSR
+ mov ar.pfs = loc0
+ extr.u r14 = r10, 32, 32 // r14 <- count1
+ rsm 1 << 14 // Disable interrupts
+ extr.u r15 = r11, 32, 32 // r15 <- stride1
+ extr.u r10 = r10, 0, 32 // r10 <- count2
+ add r10 = -1, r10
+ extr.u r11 = r11, 0, 32 // r11 <- stride2
+ br.cond.sptk LoopPredicate
+LoopOuter:
+ mov ar.lc = r10 // LC <- count2
+ mov ar.ec = r0 // EC <- 0
+Loop:
+ ptc.e r9
+ add r9 = r11, r9 // r9 += stride2
+ br.ctop.sptk Loop
+ add r9 = r15, r9 // r9 += stride1
+LoopPredicate:
+ cmp.ne p6 = r0, r14 // count1 == 0?
+ add r14 = -1, r14
+(p6) br.cond.sptk LoopOuter
+ mov psr.l = loc2
+ mov b0 = loc1
+ br.ret.sptk.many b0
+.endp
diff --git a/OldMdePkg/Library/BaseLib/Ipf/CpuPause.s b/OldMdePkg/Library/BaseLib/Ipf/CpuPause.s new file mode 100644 index 0000000000..f52692f438 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/CpuPause.s @@ -0,0 +1,25 @@ +/// @file
+/// CpuPause() function for Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: CpuPause.s
+///
+///
+
+.auto
+.text
+
+.proc CpuPause
+.type CpuPause, @function
+CpuPause::
+ hint @pause
+ br.ret.sptk.many b0
+.endp
diff --git a/OldMdePkg/Library/BaseLib/Ipf/ExecFc.s b/OldMdePkg/Library/BaseLib/Ipf/ExecFc.s new file mode 100644 index 0000000000..a5a9e9bc8a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/ExecFc.s @@ -0,0 +1,66 @@ +/// @file
+/// IPF specific AsmFc() and AsmFci () functions
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: ExecFc.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmFc
+//
+// This routine is used to execute a FC instruction on the specific address.
+//
+// Arguments :
+//
+// On Entry : The specific address need to execute FC instruction.
+//
+// Return Value: The specific address have been execute FC instruction.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmFc, @function
+.proc AsmFc
+.regstk 1, 0, 0, 0
+
+AsmFc::
+ fc in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmFc
+
+
+//---------------------------------------------------------------------------------
+//++
+// AsmFci
+//
+// This routine is used to execute a FC.i instruction on the specific address.
+//
+// Arguments :
+//
+// On Entry : The specific address need to execute FC.i instruction.
+//
+// Return Value: The specific address have been execute FC.i instruction.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmFci, @function
+.proc AsmFci
+.regstk 1, 0, 0, 0
+
+AsmFci::
+ fc.i in0
+ mov r8 = in0;;
+ br.ret.dpnt b0;;
+.endp AsmFci
\ No newline at end of file diff --git a/OldMdePkg/Library/BaseLib/Ipf/FlushCacheRange.s b/OldMdePkg/Library/BaseLib/Ipf/FlushCacheRange.s new file mode 100644 index 0000000000..655ab37c26 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/FlushCacheRange.s @@ -0,0 +1,96 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+// FlushCacheRange.s
+//
+// Abstract:
+// Assemble routine to flush cache lines
+//
+// Revision History:
+//
+//--
+.file "IpfCpuCache.s"
+
+#include "IpfMacro.i"
+#include "IpfDefines.h"
+
+//
+// Invalidates a range of instruction cache lines in the cache coherency domain
+// of the calling CPU.
+//
+// Invalidates the instruction cache lines specified by Address and Length. If
+// Address is not aligned on a cache line boundary, then entire instruction
+// cache line containing Address is invalidated. If Address + Length is not
+// aligned on a cache line boundary, then the entire instruction cache line
+// containing Address + Length -1 is invalidated. This function may choose to
+// invalidate the entire instruction cache if that is more efficient than
+// invalidating the specified range. If Length is 0, the no instruction cache
+// lines are invalidated. Address is returned.
+//
+// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+//
+// @param Address The base address of the instruction cache lines to
+// invalidate. If the CPU is in a physical addressing mode, then
+// Address is a physical address. If the CPU is in a virtual
+// addressing mode, then Address is a virtual address.
+//
+// @param Length The number of bytes to invalidate from the instruction cache.
+//
+// @return Address
+//
+// VOID *
+// EFIAPI
+// IpfFlushCacheRange (
+// IN VOID *Address,
+// IN UINTN Length
+// );
+//
+PROCEDURE_ENTRY (IpfFlushCacheRange)
+
+ NESTED_SETUP (5,8,0,0)
+
+ mov loc2 = ar.lc
+
+ mov loc3 = in0 // Start address.
+ mov loc4 = in1;; // Length in bytes.
+
+ cmp.eq p6,p7 = loc4, r0;; // If Length is zero then don't flush any cache
+ (p6) br.spnt.many DoneFlushingC;;
+
+ add loc4 = loc4,loc3
+ mov loc5 = 1;;
+ sub loc4 = loc4, loc5 ;; // the End address to flush
+
+ dep loc3 = r0,loc3,0,5
+ dep loc4 = r0,loc4,0,5;;
+ shr loc3 = loc3,5
+ shr loc4 = loc4,5;; // 32 byte cache line
+
+ sub loc4 = loc4,loc3;; // total flush count, It should be add 1 but
+ // the br.cloop will first execute one time
+ mov loc3 = in0
+ mov loc5 = 32
+ mov ar.lc = loc4;;
+
+StillFlushingC:
+ fc loc3;;
+ sync.i;;
+ srlz.i;;
+ add loc3 = loc5,loc3;;
+ br.cloop.sptk.few StillFlushingC;;
+
+DoneFlushingC:
+ mov ar.lc = loc2
+ mov r8 = in0 // return *Address
+ NESTED_RETURN
+
+PROCEDURE_EXIT (IpfFlushCacheRange)
+
diff --git a/OldMdePkg/Library/BaseLib/Ipf/GetInterruptState.s b/OldMdePkg/Library/BaseLib/Ipf/GetInterruptState.s new file mode 100644 index 0000000000..d5b5fc852f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/GetInterruptState.s @@ -0,0 +1,27 @@ +/// @file
+/// Retrieve of the interrupt state of the running processor for the Itanium
+/// architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: GetInterruptState.s
+///
+///
+
+.auto
+.text
+
+.proc GetInterruptState
+.type GetInterruptState, @function
+GetInterruptState::
+ mov r8 = psr
+ extr.u r8 = r8, 14, 1
+ br.ret.sptk.many b0
+.endp GetInterruptState
diff --git a/OldMdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s b/OldMdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s new file mode 100644 index 0000000000..3a278d7268 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange32.s @@ -0,0 +1,29 @@ +/// @file
+/// Contains an implementation of InterlockedCompareExchange32 on Itanium-
+/// based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: InterlockedCompareExchange32.s
+///
+///
+
+.auto
+.text
+
+.proc InternalSyncCompareExchange32
+.type InternalSyncCompareExchange32, @function
+InternalSyncCompareExchange32::
+ zxt4 r33 = r33
+ mov ar.ccv = r33
+ cmpxchg4.rel r8 = [r32], r34
+ mf
+ br.ret.sptk.many b0
+.endp InternalSyncCompareExchange32
\ No newline at end of file diff --git a/OldMdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s b/OldMdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s new file mode 100644 index 0000000000..88b9d2b490 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/InterlockedCompareExchange64.s @@ -0,0 +1,28 @@ +/// @file
+/// Contains an implementation of InterlockedCompareExchange64 on Itanium-
+/// based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: InterlockedCompareExchange64.s
+///
+///
+
+.auto
+.text
+
+.proc InternalSyncCompareExchange64
+.type InternalSyncCompareExchange64, @function
+InternalSyncCompareExchange64::
+ mov ar.ccv = r33
+ cmpxchg8.rel r8 = [r32], r34
+ mf
+ br.ret.sptk.many b0
+.endp InternalSyncCompareExchange64
\ No newline at end of file diff --git a/OldMdePkg/Library/BaseLib/Ipf/InternalSwitchStack.c b/OldMdePkg/Library/BaseLib/Ipf/InternalSwitchStack.c new file mode 100644 index 0000000000..60d0a37562 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/InternalSwitchStack.c @@ -0,0 +1,68 @@ +/** @file
+ SwitchStack() function for IPF.
+
+ Copyright (c) 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: InternalSwitchStack.c
+
+**/
+
+#include <BaseLibInternals.h>
+
+/** + Transfers control to a function starting with a new stack. + + Transfers control to the function specified by EntryPoint using the + new stack specified by NewStack and passing in the parameters specified + by Context1 and Context2. Context1 and Context2 are optional and may + be NULL. The function EntryPoint must never return. + Marker will be ignored on IA-32, x64, and EBC. + IPF CPUs expect one additional parameter of type VOID * that specifies + the new backing store pointer.
+ + If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+ + @param EntryPoint A pointer to function to call with the new stack. + @param Context1 A pointer to the context to pass into the EntryPoint + function. + @param Context2 A pointer to the context to pass into the EntryPoint + function. + @param NewStack A pointer to the new stack to use for the EntryPoint + function.
+ @param Marker VA_LIST marker for the variable argument list. + +**/
+VOID +EFIAPI +InternalSwitchStack ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack, + IN VA_LIST Marker + )
+
+{
+ VOID *NewBsp;
+
+ //
+ // Get new backing store pointer from variable list
+ //
+ NewBsp = VA_ARG (Marker, VOID *);
+
+ //
+ // Stack should be aligned with CPU_STACK_ALIGNMENT
+ //
+ ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);
+ ASSERT (((UINTN)NewBsp & (CPU_STACK_ALIGNMENT - 1)) == 0);
+
+ AsmSwitchStackAndBackingStore (EntryPoint, Context1, Context2, NewStack, NewBsp);
+}
diff --git a/OldMdePkg/Library/BaseLib/Ipf/PalCallStatic.s b/OldMdePkg/Library/BaseLib/Ipf/PalCallStatic.s new file mode 100644 index 0000000000..c21d7427f9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/PalCallStatic.s @@ -0,0 +1,48 @@ +/// @file
+/// Contains an implementation of CallPalProcStatic on Itanium-based
+/// architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: PalCallStatic.s
+///
+///
+
+.auto
+.text
+
+.proc PalCallStatic
+.type PalCallStatic, @function
+.regstk 5, 0, 0, 0
+PalCallStatic::
+ cmp.eq p15 = in0, r0
+ mov r31 = in4
+ mov r8 = ip
+
+(p15) mov in0 = ar.k5
+ add r8 = (_PalProcReturn - PalCallStatic), r8
+ mov r30 = in3
+
+ mov in4 = psr
+ mov in3 = b0
+ mov b7 = in0
+
+ rsm 1 << 14 // Disable interrupts
+ mov r29 = in2
+ mov r28 = in1
+
+ mov b0 = r8
+ br.cond.sptk.many b7
+
+_PalProcReturn:
+ mov psr.l = in4
+ mov b0 = in3
+ br.ret.sptk.many b0
+.endp PalCallStatic
diff --git a/OldMdePkg/Library/BaseLib/Ipf/ReadCpuid.s b/OldMdePkg/Library/BaseLib/Ipf/ReadCpuid.s new file mode 100644 index 0000000000..2176dad116 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/ReadCpuid.s @@ -0,0 +1,40 @@ +/// @file
+/// IPF specific AsmReadCpuid()function
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: ReadCpuid.s
+///
+///
+
+//---------------------------------------------------------------------------------
+//++
+// AsmReadCpuid
+//
+// This routine is used to Reads the current value of Processor Identifier Register (CPUID).
+//
+// Arguments :
+//
+// On Entry : The 8-bit Processor Identifier Register index to read.
+//
+// Return Value: The current value of Processor Identifier Register specified by Index.
+//
+//--
+//----------------------------------------------------------------------------------
+.text
+.type AsmReadCpuid, @function
+.proc AsmReadCpuid
+.regstk 1, 0, 0, 0
+
+AsmReadCpuid::
+ mov r8 = cpuid[in0];;
+ br.ret.dpnt b0;;
+.endp AsmReadCpuid
+
diff --git a/OldMdePkg/Library/BaseLib/Ipf/SwitchStack.s b/OldMdePkg/Library/BaseLib/Ipf/SwitchStack.s new file mode 100644 index 0000000000..a3c524f119 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/SwitchStack.s @@ -0,0 +1,50 @@ +/// @file
+/// IPF specific SwitchStack() function
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: SwitchStack.s
+///
+///
+
+.auto
+.text
+
+.proc AsmSwitchStackAndBackingStore
+.type AsmSwitchStackAndBackingStore, @function
+.regstk 5, 0, 0, 0
+AsmSwitchStackAndBackingStore::
+ mov r14 = ar.rsc
+ movl r2 = ~((((1 << 14) - 1) << 16) | 3)
+
+ mov r17 = in1
+ mov r18 = in2
+ and r2 = r14, r2
+
+ mov ar.rsc = r2
+ mov sp = in3
+ mov r19 = in4
+
+ ld8.nt1 r16 = [in0], 8
+ ld8.nta gp = [in0]
+ mov r3 = -1
+
+ loadrs
+ mov ar.bspstore = r19
+ mov b7 = r16
+
+ alloc r2 = ar.pfs, 0, 0, 2, 0
+ mov out0 = r17
+ mov out1 = r18
+
+ mov ar.rnat = r3
+ mov ar.rsc = r14
+ br.call.sptk.many b0 = b7
+.endp AsmSwitchStackAndBackingStore
diff --git a/OldMdePkg/Library/BaseLib/Ipf/Synchronization.c b/OldMdePkg/Library/BaseLib/Ipf/Synchronization.c new file mode 100644 index 0000000000..c29a8763d3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/Synchronization.c @@ -0,0 +1,79 @@ +/** @file
+ Implementation of synchronization functions on Itanium.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 OriginalValue;
+
+ do {
+ OriginalValue = *Value;
+ } while (OriginalValue != InternalSyncCompareExchange32 (
+ Value,
+ OriginalValue,
+ OriginalValue + 1
+ ));
+ return OriginalValue + 1;
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decrement value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decrement value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 OriginalValue;
+
+ do {
+ OriginalValue = *Value;
+ } while (OriginalValue != InternalSyncCompareExchange32 (
+ Value,
+ OriginalValue,
+ OriginalValue - 1
+ ));
+ return OriginalValue - 1;
+}
diff --git a/OldMdePkg/Library/BaseLib/Ipf/Unaligned.c b/OldMdePkg/Library/BaseLib/Ipf/Unaligned.c new file mode 100644 index 0000000000..fc634044b9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/Unaligned.c @@ -0,0 +1,243 @@ +/** @file
+ Unaligned access functions of BaseLib for IPF.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return (UINT16)(((UINT8*)Buffer)[0] | (((UINT8*)Buffer)[1] << 8));
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ ((UINT8*)Buffer)[0] = (UINT8)Value;
+ ((UINT8*)Buffer)[1] = (UINT8)(Value >> 8);
+
+ return Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return (UINT32)(
+ ReadUnaligned16 ((UINT16*)Buffer) |
+ (((UINT8*)Buffer)[2] << 16)
+ );
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
+ *(UINT8*)((UINT16*)Buffer + 1) = (UINT8)(Value >> 16);
+ return Value;
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ UINT16 LowerBytes;
+ UINT16 HigherBytes;
+
+ ASSERT (Buffer != NULL);
+
+ LowerBytes = ReadUnaligned16 ((UINT16*) Buffer);
+ HigherBytes = ReadUnaligned16 ((UINT16*) Buffer + 1);
+
+ return (UINT32) (LowerBytes | (HigherBytes << 16));
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ WriteUnaligned16 ((UINT16*)Buffer, (UINT16)Value);
+ WriteUnaligned16 ((UINT16*)Buffer + 1, (UINT16)(Value >> 16));
+ return Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ UINT32 LowerBytes;
+ UINT32 HigherBytes;
+
+ ASSERT (Buffer != NULL);
+
+ LowerBytes = ReadUnaligned32 ((UINT32*) Buffer);
+ HigherBytes = ReadUnaligned32 ((UINT32*) Buffer + 1);
+
+ return (UINT64) (LowerBytes | LShiftU64 (HigherBytes, 32));
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ WriteUnaligned32 ((UINT32*)Buffer, (UINT32)Value);
+ WriteUnaligned32 ((UINT32*)Buffer + 1, (UINT32)RShiftU64 (Value, 32));
+ return Value;
+}
diff --git a/OldMdePkg/Library/BaseLib/Ipf/asm.h b/OldMdePkg/Library/BaseLib/Ipf/asm.h new file mode 100644 index 0000000000..8ef0b30626 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/asm.h @@ -0,0 +1,27 @@ +/// @file
+/// This module contains generic macros for an assembly writer.
+///
+/// Copyright (c) 2006, Intel Corporation<BR>
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: asm.h
+///
+#ifndef _ASM_H
+#define _ASM_H
+
+#define TRUE 1
+#define FALSE 0
+#define PROCEDURE_ENTRY(name) .##text; \
+ .##type name, @function; \
+ .##proc name; \
+ name::
+
+#define PROCEDURE_EXIT(name) .##endp name
+
+#endif // _ASM_H
diff --git a/OldMdePkg/Library/BaseLib/Ipf/ia_64gen.h b/OldMdePkg/Library/BaseLib/Ipf/ia_64gen.h new file mode 100644 index 0000000000..081cc4a8f6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/ia_64gen.h @@ -0,0 +1,205 @@ +/// @file
+///
+///
+/// Copyright (c) 2006, Intel Corporation<BR>
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: ia_64gen.h
+///
+#ifndef _IA64GEN_H
+#define _IA64GEN_H
+
+#define TT_UNAT 0
+#define C_PSR 0
+#define J_UNAT 0
+#define T_TYPE 0
+#define T_IPSR 0x8
+#define T_ISR 0x10
+#define T_IIP 0x18
+#define T_IFA 0x20
+#define T_IIPA 0x28
+#define T_IFS 0x30
+#define T_IIM 0x38
+#define T_RSC 0x40
+#define T_BSP 0x48
+#define T_BSPSTORE 0x50
+#define T_RNAT 0x58
+#define T_PFS 0x60
+#define T_KBSPSTORE 0x68
+#define T_UNAT 0x70
+#define T_CCV 0x78
+#define T_DCR 0x80
+#define T_PREDS 0x88
+#define T_NATS 0x90
+#define T_R1 0x98
+#define T_GP 0x98
+#define T_R2 0xa0
+#define T_R3 0xa8
+#define T_R4 0xb0
+#define T_R5 0xb8
+#define T_R6 0xc0
+#define T_R7 0xc8
+#define T_R8 0xd0
+#define T_R9 0xd8
+#define T_R10 0xe0
+#define T_R11 0xe8
+#define T_R12 0xf0
+#define T_SP 0xf0
+#define T_R13 0xf8
+#define T_R14 0x100
+#define T_R15 0x108
+#define T_R16 0x110
+#define T_R17 0x118
+#define T_R18 0x120
+#define T_R19 0x128
+#define T_R20 0x130
+#define T_R21 0x138
+#define T_R22 0x140
+#define T_R23 0x148
+#define T_R24 0x150
+#define T_R25 0x158
+#define T_R26 0x160
+#define T_R27 0x168
+#define T_R28 0x170
+#define T_R29 0x178
+#define T_R30 0x180
+#define T_R31 0x188
+#define T_F2 0x1f0
+#define T_F3 0x200
+#define T_F4 0x210
+#define T_F5 0x220
+#define T_F6 0x230
+#define T_F7 0x240
+#define T_F8 0x250
+#define T_F9 0x260
+#define T_F10 0x270
+#define T_F11 0x280
+#define T_F12 0x290
+#define T_F13 0x2a0
+#define T_F14 0x2b0
+#define T_F15 0x2c0
+#define T_F16 0x2d0
+#define T_F17 0x2e0
+#define T_F18 0x2f0
+#define T_F19 0x300
+#define T_F20 0x310
+#define T_F21 0x320
+#define T_F22 0x330
+#define T_F23 0x340
+#define T_F24 0x350
+#define T_F25 0x360
+#define T_F26 0x370
+#define T_F27 0x380
+#define T_F28 0x390
+#define T_F29 0x3a0
+#define T_F30 0x3b0
+#define T_F31 0x3c0
+#define T_FPSR 0x1e0
+#define T_B0 0x190
+#define T_B1 0x198
+#define T_B2 0x1a0
+#define T_B3 0x1a8
+#define T_B4 0x1b0
+#define T_B5 0x1b8
+#define T_B6 0x1c0
+#define T_B7 0x1c8
+#define T_EC 0x1d0
+#define T_LC 0x1d8
+#define J_NATS 0x8
+#define J_PFS 0x10
+#define J_BSP 0x18
+#define J_RNAT 0x20
+#define J_PREDS 0x28
+#define J_LC 0x30
+#define J_R4 0x38
+#define J_R5 0x40
+#define J_R6 0x48
+#define J_R7 0x50
+#define J_SP 0x58
+#define J_F2 0x60
+#define J_F3 0x70
+#define J_F4 0x80
+#define J_F5 0x90
+#define J_F16 0xa0
+#define J_F17 0xb0
+#define J_F18 0xc0
+#define J_F19 0xd0
+#define J_F20 0xe0
+#define J_F21 0xf0
+#define J_F22 0x100
+#define J_F23 0x110
+#define J_F24 0x120
+#define J_F25 0x130
+#define J_F26 0x140
+#define J_F27 0x150
+#define J_F28 0x160
+#define J_F29 0x170
+#define J_F30 0x180
+#define J_F31 0x190
+#define J_FPSR 0x1a0
+#define J_B0 0x1a8
+#define J_B1 0x1b0
+#define J_B2 0x1b8
+#define J_B3 0x1c0
+#define J_B4 0x1c8
+#define J_B5 0x1d0
+#define TRAP_FRAME_LENGTH 0x3d0
+#define C_UNAT 0x28
+#define C_NATS 0x30
+#define C_PFS 0x8
+#define C_BSPSTORE 0x10
+#define C_RNAT 0x18
+#define C_RSC 0x20
+#define C_PREDS 0x38
+#define C_LC 0x40
+#define C_DCR 0x48
+#define C_R1 0x50
+#define C_GP 0x50
+#define C_R4 0x58
+#define C_R5 0x60
+#define C_R6 0x68
+#define C_R7 0x70
+#define C_SP 0x78
+#define C_R13 0x80
+#define C_F2 0x90
+#define C_F3 0xa0
+#define C_F4 0xb0
+#define C_F5 0xc0
+#define C_F16 0xd0
+#define C_F17 0xe0
+#define C_F18 0xf0
+#define C_F19 0x100
+#define C_F20 0x110
+#define C_F21 0x120
+#define C_F22 0x130
+#define C_F23 0x140
+#define C_F24 0x150
+#define C_F25 0x160
+#define C_F26 0x170
+#define C_F27 0x180
+#define C_F28 0x190
+#define C_F29 0x1a0
+#define C_F30 0x1b0
+#define C_F31 0x1c0
+#define C_FPSR 0x1d0
+#define C_B0 0x1d8
+#define C_B1 0x1e0
+#define C_B2 0x1e8
+#define C_B3 0x1f0
+#define C_B4 0x1f8
+#define C_B5 0x200
+#define TT_R2 0x8
+#define TT_R3 0x10
+#define TT_R8 0x18
+#define TT_R9 0x20
+#define TT_R10 0x28
+#define TT_R11 0x30
+#define TT_R14 0x38
+
+#endif _IA64GEN_H
diff --git a/OldMdePkg/Library/BaseLib/Ipf/longjmp.s b/OldMdePkg/Library/BaseLib/Ipf/longjmp.s new file mode 100644 index 0000000000..20a0df10f7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/longjmp.s @@ -0,0 +1,121 @@ +/// @file
+/// Contains an implementation of longjmp for the Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: longjmp.s
+///
+///
+
+.auto
+.text
+
+.proc InternalLongJump
+.type InternalLongJump, @function
+.regstk 2, 0, 0, 0
+InternalLongJump::
+ add r10 = 0x10*20 + 8*14, in0
+ movl r2 = ~((((1 << 14) - 1) << 16) | 3)
+
+ ld8.nt1 r14 = [r10], -8*2 // BSP, skip PFS
+ mov r15 = ar.bspstore // BSPSTORE
+
+ ld8.nt1 r17 = [r10], -8 // UNAT after spill
+ mov r16 = ar.rsc // RSC
+ cmp.leu p6 = r14, r15
+
+ ld8.nt1 r18 = [r10], -8 // UNAT
+ ld8.nt1 r25 = [r10], -8 // b5
+ and r2 = r16, r2
+
+ ldf.fill.nt1 f2 = [in0], 0x10
+ ld8.nt1 r24 = [r10], -8 // b4
+ mov b5 = r25
+
+ mov ar.rsc = r2
+ ld8.nt1 r23 = [r10], -8 // b3
+ mov b4 = r24
+
+ ldf.fill.nt1 f3 = [in0], 0x10
+ mov ar.unat = r17
+(p6) br.spnt.many _skip_flushrs
+
+ flushrs
+ mov r15 = ar.bsp // New BSPSTORE
+
+_skip_flushrs:
+ mov r31 = ar.rnat // RNAT
+ loadrs
+
+ ldf.fill.nt1 f4 = [in0], 0x10
+ ld8.nt1 r22 = [r10], -8
+ dep r2 = -1, r14, 3, 6
+
+ ldf.fill.nt1 f5 = [in0], 0x10
+ ld8.nt1 r21 = [r10], -8
+ cmp.ltu p6 = r2, r15
+
+ ld8.nt1 r20 = [r10], -0x10 // skip sp
+(p6) ld8.nta r31 = [r2]
+ mov b3 = r23
+
+ ldf.fill.nt1 f16 = [in0], 0x10
+ ld8.fill.nt1 r7 = [r10], -8
+ mov b2 = r22
+
+ ldf.fill.nt1 f17 = [in0], 0x10
+ ld8.fill.nt1 r6 = [r10], -8
+ mov b1 = r21
+
+ ldf.fill.nt1 f18 = [in0], 0x10
+ ld8.fill.nt1 r5 = [r10], -8
+ mov b0 = r20
+
+ ldf.fill.nt1 f19 = [in0], 0x10
+ ld8.fill.nt1 r4 = [r10], 8*13
+
+ ldf.fill.nt1 f20 = [in0], 0x10
+ ld8.nt1 r19 = [r10], 0x10 // PFS
+
+ ldf.fill.nt1 f21 = [in0], 0x10
+ ld8.nt1 r26 = [r10], 8 // Predicate
+ mov ar.pfs = r19
+
+ ldf.fill.nt1 f22 = [in0], 0x10
+ ld8.nt1 r27 = [r10], 8 // LC
+ mov pr = r26, -1
+
+ ldf.fill.nt1 f23 = [in0], 0x10
+ ld8.nt1 r28 = [r10], -17*8 - 0x10
+ mov ar.lc = r27
+
+ ldf.fill.nt1 f24 = [in0], 0x10
+ ldf.fill.nt1 f25 = [in0], 0x10
+ mov r8 = in1
+
+ ldf.fill.nt1 f26 = [in0], 0x10
+ ldf.fill.nt1 f31 = [r10], -0x10
+
+ ldf.fill.nt1 f27 = [in0], 0x10
+ ldf.fill.nt1 f30 = [r10], -0x10
+
+ ldf.fill.nt1 f28 = [in0]
+ ldf.fill.nt1 f29 = [r10], 0x10*3 + 8*4
+
+ ld8.fill.nt1 sp = [r10]
+ mov ar.unat = r18
+
+ mov ar.bspstore = r14
+ mov ar.rnat = r31
+
+ invala
+ mov ar.rsc = r16
+ br.ret.sptk b0
+.endp
diff --git a/OldMdePkg/Library/BaseLib/Ipf/setjmp.s b/OldMdePkg/Library/BaseLib/Ipf/setjmp.s new file mode 100644 index 0000000000..e2b346ee72 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Ipf/setjmp.s @@ -0,0 +1,108 @@ +/// @file
+/// Contains an implementation of longjmp for the Itanium-based architecture.
+///
+/// Copyright (c) 2006, Intel Corporation
+/// All rights reserved. This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution. The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name: longjmp.s
+///
+///
+
+.auto
+.text
+
+.globl InternalAssertJumpBuffer
+.type InternalAssertJumpBuffer, @function
+
+.proc SetJump
+.type SetJump, @function
+SetJump::
+ alloc loc0 = ar.pfs, 1, 2, 1, 0
+ mov loc1 = b0
+ mov out0 = in0
+
+ brl.call.sptk.many b0 = InternalAssertJumpBuffer
+
+ mov r14 = ar.unat
+ mov r15 = ar.bsp
+ add r10 = 0x10*20, in0
+
+ stf.spill.nta [in0] = f2, 0x10
+ st8.spill.nta [r10] = r4, 8
+ mov r21 = b1
+
+ stf.spill.nta [in0] = f3, 0x10
+ st8.spill.nta [r10] = r5, 8
+ mov r22 = b2
+
+ stf.spill.nta [in0] = f4, 0x10
+ st8.spill.nta [r10] = r6, 8
+ mov r23 = b3
+
+ stf.spill.nta [in0] = f5, 0x10
+ st8.spill.nta [r10] = r7, 8
+ mov r24 = b4
+
+ stf.spill.nta [in0] = f16, 0x10
+ st8.spill.nta [r10] = sp, 8
+ mov r25 = b5
+
+ stf.spill.nta [in0] = f17, 0x10
+ st8.nta [r10] = loc1, 8
+ mov r16 = pr
+
+ stf.spill.nta [in0] = f18, 0x10
+ st8.nta [r10] = r21, 8
+ mov r17 = ar.lc
+
+ stf.spill.nta [in0] = f19, 0x10
+ st8.nta [r10] = r22, 8
+
+ stf.spill.nta [in0] = f20, 0x10
+ st8.nta [r10] = r23, 8
+
+ stf.spill.nta [in0] = f21, 0x10
+ st8.nta [r10] = r24, 8
+
+ stf.spill.nta [in0] = f22, 0x10
+ st8.nta [r10] = r25, 8
+
+ stf.spill.nta [in0] = f23, 0x10
+ mov r18 = ar.unat
+
+ stf.spill.nta [in0] = f24, 0x10
+ st8.nta [r10] = r14, 8 // UNAT
+
+ stf.spill.nta [in0] = f25, 0x10
+ st8.nta [r10] = r18, 8 // UNAT after spill
+
+ stf.spill.nta [in0] = f26, 0x10
+ st8.nta [r10] = loc0, 8 // PFS
+
+ stf.spill.nta [in0] = f27, 0x10
+ st8.nta [r10] = r15, 8 // BSP
+ mov r8 = 0
+
+ stf.spill.nta [in0] = f28, 0x10
+ mov r19 = ar.fpsr
+
+ stf.spill.nta [in0] = f29, 0x10
+ st8.nta [r10] = r16, 8 // PR
+ mov ar.pfs = loc0
+
+ stf.spill.nta [in0] = f30, 0x10
+ st8.nta [r10] = r17, 8 // LC
+ mov b0 = loc1
+
+ stf.spill.nta [in0] = f31, 0x10
+ st8.nta [r10] = r19 // FPSR
+
+ mov ar.unat = r14
+ br.ret.sptk b0
+.endp SetJump
diff --git a/OldMdePkg/Library/BaseLib/LRotU32.c b/OldMdePkg/Library/BaseLib/LRotU32.c new file mode 100644 index 0000000000..ea782463d0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LRotU32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT32
+EFIAPI
+LRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand << Count) | (Operand >> (32 - Count));
+}
diff --git a/OldMdePkg/Library/BaseLib/LRotU64.c b/OldMdePkg/Library/BaseLib/LRotU64.c new file mode 100644 index 0000000000..cf751f98f5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LRotU64.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+LRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLRotU64 (Operand, Count);
+}
diff --git a/OldMdePkg/Library/BaseLib/LShiftU64.c b/OldMdePkg/Library/BaseLib/LShiftU64.c new file mode 100644 index 0000000000..50449eb9e3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
+ with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+LShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathLShiftU64 (Operand, Count);
+}
diff --git a/OldMdePkg/Library/BaseLib/LinkedList.c b/OldMdePkg/Library/BaseLib/LinkedList.c new file mode 100644 index 0000000000..f588eacd0c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LinkedList.c @@ -0,0 +1,465 @@ +/** @file
+ Linked List Library Functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LinkedList.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that locates the Node in the List
+
+ By searching the List, finds the location of the Node in List. At the same time,
+ verifies the validity of this list.
+
+ If List is NULL, then ASSERT().
+ If List->ForwardLink is NULL, then ASSERT().
+ If List->backLink is NULL, then ASSERT().
+ If Node is NULL, then ASSERT();
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param List A pointer to a node in a linked list.
+ @param Node A pointer to one nod.
+
+ @retval TRUE Node is in List
+ @retval FALSE Node isn't in List, or List is invalid
+
+**/
+BOOLEAN
+IsNodeInList (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ UINTN Count;
+ CONST LIST_ENTRY *Ptr;
+ BOOLEAN Found;
+
+ //
+ // Test the validity of List and Node
+ //
+ ASSERT (List != NULL);
+ ASSERT (List->ForwardLink != NULL);
+ ASSERT (List->BackLink != NULL);
+ ASSERT (Node != NULL);
+
+ Count = PcdGet32 (PcdMaximumLinkedListLength);
+
+ Ptr = List;
+ do {
+ Ptr = Ptr->ForwardLink;
+ Count--;
+ } while ((Ptr != List) && (Ptr != Node) && (Count > 0));
+ Found = (BOOLEAN)(Ptr == Node);
+
+ if (PcdGet32 (PcdMaximumLinkedListLength) > 0) {
+ while ((Count > 0) && (Ptr != List)) {
+ Ptr = Ptr->ForwardLink;
+ Count--;
+ }
+ ASSERT (Count > 0);
+ }
+
+ return Found;
+}
+
+/**
+ Initializes the head node of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this function, the other linked list
+ functions may be used to add and remove nodes from the linked list. It is up
+ to the caller of this function to allocate the memory for ListHead.
+
+ If ListHead is NULL, then ASSERT().
+
+ @param ListHead A pointer to the head node of a new doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InitializeListHead (
+ IN OUT LIST_ENTRY *List
+ )
+
+{
+ ASSERT (List != NULL);
+
+ List->ForwardLink = List;
+ List->BackLink = List;
+ return List;
+}
+
+/**
+ Adds a node to the beginning of a doubly linked list, and returns the pointer
+ to the head node of the doubly linked list.
+
+ Adds the node Entry at the beginning of the doubly linked list denoted by
+ ListHead, and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be inserted at the beginning
+ of a doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertHeadList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List->ForwardLink;
+ Entry->BackLink = List;
+ Entry->ForwardLink->BackLink = Entry;
+ List->ForwardLink = Entry;
+ return List;
+}
+
+/**
+ Adds a node to the end of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Adds the node Entry to the end of the doubly linked list denoted by ListHead,
+ and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be added at the end of the
+ doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertTailList (
+ IN OUT LIST_ENTRY *List,
+ IN OUT LIST_ENTRY *Entry
+ )
+{
+ //
+ // ASSERT List not too long and Entry is not one of the nodes of List
+ //
+ ASSERT (!IsNodeInList (List, Entry));
+
+ Entry->ForwardLink = List;
+ Entry->BackLink = List->BackLink;
+ Entry->BackLink->ForwardLink = Entry;
+ List->BackLink = Entry;
+ return List;
+}
+
+/**
+ Retrieves the first node of a doubly linked list.
+
+ Returns the first node of a doubly linked list. List must have been
+ initialized with InitializeListHead(). If List is empty, then NULL is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+
+ @return The first node of a doubly linked list.
+ @retval NULL The list is empty.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetFirstNode (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return List->ForwardLink;
+}
+
+/**
+ Retrieves the next node of a doubly linked list.
+
+ Returns the node of a doubly linked list that follows Node. List must have
+ been initialized with InitializeListHead(). If List is empty, then List is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @return Pointer to the next node if one exists. Otherwise a null value which
+ is actually List is returned.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetNextNode (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return Node->ForwardLink;
+}
+
+/**
+ Checks to see if a doubly linked list is empty or not.
+
+ Checks to see if the doubly linked list is empty. If the linked list contains
+ zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
+
+ If ListHead is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+
+ @retval TRUE The linked list is empty.
+ @retval FALSE The linked list is not empty.
+
+**/
+BOOLEAN
+EFIAPI
+IsListEmpty (
+ IN CONST LIST_ENTRY *List
+ )
+{
+ //
+ // ASSERT List not too long
+ //
+ ASSERT (IsNodeInList (List, List));
+
+ return (BOOLEAN)(List->ForwardLink == List);
+}
+
+/**
+ Determines if a node in a doubly linked list is null.
+
+ Returns FALSE if Node is one of the nodes in the doubly linked list specified
+ by List. Otherwise, TRUE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+ If Node is not a node in List and Node is not equal to List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is one of the nodes in the doubly linked list.
+ @retval FALSE Node is not one of the nodes in the doubly linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNull (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(Node == List);
+}
+
+/**
+ Determines if a node the last node in a doubly linked list.
+
+ Returns TRUE if Node is the last node in the doubly linked list specified by
+ List. Otherwise, FALSE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is the last node in the linked list.
+ @retval FALSE Node is not the last node in the linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeAtEnd (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ )
+{
+ //
+ // ASSERT List not too long and Node is one of the nodes of List
+ //
+ ASSERT (IsNodeInList (List, Node));
+
+ return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);
+}
+
+/**
+ Swaps the location of two nodes in a doubly linked list, and returns the
+ first node after the swap.
+
+ If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
+ Otherwise, the location of the FirstEntry node is swapped with the location
+ of the SecondEntry node in a doubly linked list. SecondEntry must be in the
+ same double linked list as FirstEntry and that double linked list must have
+ been initialized with InitializeListHead(). SecondEntry is returned after the
+ nodes are swapped.
+
+ If FirstEntry is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT().
+ If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
+ If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
+ linked list containing the FirstEntry and SecondEntry nodes, including
+ the FirstEntry and SecondEntry nodes, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to another node in the same linked list.
+
+**/
+LIST_ENTRY *
+EFIAPI
+SwapListEntries (
+ IN OUT LIST_ENTRY *FirstEntry,
+ IN OUT LIST_ENTRY *SecondEntry
+ )
+{
+ LIST_ENTRY *Ptr;
+
+ if (FirstEntry == SecondEntry) {
+ return SecondEntry;
+ }
+
+ //
+ // ASSERT Entry1 and Entry2 are in the same linked list
+ //
+ ASSERT (IsNodeInList (FirstEntry, SecondEntry));
+
+ //
+ // Ptr is the node pointed to by FirstEntry->ForwardLink
+ //
+ Ptr = RemoveEntryList (FirstEntry);
+
+ //
+ // If FirstEntry immediately follows SecondEntry, FirstEntry willl be placed
+ // immediately in front of SecondEntry
+ //
+ if (Ptr->BackLink == SecondEntry) {
+ return InsertTailList (SecondEntry, FirstEntry);
+ }
+
+ //
+ // Ptr == SecondEntry means SecondEntry immediately follows FirstEntry,
+ // then there are no further steps necessary
+ //
+ if (Ptr == InsertHeadList (SecondEntry, FirstEntry)) {
+ return Ptr;
+ }
+
+ //
+ // Move SecondEntry to the front of Ptr
+ //
+ RemoveEntryList (SecondEntry);
+ InsertTailList (Ptr, SecondEntry);
+ return SecondEntry;
+}
+
+/**
+ Removes a node from a doubly linked list, and returns the node that follows
+ the removed node.
+
+ Removes the node Entry from a doubly linked list. It is up to the caller of
+ this function to release the memory used by this node if that is required. On
+ exit, the node following Entry in the doubly linked list is returned. If
+ Entry is the only node in the linked list, then the head node of the linked
+ list is returned.
+
+ If Entry is NULL, then ASSERT().
+ If Entry is the head node of an empty list, then ASSERT().
+ If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
+ linked list containing Entry, including the Entry node, is greater than
+ or equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param Entry A pointer to a node in a linked list
+
+ @return Entry
+
+**/
+LIST_ENTRY *
+EFIAPI
+RemoveEntryList (
+ IN CONST LIST_ENTRY *Entry
+ )
+{
+ ASSERT (!IsListEmpty (Entry));
+
+ Entry->ForwardLink->BackLink = Entry->BackLink;
+ Entry->BackLink->ForwardLink = Entry->ForwardLink;
+ return Entry->ForwardLink;
+}
diff --git a/OldMdePkg/Library/BaseLib/LongJump.c b/OldMdePkg/Library/BaseLib/LongJump.c new file mode 100644 index 0000000000..90a915e233 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LongJump.c @@ -0,0 +1,45 @@ +/** @file
+ Long Jump functions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LongJump.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer.
+ This function never returns to the caller.
+ Instead is resumes execution based on the state of JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Value is 0, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is restored.
+
+**/
+VOID
+EFIAPI
+LongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ )
+{
+ InternalAssertJumpBuffer (JumpBuffer);
+ ASSERT (Value != 0);
+
+ InternalLongJump (JumpBuffer, Value);
+}
diff --git a/OldMdePkg/Library/BaseLib/LowBitSet32.c b/OldMdePkg/Library/BaseLib/LowBitSet32.c new file mode 100644 index 0000000000..5a21245264 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LowBitSet32.c @@ -0,0 +1,44 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 32-bit value.
+
+ This function computes the bit position of the lowest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet32 (
+ IN UINT32 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0; (Operand & 1) == 0; BitIndex++, Operand >>= 1);
+ return BitIndex;
+}
diff --git a/OldMdePkg/Library/BaseLib/LowBitSet64.c b/OldMdePkg/Library/BaseLib/LowBitSet64.c new file mode 100644 index 0000000000..a3e5ba0842 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/LowBitSet64.c @@ -0,0 +1,46 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Returns the bit position of the lowest bit set in a 64-bit value.
+
+ This function computes the bit position of the lowest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet64 (
+ IN UINT64 Operand
+ )
+{
+ INTN BitIndex;
+
+ if (Operand == 0) {
+ return -1;
+ }
+
+ for (BitIndex = 0;
+ (Operand & 1) == 0;
+ BitIndex++, Operand = RShiftU64 (Operand, 1));
+ return BitIndex;
+}
diff --git a/OldMdePkg/Library/BaseLib/Math64.c b/OldMdePkg/Library/BaseLib/Math64.c new file mode 100644 index 0000000000..514ae99020 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Math64.c @@ -0,0 +1,371 @@ +/** @file
+ Leaf math worker functions that require 64-bit arithmetic support from the
+ compiler.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Math64.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand << Count;
+}
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits
+ are filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return Operand >> Count;
+}
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits
+ are filled with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand arithmetically shifted right by Count
+
+**/
+UINT64
+EFIAPI
+InternalMathARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ INTN TestValue;
+
+ //
+ // Test if this compiler supports arithmetic shift
+ //
+ TestValue = (((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1));
+ if (TestValue == -1) {
+ //
+ // Arithmetic shift is supported
+ //
+ return (UINT64)((INT64)Operand >> Count);
+ }
+
+ //
+ // Arithmetic is not supported
+ //
+ return (Operand >> Count) |
+ ((INTN)Operand < 0 ? ~((UINTN)-1 >> Count) : 0);
+}
+
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling
+ the low bits with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand << Count) | (Operand >> (64 - Count));
+}
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling
+ the high bits with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+InternalMathRRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ return (Operand >> Count) | (Operand << (64 - Count));
+}
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+InternalMathSwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ UINT64 LowerBytes;
+ UINT64 HigherBytes;
+
+ LowerBytes = (UINT64) SwapBytes32 ((UINT32) Operand);
+ HigherBytes = (UINT64) SwapBytes32 ((UINT32) (Operand >> 32));
+
+ return (LowerBytes << 32 | HigherBytes);
+}
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer
+ and generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+InternalMathMultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ return Multiplicand * Multiplier;
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return Dividend / Divisor;
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer
+ and generates a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+InternalMathModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ return (UINT32)(Dividend % Divisor);
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = (UINT32)(Dividend % Divisor);
+ }
+ return Dividend / Divisor;
+}
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+InternalMathDivRemU64x64 (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and
+ generates a 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+InternalMathDivRemS64x64 (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ )
+{
+ if (Remainder != NULL) {
+ *Remainder = Dividend % Divisor;
+ }
+ return Dividend / Divisor;
+}
diff --git a/OldMdePkg/Library/BaseLib/ModU64x32.c b/OldMdePkg/Library/BaseLib/ModU64x32.c new file mode 100644 index 0000000000..a8737f43f6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/ModU64x32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+ModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ )
+{
+ ASSERT (Divisor != 0);
+ return InternalMathModU64x32 (Dividend, Divisor);
+}
diff --git a/OldMdePkg/Library/BaseLib/MultS64x64.c b/OldMdePkg/Library/BaseLib/MultS64x64.c new file mode 100644 index 0000000000..7e8d3184f5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/MultS64x64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result.
+
+ This function multiples the 64-bit signed value Multiplicand by the 64-bit
+ signed value Multiplier and generates a 64-bit signed result. This 64-bit
+ signed result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit signed value.
+ @param Multiplier A 64-bit signed value.
+
+ @return Multiplicand * Multiplier
+
+**/
+INT64
+EFIAPI
+MultS64x64 (
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
+ )
+{
+ return (INT64)MultU64x64 (Multiplicand, Multiplier);
+}
diff --git a/OldMdePkg/Library/BaseLib/MultU64x32.c b/OldMdePkg/Library/BaseLib/MultU64x32.c new file mode 100644 index 0000000000..c3a25c6f34 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/MultU64x32.c @@ -0,0 +1,43 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x32 (Multiplicand, Multiplier);
+
+ return Result;
+}
diff --git a/OldMdePkg/Library/BaseLib/MultU64x64.c b/OldMdePkg/Library/BaseLib/MultU64x64.c new file mode 100644 index 0000000000..997abbc27e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/MultU64x64.c @@ -0,0 +1,43 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ )
+{
+ UINT64 Result;
+
+ Result = InternalMathMultU64x64 (Multiplicand, Multiplier);
+
+ return Result;
+}
diff --git a/OldMdePkg/Library/BaseLib/RRotU32.c b/OldMdePkg/Library/BaseLib/RRotU32.c new file mode 100644 index 0000000000..93dda94b9f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/RRotU32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
+ with the low bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT32
+EFIAPI
+RRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return (Operand >> Count) | (Operand << (32 - Count));
+}
diff --git a/OldMdePkg/Library/BaseLib/RRotU64.c b/OldMdePkg/Library/BaseLib/RRotU64.c new file mode 100644 index 0000000000..d55bbfc79f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/RRotU64.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
+ with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+RRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRRotU64 (Operand, Count);
+}
diff --git a/OldMdePkg/Library/BaseLib/RShiftU64.c b/OldMdePkg/Library/BaseLib/RShiftU64.c new file mode 100644 index 0000000000..f9ae4f6efa --- /dev/null +++ b/OldMdePkg/Library/BaseLib/RShiftU64.c @@ -0,0 +1,41 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
+ filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+RShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ )
+{
+ ASSERT (Count < sizeof (Operand) * 8);
+ return InternalMathRShiftU64 (Operand, Count);
+}
diff --git a/OldMdePkg/Library/BaseLib/SetJump.c b/OldMdePkg/Library/BaseLib/SetJump.c new file mode 100644 index 0000000000..d6c2723b2a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SetJump.c @@ -0,0 +1,40 @@ +/** @file
+ Internal ASSERT () functions for SetJump.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SetJump.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Worker function that checks ASSERT condition for JumpBuffer
+
+ Checks ASSERT condition for JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ If JumpBuffer is not aligned on a BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT
+ boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+**/
+VOID
+EFIAPI
+InternalAssertJumpBuffer (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ )
+{
+ ASSERT (JumpBuffer != NULL);
+
+ ASSERT (((UINTN)JumpBuffer & ((BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT - 1) >> 8)) == 0);
+}
diff --git a/OldMdePkg/Library/BaseLib/String.c b/OldMdePkg/Library/BaseLib/String.c new file mode 100644 index 0000000000..3236f4cfa6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/String.c @@ -0,0 +1,2071 @@ +/** @file + Unicode and ASCII string primatives. + + Copyright (c) 2006 - 2007, Intel Corporation<BR> + All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + Module Name: String.c + +**/ + +#include "BaseLibInternals.h" + +/** + Copies one Null-terminated Unicode string to another Null-terminated Unicode + string and returns the new Unicode string. + + This function copies the contents of the Unicode string Source to the Unicode + string Destination, and returns Destination. If Source and Destination + overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + + @return Destiantion + +**/ +CHAR16 * +EFIAPI +StrCpy ( + OUT CHAR16 *Destination, + IN CONST CHAR16 *Source + ) +{ + CHAR16 *ReturnValue; + + // + // Destination cannot be NULL + // + ASSERT (Destination != NULL); + ASSERT (((UINTN) Destination & 0x01) == 0); + + // + // Destination and source cannot overlap + // + ASSERT ((UINTN)(Destination - Source) > StrLen (Source)); + ASSERT ((UINTN)(Source - Destination) > StrLen (Source)); + + ReturnValue = Destination; + while (*Source) { + *(Destination++) = *(Source++); + } + *Destination = 0; + return ReturnValue; +} + +/** + Copies one Null-terminated Unicode string with a maximum length to another + Null-terminated Unicode string with a maximum length and returns the new + Unicode string. + + This function copies the contents of the Unicode string Source to the Unicode + string Destination, and returns Destination. At most, Length Unicode + characters are copied from Source to Destination. If Length is 0, then + Destination is returned unmodified. If Length is greater that the number of + Unicode characters in Source, then Destination is padded with Null Unicode + characters. If Source and Destination overlap, then the results are + undefined. + + If Length > 0 and Destination is NULL, then ASSERT(). + If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Length > 0 and Source is NULL, then ASSERT(). + If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + @param Length Maximum number of Unicode characters to copy. + + @return Destination + +**/ +CHAR16 * +EFIAPI +StrnCpy ( + OUT CHAR16 *Destination, + IN CONST CHAR16 *Source, + IN UINTN Length + ) +{ + CHAR16 *ReturnValue; + + if (Length == 0) { + return Destination; + } + + // + // Destination cannot be NULL if Length is not zero + // + ASSERT (Destination != NULL); + ASSERT (((UINTN) Destination & 0x01) == 0); + + // + // Destination and source cannot overlap + // Q: Does Source have to be NULL-terminated? + // + ASSERT ((UINTN)(Destination - Source) > StrLen (Source)); + ASSERT ((UINTN)(Source - Destination) >= Length); + + ReturnValue = Destination; + + while ((*Source != L'\0') && (Length > 0)) { + *(Destination++) = *(Source++); + Length--; + } + + ZeroMem (Destination, Length * sizeof (*Destination)); + return ReturnValue; +} + +/** + Returns the length of a Null-terminated Unicode string. + + This function returns the number of Unicode characters in the Null-terminated + Unicode string specified by String. + + If String is NULL, then ASSERT(). + If String is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @return The length of String. + +**/ +UINTN +EFIAPI +StrLen ( + IN CONST CHAR16 *String + ) +{ + UINTN Length; + + ASSERT (String != NULL); + ASSERT (((UINTN) String & 0x01) == 0); + + for (Length = 0; *String != L'\0'; String++, Length++) { + // + // If PcdMaximumUnicodeStringLength is not zero, + // length should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) { + ASSERT (Length < PcdGet32 (PcdMaximumUnicodeStringLength)); + } + } + return Length; +} + +/** + Returns the size of a Null-terminated Unicode string in bytes, including the + Null terminator. + + This function returns the size, in bytes, of the Null-terminated Unicode + string specified by String. + + If String is NULL, then ASSERT(). + If String is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @return The size of String. + +**/ +UINTN +EFIAPI +StrSize ( + IN CONST CHAR16 *String + ) +{ + return (StrLen (String) + 1) * sizeof (*String); +} + +/** + Compares two Null-terminated Unicode strings, and returns the difference + between the first mismatched Unicode characters. + + This function compares the Null-terminated Unicode string FirstString to the + Null-terminated Unicode string SecondString. If FirstString is identical to + SecondString, then 0 is returned. Otherwise, the value returned is the first + mismatched Unicode character in SecondString subtracted from the first + mismatched Unicode character in FirstString. + + If FirstString is NULL, then ASSERT(). + If FirstString is not aligned on a 16-bit boundary, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If SecondString is not aligned on a 16-bit boundary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated Unicode string. + @param SecondString Pointer to a Null-terminated Unicode string. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +StrCmp ( + IN CONST CHAR16 *FirstString, + IN CONST CHAR16 *SecondString + ) +{ + // + // ASSERT both strings are less long than PcdMaximumUnicodeStringLength + // + ASSERT (StrSize (FirstString) != 0); + ASSERT (StrSize (SecondString) != 0); + + while ((*FirstString != L'\0') && (*FirstString == *SecondString)) { + FirstString++; + SecondString++; + } + return *FirstString - *SecondString; +} + +/** + Compares two Null-terminated Unicode strings with maximum lengths, and + returns the difference between the first mismatched Unicode characters. + + This function compares the Null-terminated Unicode string FirstString to the + Null-terminated Unicode string SecondString. At most, Length Unicode + characters will be compared. If Length is 0, then 0 is returned. If + FirstString is identical to SecondString, then 0 is returned. Otherwise, the + value returned is the first mismatched Unicode character in SecondString + subtracted from the first mismatched Unicode character in FirstString. + + If Length > 0 and FirstString is NULL, then ASSERT(). + If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT(). + If Length > 0 and SecondString is NULL, then ASSERT(). + If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated Unicode string. + @param SecondString Pointer to a Null-terminated Unicode string. + @param Length Maximum number of Unicode characters to compare. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +StrnCmp ( + IN CONST CHAR16 *FirstString, + IN CONST CHAR16 *SecondString, + IN UINTN Length + ) +{ + if (Length == 0) { + return 0; + } + + // + // ASSERT both strings are less long than PcdMaximumUnicodeStringLength. + // Length tests are performed inside StrLen(). + // + ASSERT (StrSize (FirstString) != 0); + ASSERT (StrSize (SecondString) != 0); + + while ((*FirstString != L'\0') && + (*FirstString == *SecondString) && + (Length > 1)) { + FirstString++; + SecondString++; + Length--; + } + + return *FirstString - *SecondString; +} + +/** + Concatenates one Null-terminated Unicode string to another Null-terminated + Unicode string, and returns the concatenated Unicode string. + + This function concatenates two Null-terminated Unicode strings. The contents + of Null-terminated Unicode string Source are concatenated to the end of + Null-terminated Unicode string Destination. The Null-terminated concatenated + Unicode String is returned. If Source and Destination overlap, then the + results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Destination contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination + and Source results in a Unicode string with more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + + @return Destination + +**/ +CHAR16 * +EFIAPI +StrCat ( + IN OUT CHAR16 *Destination, + IN CONST CHAR16 *Source + ) +{ + StrCpy (Destination + StrLen (Destination), Source); + + // + // Size of the resulting string should never be zero. + // PcdMaximumUnicodeStringLength is tested inside StrLen(). + // + ASSERT (StrSize (Destination) != 0); + return Destination; +} + +/** + Concatenates one Null-terminated Unicode string with a maximum length to the + end of another Null-terminated Unicode string, and returns the concatenated + Unicode string. + + This function concatenates two Null-terminated Unicode strings. The contents + of Null-terminated Unicode string Source are concatenated to the end of + Null-terminated Unicode string Destination, and Destination is returned. At + most, Length Unicode characters are concatenated from Source to the end of + Destination, and Destination is always Null-terminated. If Length is 0, then + Destination is returned unmodified. If Source and Destination overlap, then + the results are undefined. + + If Destination is NULL, then ASSERT(). + If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Length > 0 and Source is NULL, then ASSERT(). + If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Destination contains more + than PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination + and Source results in a Unicode string with more than + PcdMaximumUnicodeStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated Unicode string. + @param Source Pointer to a Null-terminated Unicode string. + @param Length Maximum number of Unicode characters to concatenate from + Source. + + @return Destination + +**/ +CHAR16 * +EFIAPI +StrnCat ( + IN OUT CHAR16 *Destination, + IN CONST CHAR16 *Source, + IN UINTN Length + ) +{ + StrnCpy (Destination + StrLen (Destination), Source, Length); + + // + // Size of the resulting string should never be zero. + // PcdMaximumUnicodeStringLength is tested inside StrLen(). + // + ASSERT (StrSize (Destination) != 0); + return Destination; +} + +/** + Returns the first occurance of a Null-terminated Unicode sub-string + in a Null-terminated Unicode string. + + This function scans the contents of the Null-terminated Unicode string + specified by String and returns the first occurrence of SearchString. + If SearchString is not found in String, then NULL is returned. If + the length of SearchString is zero, then String is + returned. + + If String is NULL, then ASSERT(). + If String is not aligned on a 16-bit boundary, then ASSERT(). + If SearchString is NULL, then ASSERT(). + If SearchString is not aligned on a 16-bit boundary, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and SearchString + or String contains more than PcdMaximumUnicodeStringLength Unicode + characters not including the Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + @param SearchString Pointer to a Null-terminated Unicode string to search for. + + @retval NULL If the SearchString does not appear in String. + @retval !NULL If there is a match. + +**/ +CHAR16 * +EFIAPI +StrStr ( + IN CONST CHAR16 *String, + IN CONST CHAR16 *SearchString + ) +{ + CONST CHAR16 *FirstMatch; + CONST CHAR16 *SearchStringTmp; + + ASSERT (String != NULL); + ASSERT (((UINTN) String & 0x01) == 0); + ASSERT (SearchString != NULL); + ASSERT (((UINTN) SearchString & 0x01) == 0); + + // + // If PcdMaximumUnicodeStringLength is not zero, + // length of String should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) { + ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength)); + } + + // + // If PcdMaximumUnicodeStringLength is not zero, + // length of SearchString should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) { + ASSERT (StrLen (SearchString) < PcdGet32 (PcdMaximumAsciiStringLength)); + } + + while (*String != '\0') { + SearchStringTmp = SearchString; + FirstMatch = String; + + while ((*String == *SearchStringTmp) + && (*SearchStringTmp != '\0') + && (*String != '\0')) { + String++; + SearchStringTmp++; + } + + if (*SearchStringTmp == '\0') { + return (CHAR16 *) FirstMatch; + } + + if (SearchStringTmp == SearchString) { + // + // If no character from SearchString match, + // move the pointer to the String under search + // by one character. + // + String++; + } + } + + return NULL; +} + +/** + Check if a Unicode character is a decimal character. + + This internal function checks if a Unicode character is a + decimal character. The valid decimal character is from + L'0' to L'9'. + + + @param Char The character to check against. + + @retval TRUE If the Char is a decmial character. + @retval FALSE Otherwise. + +**/ +STATIC +BOOLEAN +InternalIsDecimalDigitCharacter ( + IN CHAR16 Char + ) +{ + return (BOOLEAN) (Char >= L'0' && Char <= L'9'); +} + +/** + Convert a Unicode character to upper case only if + it maps to a valid small-case ASCII character. + + This internal function only deal with Unicode character + which maps to a valid small-case ASII character, i.e. + L'a' to L'z'. For other Unicode character, the input character + is returned directly. + + + @param Char The character to convert. + + @retval LowerCharacter If the Char is with range L'a' to L'z'. + @retval Unchanged Otherwise. + +**/ +STATIC +CHAR16 +InternalCharToUpper ( + IN CHAR16 Char + ) +{ + if (Char >= L'a' && Char <= L'z') { + return (CHAR16) (Char - (L'a' - L'A')); + } + + return Char; +} + +/** + Convert a Unicode character to numerical value. + + This internal function only deal with Unicode character + which maps to a valid hexadecimal ASII character, i.e. + L'0' to L'9', L'a' to L'f' or L'A' to L'F'. For other + Unicode character, the value returned does not make sense. + + @param Char The character to convert. + + @retval UINTN The numerical value converted. + +**/ +STATIC +UINTN +InternalHexCharToUintn ( + IN CHAR16 Char + ) +{ + if (InternalIsDecimalDigitCharacter (Char)) { + return Char - L'0'; + } + + return (UINTN) (10 + InternalCharToUpper (Char) - L'A'); +} + +/** + Check if a Unicode character is a hexadecimal character. + + This internal function checks if a Unicode character is a + decimal character. The valid hexadecimal character is + L'0' to L'9', L'a' to L'f', or L'A' to L'F'. + + + @param Char The character to check against. + + @retval TRUE If the Char is a hexadecmial character. + @retval FALSE Otherwise. + +**/ +STATIC +BOOLEAN +InternalIsHexaDecimalDigitCharacter ( + IN CHAR16 Char + ) +{ + + return (BOOLEAN) (InternalIsDecimalDigitCharacter (Char) || + (Char >= L'A' && Char <= L'F') || + (Char >= L'a' && Char <= L'f')); +} + +/** + Convert a Null-terminated Unicode decimal string to a value of + type UINTN. + + This function returns a value of type UINTN by interpreting the contents + of the Unicode string specified by String as a decimal number. The format + of the input Unicode string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The + function will ignore the pad space, which includes spaces or + tab characters, before [decimal digits]. The running zero in the + beginning of [decimal digits] will be ignored. Then, the function + stops at the first character that is a not a valid decimal character + or a Null-terminator, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, + then 0 is returned. + If the number represented by String overflows according + to the range defined by UINTN, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @retval UINTN + +**/ +UINTN +EFIAPI +StrDecimalToUintn ( + IN CONST CHAR16 *String + ) +{ + UINTN Result; + + ASSERT (String != NULL); + ASSERT (((UINTN) String & 0x01) == 0); + ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == L' ') || (*String == L'\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == L'0') { + String++; + } + + Result = 0; + + while (InternalIsDecimalDigitCharacter (*String)) { + // + // If the number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_10) || + ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_10) && + (*String - L'0') <= REMINDER_MAX_UINTN_DIVIDED_BY_10) + ); + + Result = Result * 10 + (*String - L'0'); + String++; + } + + return Result; +} + + +/** + Convert a Null-terminated Unicode decimal string to a value of + type UINT64. + + This function returns a value of type UINT64 by interpreting the contents + of the Unicode string specified by String as a decimal number. The format + of the input Unicode string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The + function will ignore the pad space, which includes spaces or + tab characters, before [decimal digits]. The running zero in the + beginning of [decimal digits] will be ignored. Then, the function + stops at the first character that is a not a valid decimal character + or a Null-terminator, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, + then 0 is returned. + If the number represented by String overflows according + to the range defined by UINT64, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @retval UINT64 + +**/ +UINT64 +EFIAPI +StrDecimalToUint64 ( + IN CONST CHAR16 *String + ) +{ + UINT64 Result; + + ASSERT (String != NULL); + ASSERT (((UINTN) String & 0x01) == 0); + ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == L' ') || (*String == L'\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == L'0') { + String++; + } + + Result = 0; + + while (InternalIsDecimalDigitCharacter (*String)) { + // + // If the number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_10) || + ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_10) && + (*String - L'0') <= REMINDER_MAX_UINT64_DIVIDED_BY_10) + ); + + Result = MultU64x32 (Result, 10) + (*String - L'0'); + String++; + } + + return Result; +} + +/** + Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN. + + This function returns a value of type UINTN by interpreting the contents + of the Unicode string specified by String as a hexadecimal number. + The format of the input Unicode string String is: + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. + If "x" appears in the input string, it must be prefixed with at least one 0. + The function will ignore the pad space, which includes spaces or tab characters, + before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or + [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the + first valid hexadecimal digit. Then, the function stops at the first character that is + a not a valid hexadecimal character or NULL, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then zero is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, + then zero is returned. + If the number represented by String overflows according to the range defined by + UINTN, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @retval UINTN + +**/ +UINTN +EFIAPI +StrHexToUintn ( + IN CONST CHAR16 *String + ) +{ + UINTN Result; + + ASSERT (String != NULL); + ASSERT (((UINTN) String & 0x01) == 0); + ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == L' ') || (*String == L'\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == L'0') { + String++; + } + + if (InternalCharToUpper (*String) == L'X') { + ASSERT (*(String - 1) == L'0'); + if (*(String - 1) != L'0') { + return 0; + } + // + // Skip the 'X' + // + String++; + } + + Result = 0; + + while (InternalIsHexaDecimalDigitCharacter (*String)) { + // + // If the Hex Number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_16) || + ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_16) && + (InternalHexCharToUintn (*String) <= REMINDER_MAX_UINTN_DIVIDED_BY_16)) + ); + + Result = (Result << 4) + InternalHexCharToUintn (*String); + String++; + } + + return Result; +} + + +/** + Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64. + + This function returns a value of type UINT64 by interpreting the contents + of the Unicode string specified by String as a hexadecimal number. + The format of the input Unicode string String is + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. + If "x" appears in the input string, it must be prefixed with at least one 0. + The function will ignore the pad space, which includes spaces or tab characters, + before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or + [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the + first valid hexadecimal digit. Then, the function stops at the first character that is + a not a valid hexadecimal character or NULL, whichever one comes first. + + If String is NULL, then ASSERT(). + If String is not aligned in a 16-bit boundary, then ASSERT(). + If String has only pad spaces, then zero is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, + then zero is returned. + If the number represented by String overflows according to the range defined by + UINT64, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and String contains more than + PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated Unicode string. + + @retval UINT64 + +**/ +UINT64 +EFIAPI +StrHexToUint64 ( + IN CONST CHAR16 *String + ) +{ + UINT64 Result; + + ASSERT (String != NULL); + ASSERT (((UINTN) String & 0x01) == 0); + ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == L' ') || (*String == L'\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == L'0') { + String++; + } + + if (InternalCharToUpper (*String) == L'X') { + ASSERT (*(String - 1) == L'0'); + if (*(String - 1) != L'0') { + return 0; + } + // + // Skip the 'X' + // + String++; + } + + Result = 0; + + while (InternalIsHexaDecimalDigitCharacter (*String)) { + // + // If the Hex Number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_16)|| + ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_16) && + (InternalHexCharToUintn (*String) <= REMINDER_MAX_UINT64_DIVIDED_BY_16)) + ); + + Result = LShiftU64 (Result, 4); + Result = Result + InternalHexCharToUintn (*String); + String++; + } + + return Result; +} + +/** + Check if a ASCII character is a decimal character. + + This internal function checks if a Unicode character is a + decimal character. The valid decimal character is from + '0' to '9'. + + @param Char The character to check against. + + @retval TRUE If the Char is a decmial character. + @retval FALSE Otherwise. + +**/ +STATIC +BOOLEAN +InternalAsciiIsDecimalDigitCharacter ( + IN CHAR8 Char + ) +{ + return (BOOLEAN) (Char >= '0' && Char <= '9'); +} + +/** + Check if a ASCII character is a hexadecimal character. + + This internal function checks if a ASCII character is a + decimal character. The valid hexadecimal character is + L'0' to L'9', L'a' to L'f', or L'A' to L'F'. + + + @param Char The character to check against. + + @retval TRUE If the Char is a hexadecmial character. + @retval FALSE Otherwise. + +**/ +STATIC +BOOLEAN +InternalAsciiIsHexaDecimalDigitCharacter ( + IN CHAR8 Char + ) +{ + + return (BOOLEAN) (InternalAsciiIsDecimalDigitCharacter (Char) || + (Char >= 'A' && Char <= 'F') || + (Char >= 'a' && Char <= 'f')); +} + +/** + Convert a Null-terminated Unicode string to a Null-terminated + ASCII string and returns the ASCII string. + + This function converts the content of the Unicode string Source + to the ASCII string Destination by copying the lower 8 bits of + each Unicode character. It returns Destination. The function terminates + the ASCII string Destination by appending a Null-terminator character + at the end. The caller is responsible to make sure Destination points + to a buffer with size equal or greater than (StrLen (Source) + 1) in bytes. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source is not aligned on a 16-bit boundary, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + + If any Unicode characters in Source contain non-zero value in + the upper 8 bits, then ASSERT(). + + If PcdMaximumUnicodeStringLength is not zero, and Source contains + more than PcdMaximumUnicodeStringLength Unicode characters not including + the Null-terminator, then ASSERT(). + + If PcdMaximumAsciiStringLength is not zero, and Source contains more + than PcdMaximumAsciiStringLength Unicode characters not including the + Null-terminator, then ASSERT(). + + @param Source Pointer to a Null-terminated Unicode string. + @param Destination Pointer to a Null-terminated ASCII string. + + @reture Destination + +**/ +CHAR8 * +EFIAPI +UnicodeStrToAsciiStr ( + IN CONST CHAR16 *Source, + OUT CHAR8 *Destination + ) +{ + ASSERT (Destination != NULL); + ASSERT (Source != NULL); + ASSERT (((UINTN) Source & 0x01) == 0); + + // + // Source and Destination should not overlap + // + ASSERT ((UINTN) ((CHAR16 *) Destination - Source) > StrLen (Source)); + ASSERT ((UINTN) ((CHAR8 *) Source - Destination) > StrLen (Source)); + + // + // If PcdMaximumUnicodeStringLength is not zero, + // length of Source should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) { + ASSERT (StrLen (Source) < PcdGet32 (PcdMaximumUnicodeStringLength)); + } + + while (*Source != '\0') { + // + // If any Unicode characters in Source contain + // non-zero value in the upper 8 bits, then ASSERT(). + // + ASSERT (*Source < 0x100); + *(Destination++) = (CHAR8) *(Source++); + } + + *Destination = '\0'; + + return Destination; +} + + +/** + Copies one Null-terminated ASCII string to another Null-terminated ASCII + string and returns the new ASCII string. + + This function copies the contents of the ASCII string Source to the ASCII + string Destination, and returns Destination. If Source and Destination + overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrCpy ( + OUT CHAR8 *Destination, + IN CONST CHAR8 *Source + ) +{ + CHAR8 *ReturnValue; + + // + // Destination cannot be NULL + // + ASSERT (Destination != NULL); + + // + // Destination and source cannot overlap + // + ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source)); + ASSERT ((UINTN)(Source - Destination) > AsciiStrLen (Source)); + + ReturnValue = Destination; + while (*Source) { + *(Destination++) = *(Source++); + } + *Destination = 0; + return ReturnValue; +} + +/** + Copies one Null-terminated ASCII string with a maximum length to another + Null-terminated ASCII string with a maximum length and returns the new ASCII + string. + + This function copies the contents of the ASCII string Source to the ASCII + string Destination, and returns Destination. At most, Length ASCII characters + are copied from Source to Destination. If Length is 0, then Destination is + returned unmodified. If Length is greater that the number of ASCII characters + in Source, then Destination is padded with Null ASCII characters. If Source + and Destination overlap, then the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + @param Length Maximum number of ASCII characters to copy. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrnCpy ( + OUT CHAR8 *Destination, + IN CONST CHAR8 *Source, + IN UINTN Length + ) +{ + CHAR8 *ReturnValue; + + if (Length == 0) { + return Destination; + } + + // + // Destination cannot be NULL + // + ASSERT (Destination != NULL); + + // + // Destination and source cannot overlap + // + ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source)); + ASSERT ((UINTN)(Source - Destination) >= Length); + + ReturnValue = Destination; + + while (*Source && Length > 0) { + *(Destination++) = *(Source++); + Length--; + } + + ZeroMem (Destination, Length * sizeof (*Destination)); + return ReturnValue; +} + +/** + Returns the length of a Null-terminated ASCII string. + + This function returns the number of ASCII characters in the Null-terminated + ASCII string specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @return The length of String. + +**/ +UINTN +EFIAPI +AsciiStrLen ( + IN CONST CHAR8 *String + ) +{ + UINTN Length; + + ASSERT (String != NULL); + + for (Length = 0; *String != '\0'; String++, Length++) { + // + // If PcdMaximumUnicodeStringLength is not zero, + // length should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) { + ASSERT (Length < PcdGet32 (PcdMaximumAsciiStringLength)); + } + } + return Length; +} + +/** + Returns the size of a Null-terminated ASCII string in bytes, including the + Null terminator. + + This function returns the size, in bytes, of the Null-terminated ASCII string + specified by String. + + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @return The size of String. + +**/ +UINTN +EFIAPI +AsciiStrSize ( + IN CONST CHAR8 *String + ) +{ + return (AsciiStrLen (String) + 1) * sizeof (*String); +} + +/** + Compares two Null-terminated ASCII strings, and returns the difference + between the first mismatched ASCII characters. + + This function compares the Null-terminated ASCII string FirstString to the + Null-terminated ASCII string SecondString. If FirstString is identical to + SecondString, then 0 is returned. Otherwise, the value returned is the first + mismatched ASCII character in SecondString subtracted from the first + mismatched ASCII character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more + than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated ASCII string. + @param SecondString Pointer to a Null-terminated ASCII string. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +AsciiStrCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString + ) +{ + // + // ASSERT both strings are less long than PcdMaximumAsciiStringLength + // + ASSERT (AsciiStrSize (FirstString)); + ASSERT (AsciiStrSize (SecondString)); + + while ((*FirstString != '\0') && (*FirstString == *SecondString)) { + FirstString++; + SecondString++; + } + + return *FirstString - *SecondString; +} + +/** + Converts a lowercase Ascii character to upper one + + If Chr is lowercase Ascii character, then converts it to upper one. + + If Value >= 0xA0, then ASSERT(). + If (Value & 0x0F) >= 0x0A, then ASSERT(). + + @param chr one Ascii character + + @return The uppercase value of Ascii character + +**/ +STATIC +CHAR8 +AsciiToUpper ( + IN CHAR8 Chr + ) +{ + return (UINT8) ((Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr); +} + +/** + Convert a ASCII character to numerical value. + + This internal function only deal with Unicode character + which maps to a valid hexadecimal ASII character, i.e. + '0' to '9', 'a' to 'f' or 'A' to 'F'. For other + ASCII character, the value returned does not make sense. + + @param Char The character to convert. + + @retval UINTN The numerical value converted. + +**/ +STATIC +UINTN +InternalAsciiHexCharToUintn ( + IN CHAR8 Char + ) +{ + if (InternalIsDecimalDigitCharacter (Char)) { + return Char - '0'; + } + + return (UINTN) (10 + AsciiToUpper (Char) - 'A'); +} + + +/** + Performs a case insensitive comparison of two Null-terminated ASCII strings, + and returns the difference between the first mismatched ASCII characters. + + This function performs a case insensitive comparison of the Null-terminated + ASCII string FirstString to the Null-terminated ASCII string SecondString. If + FirstString is identical to SecondString, then 0 is returned. Otherwise, the + value returned is the first mismatched lower case ASCII character in + SecondString subtracted from the first mismatched lower case ASCII character + in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more + than PcdMaximumAsciiStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param FirstString Pointer to a Null-terminated ASCII string. + @param SecondString Pointer to a Null-terminated ASCII string. + + @retval 0 FirstString is identical to SecondString using case insensitive + comparisons. + @retval !=0 FirstString is not identical to SecondString using case + insensitive comparisons. + +**/ +INTN +EFIAPI +AsciiStriCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString + ) +{ + CHAR8 UpperFirstString; + CHAR8 UpperSecondString; + + // + // ASSERT both strings are less long than PcdMaximumAsciiStringLength + // + ASSERT (AsciiStrSize (FirstString)); + ASSERT (AsciiStrSize (SecondString)); + + UpperFirstString = AsciiToUpper (*FirstString); + UpperSecondString = AsciiToUpper (*SecondString); + while ((*FirstString != '\0') && (UpperFirstString == UpperSecondString)) { + FirstString++; + SecondString++; + UpperFirstString = AsciiToUpper (*FirstString); + UpperSecondString = AsciiToUpper (*SecondString); + } + + return UpperFirstString - UpperSecondString; +} + +/** + Compares two Null-terminated ASCII strings with maximum lengths, and returns + the difference between the first mismatched ASCII characters. + + This function compares the Null-terminated ASCII string FirstString to the + Null-terminated ASCII string SecondString. At most, Length ASCII characters + will be compared. If Length is 0, then 0 is returned. If FirstString is + identical to SecondString, then 0 is returned. Otherwise, the value returned + is the first mismatched ASCII character in SecondString subtracted from the + first mismatched ASCII character in FirstString. + + If FirstString is NULL, then ASSERT(). + If SecondString is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and FirstString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and SecondString contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param FirstString Pointer to a Null-terminated ASCII string. + @param SecondString Pointer to a Null-terminated ASCII string. + + @retval 0 FirstString is identical to SecondString. + @retval !=0 FirstString is not identical to SecondString. + +**/ +INTN +EFIAPI +AsciiStrnCmp ( + IN CONST CHAR8 *FirstString, + IN CONST CHAR8 *SecondString, + IN UINTN Length + ) +{ + if (Length == 0) { + return 0; + } + + // + // ASSERT both strings are less long than PcdMaximumAsciiStringLength + // + ASSERT (AsciiStrSize (FirstString)); + ASSERT (AsciiStrSize (SecondString)); + + while ((*FirstString != '\0') && + (*FirstString == *SecondString) && + (Length > 1)) { + FirstString++; + SecondString++; + Length--; + } + return *FirstString - *SecondString; +} + +/** + Concatenates one Null-terminated ASCII string to another Null-terminated + ASCII string, and returns the concatenated ASCII string. + + This function concatenates two Null-terminated ASCII strings. The contents of + Null-terminated ASCII string Source are concatenated to the end of Null- + terminated ASCII string Destination. The Null-terminated concatenated ASCII + String is returned. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Destination contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero and concatenating Destination and + Source results in a ASCII string with more than PcdMaximumAsciiStringLength + ASCII characters, then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrCat ( + IN OUT CHAR8 *Destination, + IN CONST CHAR8 *Source + ) +{ + AsciiStrCpy (Destination + AsciiStrLen (Destination), Source); + + // + // Size of the resulting string should never be zero. + // PcdMaximumUnicodeStringLength is tested inside StrLen(). + // + ASSERT (AsciiStrSize (Destination) != 0); + return Destination; +} + +/** + Concatenates one Null-terminated ASCII string with a maximum length to the + end of another Null-terminated ASCII string, and returns the concatenated + ASCII string. + + This function concatenates two Null-terminated ASCII strings. The contents + of Null-terminated ASCII string Source are concatenated to the end of Null- + terminated ASCII string Destination, and Destination is returned. At most, + Length ASCII characters are concatenated from Source to the end of + Destination, and Destination is always Null-terminated. If Length is 0, then + Destination is returned unmodified. If Source and Destination overlap, then + the results are undefined. + + If Destination is NULL, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Destination contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and + Source results in a ASCII string with more than PcdMaximumAsciiStringLength + ASCII characters not including the Null-terminator, then ASSERT(). + + @param Destination Pointer to a Null-terminated ASCII string. + @param Source Pointer to a Null-terminated ASCII string. + @param Length Maximum number of ASCII characters to concatenate from + Source. + + @return Destination + +**/ +CHAR8 * +EFIAPI +AsciiStrnCat ( + IN OUT CHAR8 *Destination, + IN CONST CHAR8 *Source, + IN UINTN Length + ) +{ + AsciiStrnCpy (Destination + AsciiStrLen (Destination), Source, Length); + + // + // Size of the resulting string should never be zero. + // PcdMaximumUnicodeStringLength is tested inside StrLen(). + // + ASSERT (AsciiStrSize (Destination) != 0); + return Destination; +} + +/** + Returns the first occurance of a Null-terminated ASCII sub-string + in a Null-terminated ASCII string. + + This function scans the contents of the ASCII string specified by String + and returns the first occurrence of SearchString. If SearchString is not + found in String, then NULL is returned. If the length of SearchString is zero, + then String is returned. + + If String is NULL, then ASSERT(). + If SearchString is NULL, then ASSERT(). + + If PcdMaximumAsciiStringLength is not zero, and SearchString or + String contains more than PcdMaximumAsciiStringLength Unicode characters + not including the Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + @param SearchString Pointer to a Null-terminated ASCII string to search for. + + @retval NULL If the SearchString does not appear in String. + @retval !NULL If there is a match. + +**/ +CHAR8 * +EFIAPI +AsciiStrStr ( + IN CONST CHAR8 *String, + IN CONST CHAR8 *SearchString + ) +{ + CONST CHAR8 *FirstMatch; + CONST CHAR8 *SearchStringTmp; + + ASSERT (String != NULL); + ASSERT (SearchString != NULL); + + // + // If PcdMaximumUnicodeStringLength is not zero, + // length of String should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) { + ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength)); + } + + // + // If PcdMaximumUnicodeStringLength is not zero, + // length of SearchString should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) { + ASSERT (AsciiStrLen (SearchString) < PcdGet32 (PcdMaximumAsciiStringLength)); + } + + while (*String != '\0') { + SearchStringTmp = SearchString; + FirstMatch = String; + + while ((*String == *SearchStringTmp) + && (*SearchStringTmp != '\0') + && (*String != '\0')) { + String++; + SearchStringTmp++; + } + + if (*SearchStringTmp == '\0') { + return (CHAR8 *) FirstMatch; + } + + if (SearchStringTmp == SearchString) { + // + // If no character from SearchString match, + // move the pointer to the String under search + // by one character. + // + String++; + } + + } + + return NULL; +} + +/** + Convert a Null-terminated ASCII decimal string to a value of type + UINTN. + + This function returns a value of type UINTN by interpreting the contents + of the ASCII string String as a decimal number. The format of the input + ASCII string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The function will + ignore the pad space, which includes spaces or tab characters, before the digits. + The running zero in the beginning of [decimal digits] will be ignored. Then, the + function stops at the first character that is a not a valid decimal character or + Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, then 0 is returned. + If the number represented by String overflows according to the range defined by + UINTN, then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @retval UINTN + +**/ +UINTN +EFIAPI +AsciiStrDecimalToUintn ( + IN CONST CHAR8 *String + ) +{ + UINTN Result; + + ASSERT (String != NULL); + ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == ' ') || (*String == '\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == '0') { + String++; + } + + Result = 0; + + while (InternalAsciiIsDecimalDigitCharacter (*String)) { + // + // If the number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_10) || + ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_10) && + (*String - '0') <= REMINDER_MAX_UINTN_DIVIDED_BY_10) + ); + + Result = Result * 10 + (*String - '0'); + String++; + } + + return Result; +} + + +/** + Convert a Null-terminated ASCII decimal string to a value of type + UINT64. + + This function returns a value of type UINT64 by interpreting the contents + of the ASCII string String as a decimal number. The format of the input + ASCII string String is: + + [spaces] [decimal digits]. + + The valid decimal digit character is in the range [0-9]. The function will + ignore the pad space, which includes spaces or tab characters, before the digits. + The running zero in the beginning of [decimal digits] will be ignored. Then, the + function stops at the first character that is a not a valid decimal character or + Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no pad spaces or valid decimal digits, then 0 is returned. + If the number represented by String overflows according to the range defined by + UINT64, then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and String contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @retval UINT64 + +**/ +UINT64 +EFIAPI +AsciiStrDecimalToUint64 ( + IN CONST CHAR8 *String + ) +{ + UINT64 Result; + + ASSERT (String != NULL); + ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == ' ') || (*String == '\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == '0') { + String++; + } + + Result = 0; + + while (InternalAsciiIsDecimalDigitCharacter (*String)) { + // + // If the number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_10) || + ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_10) && + (*String - '0') <= REMINDER_MAX_UINT64_DIVIDED_BY_10) + ); + + Result = MultU64x32 (Result, 10) + (*String - '0'); + String++; + } + + return Result; +} + +/** + Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN. + + This function returns a value of type UINTN by interpreting the contents of + the ASCII string String as a hexadecimal number. The format of the input ASCII + string String is: + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x" + appears in the input string, it must be prefixed with at least one 0. The function + will ignore the pad space, which includes spaces or tab characters, before [zeros], + [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits] + will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal + digit. Then, the function stops at the first character that is a not a valid + hexadecimal character or Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then + 0 is returned. + + If the number represented by String overflows according to the range defined by UINTN, + then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, + and String contains more than PcdMaximumAsciiStringLength ASCII characters not including + the Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @retval UINTN + +**/ +UINTN +EFIAPI +AsciiStrHexToUintn ( + IN CONST CHAR8 *String + ) +{ + UINTN Result; + + ASSERT (String != NULL); + ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength)); + + // + // Ignore the pad spaces (space or tab) + // + while ((*String == ' ') || (*String == '\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == '0') { + String++; + } + + if (AsciiToUpper (*String) == 'X') { + ASSERT (*(String - 1) == '0'); + if (*(String - 1) != '0') { + return 0; + } + // + // Skip the 'X' + // + String++; + } + + Result = 0; + + while (InternalAsciiIsHexaDecimalDigitCharacter (*String)) { + // + // If the Hex Number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_16) || + ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_16) && + (InternalAsciiHexCharToUintn (*String) <= REMINDER_MAX_UINTN_DIVIDED_BY_16)) + ); + + Result = (Result << 4) + InternalAsciiHexCharToUintn (*String); + String++; + } + + return Result; +} + + +/** + Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64. + + This function returns a value of type UINT64 by interpreting the contents of + the ASCII string String as a hexadecimal number. The format of the input ASCII + string String is: + + [spaces][zeros][x][hexadecimal digits]. + + The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. + The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x" + appears in the input string, it must be prefixed with at least one 0. The function + will ignore the pad space, which includes spaces or tab characters, before [zeros], + [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits] + will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal + digit. Then, the function stops at the first character that is a not a valid + hexadecimal character or Null-terminator, whichever on comes first. + + If String has only pad spaces, then 0 is returned. + If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then + 0 is returned. + + If the number represented by String overflows according to the range defined by UINT64, + then ASSERT(). + If String is NULL, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, + and String contains more than PcdMaximumAsciiStringLength ASCII characters not including + the Null-terminator, then ASSERT(). + + @param String Pointer to a Null-terminated ASCII string. + + @retval UINT64 + +**/ +UINT64 +EFIAPI +AsciiStrHexToUint64 ( + IN CONST CHAR8 *String + ) +{ + UINT64 Result; + + ASSERT (String != NULL); + ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength)); + + // + // Ignore the pad spaces (space or tab) and leading Zeros + // + // + // Ignore the pad spaces (space or tab) + // + while ((*String == ' ') || (*String == '\t')) { + String++; + } + + // + // Ignore leading Zeros after the spaces + // + while (*String == '0') { + String++; + } + + if (AsciiToUpper (*String) == 'X') { + ASSERT (*(String - 1) == '0'); + if (*(String - 1) != '0') { + return 0; + } + // + // Skip the 'X' + // + String++; + } + + Result = 0; + + while (InternalAsciiIsHexaDecimalDigitCharacter (*String)) { + // + // If the Hex Number represented by String overflows according + // to the range defined by UINTN, then ASSERT(). + // + ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_16) || + ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_16) && + (InternalAsciiHexCharToUintn (*String) <= REMINDER_MAX_UINT64_DIVIDED_BY_16)) + ); + + Result = LShiftU64 (Result, 4); + Result = Result + InternalAsciiHexCharToUintn (*String); + String++; + } + + return Result; +} + + +/** + Convert one Null-terminated ASCII string to a Null-terminated + Unicode string and returns the Unicode string. + + This function converts the contents of the ASCII string Source to the Unicode + string Destination, and returns Destination. The function terminates the + Unicode string Destination by appending a Null-terminator character at the end. + The caller is responsible to make sure Destination points to a buffer with size + equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes. + + If Destination is NULL, then ASSERT(). + If Destination is not aligned on a 16-bit boundary, then ASSERT(). + If Source is NULL, then ASSERT(). + If Source and Destination overlap, then ASSERT(). + If PcdMaximumAsciiStringLength is not zero, and Source contains more than + PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, + then ASSERT(). + If PcdMaximumUnicodeStringLength is not zero, and Source contains more than + PcdMaximumUnicodeStringLength ASCII characters not including the + Null-terminator, then ASSERT(). + + @param Source Pointer to a Null-terminated ASCII string. + @param Destination Pointer to a Null-terminated Unicode string. + + @reture Destination + +**/ +CHAR16 * +EFIAPI +AsciiStrToUnicodeStr ( + IN CONST CHAR8 *Source, + OUT CHAR16 *Destination + ) +{ + ASSERT (Destination != NULL); + ASSERT (Source != NULL); + + // + // Source and Destination should not overlap + // + ASSERT ((UINTN) ((CHAR8 *) Destination - Source) > AsciiStrLen (Source)); + ASSERT ((UINTN) (Source - (CHAR8 *) Destination) > (AsciiStrLen (Source) * sizeof (CHAR16))); + + // + // If PcdMaximumAsciiStringLength is not zero, + // length of Source should not more than PcdMaximumUnicodeStringLength + // + if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) { + ASSERT (AsciiStrLen (Source) < PcdGet32 (PcdMaximumAsciiStringLength)); + } + + while (*Source != '\0') { + *(Destination++) = (CHAR16) *(Source++); + } + // + // End the Destination with a NULL. + // + *Destination = '\0'; + + return Destination; +} + +/** + Converts an 8-bit value to an 8-bit BCD value. + + Converts the 8-bit value specified by Value to BCD. The BCD value is + returned. + + If Value >= 100, then ASSERT(). + + @param Value The 8-bit value to convert to BCD. Range 0..99. + + @return The BCD value + +**/ +UINT8 +EFIAPI +DecimalToBcd8 ( + IN UINT8 Value + ) +{ + ASSERT (Value < 100); + return (UINT8) (((Value / 10) << 4) | (Value % 10)); +} + +/** + Converts an 8-bit BCD value to an 8-bit value. + + Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit + value is returned. + + If Value >= 0xA0, then ASSERT(). + If (Value & 0x0F) >= 0x0A, then ASSERT(). + + @param Value The 8-bit BCD value to convert to an 8-bit value. + + @return The 8-bit value is returned. + +**/ +UINT8 +EFIAPI +BcdToDecimal8 ( + IN UINT8 Value + ) +{ + ASSERT (Value < 0xa0); + ASSERT ((Value & 0xf) < 0xa); + return (UINT8) ((Value >> 4) * 10 + (Value & 0xf)); +} + + diff --git a/OldMdePkg/Library/BaseLib/SwapBytes16.c b/OldMdePkg/Library/BaseLib/SwapBytes16.c new file mode 100644 index 0000000000..134ccb1ef0 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SwapBytes16.c @@ -0,0 +1,36 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 16-bit integer.
+
+ This function swaps the bytes in a 16-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 16-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT16
+EFIAPI
+SwapBytes16 (
+ IN UINT16 Operand
+ )
+{
+ return (UINT16) ((Operand << 8) | (Operand >> 8));
+}
diff --git a/OldMdePkg/Library/BaseLib/SwapBytes32.c b/OldMdePkg/Library/BaseLib/SwapBytes32.c new file mode 100644 index 0000000000..09396dba4e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SwapBytes32.c @@ -0,0 +1,42 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 32-bit integer.
+
+ This function swaps the bytes in a 32-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 32-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT32
+EFIAPI
+SwapBytes32 (
+ IN UINT32 Operand
+ )
+{
+ UINT32 LowerBytes;
+ UINT32 HigherBytes;
+
+ LowerBytes = (UINT32) SwapBytes16 ((UINT16) Operand);
+ HigherBytes = (UINT32) SwapBytes16 ((UINT16) (Operand >> 16));
+
+ return (LowerBytes << 16 | HigherBytes);
+}
diff --git a/OldMdePkg/Library/BaseLib/SwapBytes64.c b/OldMdePkg/Library/BaseLib/SwapBytes64.c new file mode 100644 index 0000000000..1b0882fc9a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SwapBytes64.c @@ -0,0 +1,36 @@ +/** @file
+ Math worker functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+SwapBytes64 (
+ IN UINT64 Operand
+ )
+{
+ return InternalMathSwapBytes64 (Operand);
+}
diff --git a/OldMdePkg/Library/BaseLib/SwitchStack.c b/OldMdePkg/Library/BaseLib/SwitchStack.c new file mode 100644 index 0000000000..b47cfe0b10 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SwitchStack.c @@ -0,0 +1,66 @@ +/** @file
+ Switch Stack functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SwitchStack.c
+
+**/
+
+#include <BaseLibInternals.h>
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return. This function
+ supports a variable number of arguments following the NewStack parameter.
+ These additional arguments are ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ ...
+ )
+{
+ VA_LIST Marker;
+
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+
+ VA_START (Marker, NewStack);
+
+ InternalSwitchStack (EntryPoint, Context1, Context2, NewStack, Marker);
+
+ //
+ // InternalSwitchStack () will never return
+ //
+ ASSERT (FALSE);
+}
diff --git a/OldMdePkg/Library/BaseLib/Synchronization.c b/OldMdePkg/Library/BaseLib/Synchronization.c new file mode 100644 index 0000000000..225453149d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Synchronization.c @@ -0,0 +1,358 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Synchronization.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+#define SPIN_LOCK_RELEASED ((UINTN) 1)
+#define SPIN_LOCK_ACQUIRED ((UINTN) 2)
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+ *SpinLock = SPIN_LOCK_RELEASED;
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (PcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ PcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ return (BOOLEAN)(
+ InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ ) == (VOID*)SPIN_LOCK_RELEASED
+ );
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ *SpinLock = SPIN_LOCK_RELEASED;
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ UINT8 SizeOfValue;
+
+ SizeOfValue = sizeof (*Value);
+
+ switch (SizeOfValue) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/SynchronizationGcc.c b/OldMdePkg/Library/BaseLib/SynchronizationGcc.c new file mode 100644 index 0000000000..40b1e4a36b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SynchronizationGcc.c @@ -0,0 +1,373 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SynchronizationGcc.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+//
+// GCC inline assembly for Read Write Barrier
+//
+#define _ReadWriteBarrier() do { asm volatile ("": : : "memory"); } while(0)
+
+#define SPIN_LOCK_RELEASED ((UINTN) 1)
+#define SPIN_LOCK_ACQUIRED ((UINTN) 2)
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+
+ _ReadWriteBarrier();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier();
+
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (PcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ PcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+ VOID *Result;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ Result = InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ );
+
+ _ReadWriteBarrier ();
+ return (BOOLEAN) (Result == (VOID*) SPIN_LOCK_RELEASED);
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier ();
+
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ UINT8 SizeOfValue;
+
+ SizeOfValue = sizeof (*Value);
+
+ switch (SizeOfValue) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/SynchronizationMsc.c b/OldMdePkg/Library/BaseLib/SynchronizationMsc.c new file mode 100644 index 0000000000..ce330aed88 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/SynchronizationMsc.c @@ -0,0 +1,375 @@ +/** @file
+ Implementation of synchronization functions.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SynchronizationMsc.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for read write barrier Intrinsics
+//
+void _ReadWriteBarrier (void);
+#pragma intrinsic(_ReadWriteBarrier)
+
+
+#define SPIN_LOCK_RELEASED ((UINTN) 1)
+#define SPIN_LOCK_ACQUIRED ((UINTN) 2)
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ )
+{
+ // @bug May use a PCD entry to determine this alignment.
+ return 32;
+}
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ OUT SPIN_LOCK *SpinLock
+ )
+{
+ ASSERT (SpinLock != NULL);
+
+ _ReadWriteBarrier();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier();
+
+ return SpinLock;
+}
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ UINT64 Tick;
+ UINT64 Start, End;
+ UINT64 Timeout;
+
+ Tick = 0;
+ Start = 0;
+ End = 0;
+ if (PcdGet32 (PcdSpinLockTimeout) > 0) {
+ Tick = GetPerformanceCounter ();
+ Timeout = DivU64x32 (
+ MultU64x32 (
+ GetPerformanceCounterProperties (&Start, &End),
+ PcdGet32 (PcdSpinLockTimeout)
+ ),
+ 1000000
+ );
+ if (Start < End) {
+ Tick += Timeout;
+ } else {
+ Tick -= Timeout;
+ }
+ }
+
+ while (!AcquireSpinLockOrFail (SpinLock)) {
+ CpuPause ();
+ ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));
+ }
+ return SpinLock;
+}
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+ VOID *Result;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ Result = InterlockedCompareExchangePointer (
+ (VOID**)SpinLock,
+ (VOID*)SPIN_LOCK_RELEASED,
+ (VOID*)SPIN_LOCK_ACQUIRED
+ );
+
+ _ReadWriteBarrier ();
+ return (BOOLEAN) (Result == (VOID*) SPIN_LOCK_RELEASED);
+}
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN OUT SPIN_LOCK *SpinLock
+ )
+{
+ SPIN_LOCK LockValue;
+
+ ASSERT (SpinLock != NULL);
+
+ LockValue = *SpinLock;
+ ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);
+
+ _ReadWriteBarrier ();
+ *SpinLock = SPIN_LOCK_RELEASED;
+ _ReadWriteBarrier ();
+
+ return SpinLock;
+}
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncIncrement (Value);
+}
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncDecrement (Value);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ ASSERT (Value != NULL);
+ return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);
+}
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ )
+{
+ UINT8 SizeOfValue;
+
+ SizeOfValue = sizeof (*Value);
+
+ switch (SizeOfValue) {
+ case sizeof (UINT32):
+ return (VOID*)(UINTN)InterlockedCompareExchange32 (
+ (UINT32*)Value,
+ (UINT32)(UINTN)CompareValue,
+ (UINT32)(UINTN)ExchangeValue
+ );
+ case sizeof (UINT64):
+ return (VOID*)(UINTN)InterlockedCompareExchange64 (
+ (UINT64*)Value,
+ (UINT64)(UINTN)CompareValue,
+ (UINT64)(UINTN)ExchangeValue
+ );
+ default:
+ ASSERT (FALSE);
+ return NULL;
+ }
+}
diff --git a/OldMdePkg/Library/BaseLib/Unaligned.c b/OldMdePkg/Library/BaseLib/Unaligned.c new file mode 100644 index 0000000000..18c486d50f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/Unaligned.c @@ -0,0 +1,220 @@ +/** @file
+ Unaligned access functions of BaseLib.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Unaligned.c
+
+**/
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Buffer,
+ IN UINT16 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer & 0xffffff;
+}
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ *Buffer = BitFieldWrite32 (*Buffer, 0, 23, Value);
+ return Value;
+}
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer = Value;
+}
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer;
+}
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Buffer,
+ IN UINT64 Value
+ )
+{
+ ASSERT (Buffer != NULL);
+
+ return *Buffer = Value;
+}
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.S b/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.S new file mode 100644 index 0000000000..710006bdd1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.S @@ -0,0 +1,25 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuBreakpoint.S +# +# Abstract: +# +# Implementation of CpuBreakpoint() on x86_64 +# +#------------------------------------------------------------------------------ + +.global _CpuBreakpoint +_CpuBreakpoint: + int $0x3 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.asm b/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.asm new file mode 100644 index 0000000000..f1ebe47b21 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuBreakpoint.Asm
+;
+; Abstract:
+;
+; CpuBreakpoint function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuBreakpoint (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuBreakpoint PROC
+ int 3
+ ret
+CpuBreakpoint ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.c b/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.c new file mode 100644 index 0000000000..01939e9128 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuBreakpoint.c @@ -0,0 +1,31 @@ +/** @file
+ CpuBreakpoint function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+void __debugbreak ();
+
+#pragma intrinsic(__debugbreak)
+
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ )
+{
+ __debugbreak ();
+}
+
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuFlushTlb.S b/OldMdePkg/Library/BaseLib/X64/CpuFlushTlb.S new file mode 100644 index 0000000000..2dbaf846c4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuFlushTlb.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuFlushTlb.Asm
+#
+# Abstract:
+#
+# CpuFlushTlb function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+.global _CpuFlushTlb
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuFlushTlb (
+# VOID
+# );
+#------------------------------------------------------------------------------
+_CpuFlushTlb:
+ mov %cr3, %rax
+ mov %rax, %cr3
+ ret
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuFlushTlb.asm b/OldMdePkg/Library/BaseLib/X64/CpuFlushTlb.asm new file mode 100644 index 0000000000..c2c4490e9d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuFlushTlb.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuFlushTlb.Asm
+;
+; Abstract:
+;
+; CpuFlushTlb function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuFlushTlb (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuFlushTlb PROC
+ mov rax, cr3
+ mov cr3, rax
+ ret
+CpuFlushTlb ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuId.S b/OldMdePkg/Library/BaseLib/X64/CpuId.S new file mode 100644 index 0000000000..98d7faaa06 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuId.S @@ -0,0 +1,60 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuId.S +# +# Abstract: +# +# AsmCpuid function +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmCpuid ( +# IN UINT32 RegisterInEax, +# OUT UINT32 *RegisterOutEax OPTIONAL, +# OUT UINT32 *RegisterOutEbx OPTIONAL, +# OUT UINT32 *RegisterOutEcx OPTIONAL, +# OUT UINT32 *RegisterOutEdx OPTIONAL +# ) +#------------------------------------------------------------------------------ +.global _AsmCpuid; +_AsmCpuid: + push %rbx + mov %ecx, %eax + push %rax # save Index on stack + push %rdx + cpuid + test %r9, %r9 + jz L1 + mov %ecx, (%r9) +L1: + pop %rcx + jrcxz L2 + mov %eax, (%rcx) +L2: + mov %r8, %rcx + jrcxz L3 + mov %ebx, (%rcx) +L3: + mov 0x38(%rsp), %rcx + jrcxz L4 + mov %edx, (%rcx) +L4: + pop %rax # restore Index to rax as return value + pop %rbx + ret diff --git a/OldMdePkg/Library/BaseLib/X64/CpuId.asm b/OldMdePkg/Library/BaseLib/X64/CpuId.asm new file mode 100644 index 0000000000..5e7ee19c53 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuId.asm @@ -0,0 +1,62 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuId.Asm +; +; Abstract: +; +; AsmCpuid function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmCpuid ( +; IN UINT32 RegisterInEax, +; OUT UINT32 *RegisterOutEax OPTIONAL, +; OUT UINT32 *RegisterOutEbx OPTIONAL, +; OUT UINT32 *RegisterOutEcx OPTIONAL, +; OUT UINT32 *RegisterOutEdx OPTIONAL +; ) +;------------------------------------------------------------------------------ +AsmCpuid PROC USES rbx + mov eax, ecx + push rax ; save Index on stack + push rdx + cpuid + test r9, r9 + jz @F + mov [r9], ecx +@@: + pop rcx + jrcxz @F + mov [rcx], eax +@@: + mov rcx, r8 + jrcxz @F + mov [rcx], ebx +@@: + mov rcx, [rsp + 38h] + jrcxz @F + mov [rcx], edx +@@: + pop rax ; restore Index to rax as return value + ret +AsmCpuid ENDP + + END diff --git a/OldMdePkg/Library/BaseLib/X64/CpuIdEx.S b/OldMdePkg/Library/BaseLib/X64/CpuIdEx.S new file mode 100644 index 0000000000..e5317e04cb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuIdEx.S @@ -0,0 +1,62 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuIdEx.Asm +# +# Abstract: +# +# AsmCpuidEx function +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# UINT32 +# EFIAPI +# AsmCpuidEx ( +# IN UINT32 RegisterInEax, +# IN UINT32 RegisterInEcx, +# OUT UINT32 *RegisterOutEax OPTIONAL, +# OUT UINT32 *RegisterOutEbx OPTIONAL, +# OUT UINT32 *RegisterOutEcx OPTIONAL, +# OUT UINT32 *RegisterOutEdx OPTIONAL +# ) +#------------------------------------------------------------------------------ +.global _AsmCpuidEx +_AsmCpuidEx: + push %rbx + movl %ecx,%eax + movl %edx,%ecx + push %rax + cpuid + mov 0x38(%rsp), %r10 + test %r10, %r10 + jz L1 + mov %ecx,(%r10) +L1: + mov %r8, %rcx + jrcxz L2 + movl %eax,(%rcx) +L2: + mov %r9, %rcx + jrcxz L3 + mov %ebx, (%rcx) +L3: + mov 0x40(%rsp), %rcx + jrcxz L4 + mov %edx, (%rcx) +L4: + pop %rax + pop %rbx + ret diff --git a/OldMdePkg/Library/BaseLib/X64/CpuIdEx.asm b/OldMdePkg/Library/BaseLib/X64/CpuIdEx.asm new file mode 100644 index 0000000000..450cf543f7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuIdEx.asm @@ -0,0 +1,64 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuIdEx.Asm +; +; Abstract: +; +; AsmCpuidEx function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT32 +; EFIAPI +; AsmCpuidEx ( +; IN UINT32 RegisterInEax, +; IN UINT32 RegisterInEcx, +; OUT UINT32 *RegisterOutEax OPTIONAL, +; OUT UINT32 *RegisterOutEbx OPTIONAL, +; OUT UINT32 *RegisterOutEcx OPTIONAL, +; OUT UINT32 *RegisterOutEdx OPTIONAL +; ) +;------------------------------------------------------------------------------ +AsmCpuidEx PROC USES rbx + mov eax, ecx + mov ecx, edx + push rax ; save Index on stack + cpuid + mov r10, [rsp + 38h] + test r10, r10 + jz @F + mov [r10], ecx +@@: + mov rcx, r8 + jrcxz @F + mov [rcx], eax +@@: + mov rcx, r9 + jrcxz @F + mov [rcx], ebx +@@: + mov rcx, [rsp + 40h] + jrcxz @F + mov [rcx], edx +@@: + pop rax ; restore Index to rax as return value + ret +AsmCpuidEx ENDP + + END diff --git a/OldMdePkg/Library/BaseLib/X64/CpuPause.S b/OldMdePkg/Library/BaseLib/X64/CpuPause.S new file mode 100644 index 0000000000..0ecaa85b61 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuPause.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuPause.S
+#
+# Abstract:
+#
+# CpuPause function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuPause (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuPause;
+_CpuPause:
+ pause
+ ret
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuPause.asm b/OldMdePkg/Library/BaseLib/X64/CpuPause.asm new file mode 100644 index 0000000000..d16da37712 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuPause.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuPause.Asm
+;
+; Abstract:
+;
+; CpuPause function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuPause (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuPause PROC
+ pause
+ ret
+CpuPause ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuSleep.S b/OldMdePkg/Library/BaseLib/X64/CpuSleep.S new file mode 100644 index 0000000000..681e4c12c3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuSleep.S @@ -0,0 +1,34 @@ +#------------------------------------------------------------------------------ ;
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuSleep.S
+#
+# Abstract:
+#
+# CpuSleep function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# CpuSleep (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _CpuSleep;
+_CpuSleep:
+ hlt
+ ret
diff --git a/OldMdePkg/Library/BaseLib/X64/CpuSleep.asm b/OldMdePkg/Library/BaseLib/X64/CpuSleep.asm new file mode 100644 index 0000000000..b2c4907032 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/CpuSleep.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; CpuSleep.Asm
+;
+; Abstract:
+;
+; CpuSleep function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; CpuSleep (
+; VOID
+; );
+;------------------------------------------------------------------------------
+CpuSleep PROC
+ hlt
+ ret
+CpuSleep ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/DisableInterrupts.S b/OldMdePkg/Library/BaseLib/X64/DisableInterrupts.S new file mode 100644 index 0000000000..da16886b8b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/DisableInterrupts.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# DisableInterrupts.S
+#
+# Abstract:
+#
+# DisableInterrupts function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# DisableInterrupts (
+# VOID
+# );
+#------------------------------------------------------------------------------
+.global _DisableInterrupts;
+_DisableInterrupts:
+ cli
+ ret
diff --git a/OldMdePkg/Library/BaseLib/X64/DisableInterrupts.asm b/OldMdePkg/Library/BaseLib/X64/DisableInterrupts.asm new file mode 100644 index 0000000000..586832c1a2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/DisableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableInterrupts.Asm
+;
+; Abstract:
+;
+; DisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; DisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+DisableInterrupts PROC
+ cli
+ ret
+DisableInterrupts ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/DisablePaging64.S b/OldMdePkg/Library/BaseLib/X64/DisablePaging64.S new file mode 100644 index 0000000000..d23313de38 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/DisablePaging64.S @@ -0,0 +1,66 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# DisablePaging64.S +# +# Abstract: +# +# AsmDisablePaging64 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86DisablePaging64 ( +# IN UINT16 Cs, %rdi +# IN UINT64 EntryPoint, %rsi +# IN UINT64 Context1, OPTIONAL %rdx +# IN UINT32 Context2, OPTIONAL %rcx +# IN UINT64 NewStack %r8 +# ); +#------------------------------------------------------------------------------ + +.global _InternalX86DisablePaging64 +_InternalX86DisablePaging64: + cli + shl $0x20,%rcx + lea (%rip), %eax + mov %eax,%ecx + push %rcx + mov %edx,%ebx + mov %r8d,%esi + mov %r9d,%edi + mov 0x28(%rsp),%eax + lret +L1: + mov %eax,%esp + mov %cr0,%rax + btr $0x1f,%eax + mov %rax,%cr0 + mov $0xc0000080,%ecx + rdmsr + and $0xfe,%ah + wrmsr + mov %cr4,%rax + and $0xdf,%al + mov %rax,%cr4 + push %rdi + push %rsi + callq *%rbx + jmp . + diff --git a/OldMdePkg/Library/BaseLib/X64/DisablePaging64.asm b/OldMdePkg/Library/BaseLib/X64/DisablePaging64.asm new file mode 100644 index 0000000000..518137ddc9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/DisablePaging64.asm @@ -0,0 +1,65 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging64.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging64 (
+; IN UINT16 Cs,
+; IN UINT32 EntryPoint,
+; IN UINT32 Context1, OPTIONAL
+; IN UINT32 Context2, OPTIONAL
+; IN UINT32 NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86DisablePaging64 PROC
+ cli
+ shl rcx, 32 ; rcx[32..47] <- Cs
+ lea eax, @F
+ mov esi, r8d
+ or rcx, rax ; rcx[0..47] <- Cs:@F
+ mov edi, r9d
+ mov eax, [rsp + 28h] ; eax <- New Stack
+ push rcx
+ retf ; switch to compatibility mode
+@@:
+ mov esp, eax ; set up new stack
+ mov rax, cr0
+ btr eax, 31
+ mov cr0, rax ; disable paging
+ mov ecx, 0c0000080h
+ rdmsr
+ and ah, NOT 1 ; clear LME
+ wrmsr
+ mov rax, cr4
+ and al, NOT (1 SHL 5) ; clear PAE
+ mov cr4, rax
+ push rdi ; push Context2
+ push rsi ; push Context1
+ call rdx ; transfer control to EntryPoint
+ hlt ; no one should get here
+InternalX86DisablePaging64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/EnableDisableInterrupts.S b/OldMdePkg/Library/BaseLib/X64/EnableDisableInterrupts.S new file mode 100644 index 0000000000..581b7bb345 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/EnableDisableInterrupts.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# EnableDisableInterrupts.S +# +# Abstract: +# +# EnableDisableInterrupts function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# EnableDisableInterrupts ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _EnableDisableInterrupts; +.align 16; +_EnableDisableInterrupts: + sti + cli + ret diff --git a/OldMdePkg/Library/BaseLib/X64/EnableDisableInterrupts.asm b/OldMdePkg/Library/BaseLib/X64/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..0d0400f007 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/EnableDisableInterrupts.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableDisableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableDisableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableDisableInterrupts PROC
+ sti
+ cli
+ ret
+EnableDisableInterrupts ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/EnableInterrupts.S b/OldMdePkg/Library/BaseLib/X64/EnableInterrupts.S new file mode 100644 index 0000000000..b81bcd0747 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/EnableInterrupts.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# EnableInterrupts.S +# +# Abstract: +# +# EnableInterrupts function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# EnableInterrupts ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _EnableInterrupts; +_EnableInterrupts: + sti + ret diff --git a/OldMdePkg/Library/BaseLib/X64/EnableInterrupts.asm b/OldMdePkg/Library/BaseLib/X64/EnableInterrupts.asm new file mode 100644 index 0000000000..8fb4adfe37 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/EnableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableInterrupts.Asm
+;
+; Abstract:
+;
+; EnableInterrupts function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; EnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EnableInterrupts PROC
+ sti
+ ret
+EnableInterrupts ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/EnablePaging64.S b/OldMdePkg/Library/BaseLib/X64/EnablePaging64.S new file mode 100644 index 0000000000..15209c0030 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/EnablePaging64.S @@ -0,0 +1,61 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# EnablePaging64.S +# +# Abstract: +# +# AsmEnablePaging64 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86EnablePaging64 ( +# IN UINT16 Cs, %rdi +# IN UINT64 EntryPoint, %rsi +# IN UINT64 Context1, OPTIONAL %rdx +# IN UINT64 Context2, OPTIONAL %rcx +# IN UINT64 NewStack %r8 +# ); +#------------------------------------------------------------------------------ +.global _InternalX86EnablePaging64; +_InternalX86EnablePaging64: + cli + pop %rax + callq Base +Base: + addl $(L1-Base),(%rsp) + mov %cr4,%rax + or $0x20,%al + mov %rax,%cr4 + mov $0xc0000080,%ecx + rdmsr + or $0x1,%ah + wrmsr + mov %cr0,%rax + bts $0x1f,%eax + mov %rax,%cr0 + lret +L1: + addr32 mov (%esp),%rbx + addr32 mov 0x8(%esp),%rcx + addr32 mov 0x10(%esp),%rdx + addr32 mov 0x18(%esp),%rsp + add $-0x20,%rsp + callq *%rbx + jmp . diff --git a/OldMdePkg/Library/BaseLib/X64/EnablePaging64.asm b/OldMdePkg/Library/BaseLib/X64/EnablePaging64.asm new file mode 100644 index 0000000000..c54843008a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/EnablePaging64.asm @@ -0,0 +1,64 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnablePaging64.Asm
+;
+; Abstract:
+;
+; AsmEnablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86EnablePaging64 (
+; IN UINT16 Cs,
+; IN UINT64 EntryPoint,
+; IN UINT64 Context1, OPTIONAL
+; IN UINT64 Context2, OPTIONAL
+; IN UINT64 NewStack
+; );
+;------------------------------------------------------------------------------
+InternalX86EnablePaging64 PROC
+ cli
+ pop rax ; skip the return address
+ call @Base
+@Base:
+ add dword ptr [rsp], @F - @Base ; offset for far retf, seg is the 1st arg
+ mov rax, cr4 ; mov eax, cr4
+ or al, (1 SHL 5)
+ mov cr4, rax ; enable PAE
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1 ; set LME
+ wrmsr
+ mov rax, cr0 ; mov eax, cr0
+ bts eax, 31
+ mov cr0, rax ; enable paging
+ retf
+@@: ; long mode starts here
+ mov rbx, [esp]
+ mov rcx, [esp + 8]
+ mov rdx, [esp + 10h]
+ mov rsp, [esp + 18h]
+ add rsp, -20h
+ call rbx
+ hlt ; halt processor if EntryPoint() returned
+InternalX86EnablePaging64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/FlushCacheLine.S b/OldMdePkg/Library/BaseLib/X64/FlushCacheLine.S new file mode 100644 index 0000000000..4c5a52fbf5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/FlushCacheLine.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# FlushCacheLine.S +# +# Abstract: +# +# AsmFlushCacheLine function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID * +# EFIAPI +# AsmFlushCacheLine ( +# IN VOID *LinearAddress +# ); +#------------------------------------------------------------------------------ +.global _AsmFlushCacheLine; +_AsmFlushCacheLine: + clflush (%rdi) + mov %rdi, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/FlushCacheLine.asm b/OldMdePkg/Library/BaseLib/X64/FlushCacheLine.asm new file mode 100644 index 0000000000..83966a691d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/FlushCacheLine.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ clflush [rcx]
+ mov rax, rcx
+ ret
+AsmFlushCacheLine ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/FxRestore.S b/OldMdePkg/Library/BaseLib/X64/FxRestore.S new file mode 100644 index 0000000000..cc9750c57c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/FxRestore.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# FxRestore.S +# +# Abstract: +# +# AsmFxRestore function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86FxRestore ( +# IN CONST IA32_FX_BUFFER *Buffer +# )# +#------------------------------------------------------------------------------ +.global _InternalX86FxRestore; +_InternalX86FxRestore: + fxrstor (%rcx) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/FxRestore.asm b/OldMdePkg/Library/BaseLib/X64/FxRestore.asm new file mode 100644 index 0000000000..7e7037e9e6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/FxRestore.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxRestore.Asm
+;
+; Abstract:
+;
+; AsmFxRestore function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxRestore (
+; IN CONST IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxRestore PROC
+ fxrstor [rcx]
+ ret
+InternalX86FxRestore ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/FxSave.S b/OldMdePkg/Library/BaseLib/X64/FxSave.S new file mode 100644 index 0000000000..432d7b9c13 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/FxSave.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# FxSave.S +# +# Abstract: +# +# AsmFxSave function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86FxSave ( +# OUT IA32_FX_BUFFER *Buffer +# ); +#------------------------------------------------------------------------------ +.global _InternalX86FxSave; +_InternalX86FxSave: + fxsave (%rcx) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/FxSave.asm b/OldMdePkg/Library/BaseLib/X64/FxSave.asm new file mode 100644 index 0000000000..ea19cd1648 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/FxSave.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FxSave.Asm
+;
+; Abstract:
+;
+; AsmFxSave function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86FxSave (
+; OUT IA32_FX_BUFFER *Buffer
+; );
+;------------------------------------------------------------------------------
+InternalX86FxSave PROC
+ fxsave [rcx]
+ ret
+InternalX86FxSave ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.S b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.S new file mode 100644 index 0000000000..cd85279c73 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# InterlockedCompareExchange32.Asm
+#
+# Abstract:
+#
+# InterlockedCompareExchange32 function
+#
+# Notes:
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# UINT32
+# EFIAPI
+# InterlockedCompareExchange32 (
+# IN UINT32 *Value,
+# IN UINT32 CompareValue,
+# IN UINT32 ExchangeValue
+# );
+#------------------------------------------------------------------------------
+.global _InternalSyncCompareExchange32;
+_InternalSyncCompareExchange32:
+ mov %edx, %eax
+ lock cmpxchg %r8d, (%rcx)
+ ret
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.asm b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..55b055453f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov eax, edx
+ lock cmpxchg [rcx], r8d
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.c b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.c new file mode 100644 index 0000000000..4a9fe6aca6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange32.c @@ -0,0 +1,36 @@ +/** @file
+ InterlockedCompareExchange32 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+long _InterlockedCompareExchange(
+ long volatile * Destination,
+ long Exchange,
+ long Comperand
+);
+
+#pragma intrinsic(_InterlockedCompareExchange)
+
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ return _InterlockedCompareExchange (Value, ExchangeValue, CompareValue);
+}
+
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.S b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.S new file mode 100644 index 0000000000..ae27964292 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# InterlockedCompareExchange64.S +# +# Abstract: +# +# InterlockedCompareExchange64 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# InterlockedCompareExchange64 ( +# IN UINT64 *Value, +# IN UINT64 CompareValue, +# IN UINT64 ExchangeValue +# ); +#------------------------------------------------------------------------------ +.global _InternalSyncCompareExchange64; +.align 16; +_InternalSyncCompareExchange64: + mov %rsi, %rax + lock cmpxchg %rdx,(%rdi) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.asm b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..88c25a56de --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InterlockedCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC
+ mov rax, rdx
+ lock cmpxchg [rcx], r8
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.c b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.c new file mode 100644 index 0000000000..bed1dc8972 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedCompareExchange64.c @@ -0,0 +1,36 @@ +/** @file
+ InterlockedCompareExchange64 function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+__int64 _InterlockedCompareExchange64(
+ __int64 volatile * Destination,
+ __int64 Exchange,
+ __int64 Comperand
+);
+
+#pragma intrinsic(_InterlockedCompareExchange64)
+
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ return _InterlockedCompareExchange64 (Value, ExchangeValue, CompareValue);
+}
+
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.S b/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.S new file mode 100644 index 0000000000..59ca54bb9f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# InterlockedDecrement.S +# +# Abstract: +# +# InterlockedDecrement function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT32 +# EFIAPI +# InterlockedDecrement ( +# IN UINT32 *Value +# ); +#------------------------------------------------------------------------------ +.global _InternalSyncDecrement; +_InternalSyncDecrement: + lock decl (%rcx) + mov (%rcx), %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.asm b/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.asm new file mode 100644 index 0000000000..f907fed4a8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ lock dec dword ptr [rcx]
+ mov eax, [rcx]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.c b/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.c new file mode 100644 index 0000000000..19e6a5dc49 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedDecrement.c @@ -0,0 +1,32 @@ +/** @file
+ InterlockedDecrement function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+long _InterlockedDecrement(
+ long * lpAddend
+);
+
+#pragma intrinsic(_InterlockedDecrement)
+
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN UINT32 *Value
+ )
+{
+ return _InterlockedDecrement (Value);
+}
+
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.S b/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.S new file mode 100644 index 0000000000..df4cb974b6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# InterlockedIncrement.S +# +# Abstract: +# +# InterlockedIncrement function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT32 +# EFIAPI +# InterlockedIncrement ( +# IN UINT32 *Value +# ); +#------------------------------------------------------------------------------ +.global _InternalSyncIncrement; +_InternalSyncIncrement: + lock incl (%rcx) + mov (%rcx), %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.asm b/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.asm new file mode 100644 index 0000000000..f5a4130bf1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InterlockedIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ lock inc dword ptr [rcx]
+ mov eax, [rcx]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.c b/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.c new file mode 100644 index 0000000000..eda9f79a5b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/InterlockedIncrement.c @@ -0,0 +1,32 @@ +/** @file
+ InterLockedIncrement function
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+long _InterlockedIncrement(
+ long * lpAddend
+);
+
+#pragma intrinsic(_InterlockedIncrement)
+
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN UINT32 *Value
+ )
+{
+ return _InterlockedIncrement (Value);
+}
+
diff --git a/OldMdePkg/Library/BaseLib/X64/Invd.S b/OldMdePkg/Library/BaseLib/X64/Invd.S new file mode 100644 index 0000000000..030ae454e6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Invd.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# Invd.S +# +# Abstract: +# +# AsmInvd function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmInvd ( +# VOID +# )# +#------------------------------------------------------------------------------ +.global _AsmInvd; +_AsmInvd: + invd + ret diff --git a/OldMdePkg/Library/BaseLib/X64/Invd.asm b/OldMdePkg/Library/BaseLib/X64/Invd.asm new file mode 100644 index 0000000000..446587923b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Invd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Invd.Asm
+;
+; Abstract:
+;
+; AsmInvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmInvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmInvd PROC
+ invd
+ ret
+AsmInvd ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/LongJump.S b/OldMdePkg/Library/BaseLib/X64/LongJump.S new file mode 100644 index 0000000000..1a6f859c8e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/LongJump.S @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# LongJump.Asm
+#
+# Abstract:
+#
+# Implementation of _LongJump() on x64.
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# InternalLongJump (
+# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+# IN UINTN Value
+# );
+#------------------------------------------------------------------------------
+.global _InternalLongJump
+_InternalLongJump:
+ mov (%rcx), %rbx
+ mov 0x8(%rcx), %rsp
+ mov 0x10(%rcx), %rbp
+ mov 0x18(%rcx), %rdi
+ mov 0x20(%rcx), %rsi
+ mov 0x28(%rcx), %r12
+ mov 0x30(%rcx), %r13
+ mov 0x38(%rcx), %r14
+ mov 0x40(%rcx), %r15
+ mov %rdx, %rax
+ jmp *0x48(%rcx)
diff --git a/OldMdePkg/Library/BaseLib/X64/LongJump.asm b/OldMdePkg/Library/BaseLib/X64/LongJump.asm new file mode 100644 index 0000000000..38e5606081 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/LongJump.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; LongJump.Asm
+;
+; Abstract:
+;
+; Implementation of _LongJump() on x64.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalLongJump (
+; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+InternalLongJump PROC
+ mov rbx, [rcx]
+ mov rsp, [rcx + 8]
+ mov rbp, [rcx + 10h]
+ mov rdi, [rcx + 18h]
+ mov rsi, [rcx + 20h]
+ mov r12, [rcx + 28h]
+ mov r13, [rcx + 30h]
+ mov r14, [rcx + 38h]
+ mov r15, [rcx + 40h]
+ mov rax, rdx ; set return value
+ jmp qword ptr [rcx + 48h]
+InternalLongJump ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/Monitor.S b/OldMdePkg/Library/BaseLib/X64/Monitor.S new file mode 100644 index 0000000000..13da27d8ad --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Monitor.S @@ -0,0 +1,41 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# Monitor.S +# +# Abstract: +# +# AsmMonitor function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmMonitor ( +# IN UINTN Eax, +# IN UINTN Ecx, +# IN UINTN Edx +# ); +#------------------------------------------------------------------------------ +.global _AsmMonitor; +.align 16; +_AsmMonitor: + mov %ecx,%eax + mov %edx,%ecx + mov %r8d,%edx + monitor + ret diff --git a/OldMdePkg/Library/BaseLib/X64/Monitor.asm b/OldMdePkg/Library/BaseLib/X64/Monitor.asm new file mode 100644 index 0000000000..ec9c3f8d03 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Monitor.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Monitor.Asm
+;
+; Abstract:
+;
+; AsmMonitor function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMonitor (
+; IN UINTN Eax,
+; IN UINTN Ecx,
+; IN UINTN Edx
+; );
+;------------------------------------------------------------------------------
+AsmMonitor PROC
+ mov eax, ecx
+ mov ecx, edx
+ mov edx, r8d
+ DB 0fh, 1, 0c8h ; monitor
+ ret
+AsmMonitor ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/Mwait.S b/OldMdePkg/Library/BaseLib/X64/Mwait.S new file mode 100644 index 0000000000..a32d004a18 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Mwait.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# Mwait.S +# +# Abstract: +# +# AsmMwait function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmMwait ( +# IN UINTN Eax, +# IN UINTN Ecx +# ); +#------------------------------------------------------------------------------ +.global _AsmMwait; +.align 16; +_AsmMwait: + mov %ecx,%eax + mov %edx,%ecx + mwait %rax,%rcx + ret diff --git a/OldMdePkg/Library/BaseLib/X64/Mwait.asm b/OldMdePkg/Library/BaseLib/X64/Mwait.asm new file mode 100644 index 0000000000..aae1d42758 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Mwait.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Mwait.Asm
+;
+; Abstract:
+;
+; AsmMwait function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmMwait (
+; IN UINTN Eax,
+; IN UINTN Ecx
+; );
+;------------------------------------------------------------------------------
+AsmMwait PROC
+ mov eax, ecx
+ mov ecx, edx
+ DB 0fh, 1, 0c9h ; mwait
+ ret
+AsmMwait ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/Non-existing.c b/OldMdePkg/Library/BaseLib/X64/Non-existing.c new file mode 100644 index 0000000000..4f0c932380 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Non-existing.c @@ -0,0 +1,110 @@ +/** @file
+ Non-existing BaseLib functions on x64
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Non-existing.c
+
+**/
+
+#include "../BaseLibInternals.h"
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+InternalX86EnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ //
+ // This function cannot work on X64 platform
+ //
+ ASSERT (FALSE);
+}
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+InternalX86DisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ //
+ // This function cannot work on X64 platform
+ //
+ ASSERT (FALSE);
+}
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr0.S b/OldMdePkg/Library/BaseLib/X64/ReadCr0.S new file mode 100644 index 0000000000..fa916d09fb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr0.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadCr0.S +# +# Abstract: +# +# AsmReadCr0 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadCr0 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadCr0; +.align 16; +_AsmReadCr0: + mov %cr0, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr0.asm b/OldMdePkg/Library/BaseLib/X64/ReadCr0.asm new file mode 100644 index 0000000000..3e369c3a81 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr0.Asm
+;
+; Abstract:
+;
+; AsmReadCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr0 PROC
+ mov rax, cr0
+ ret
+AsmReadCr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr2.S b/OldMdePkg/Library/BaseLib/X64/ReadCr2.S new file mode 100644 index 0000000000..96361bef72 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr2.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadCr2.S +# +# Abstract: +# +# AsmReadCr2 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadCr2 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadCr2; +.align 16; +_AsmReadCr2: + mov %cr2, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr2.asm b/OldMdePkg/Library/BaseLib/X64/ReadCr2.asm new file mode 100644 index 0000000000..8476f5af18 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr2.Asm
+;
+; Abstract:
+;
+; AsmReadCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr2 PROC
+ mov rax, cr2
+ ret
+AsmReadCr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr3.S b/OldMdePkg/Library/BaseLib/X64/ReadCr3.S new file mode 100644 index 0000000000..480486f093 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr3.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadCr3.S +# +# Abstract: +# +# AsmReadCr3 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadCr3 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadCr3; +.align 16; +_AsmReadCr3: + mov %cr3, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr3.asm b/OldMdePkg/Library/BaseLib/X64/ReadCr3.asm new file mode 100644 index 0000000000..af54d46373 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr3.Asm
+;
+; Abstract:
+;
+; AsmReadCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr3 PROC
+ mov rax, cr3
+ ret
+AsmReadCr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr4.S b/OldMdePkg/Library/BaseLib/X64/ReadCr4.S new file mode 100644 index 0000000000..e89b5cdab6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr4.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadCr4.S +# +# Abstract: +# +# AsmReadCr4 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadCr4 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadCr4; +.align 16; +_AsmReadCr4: + mov %cr4, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCr4.asm b/OldMdePkg/Library/BaseLib/X64/ReadCr4.asm new file mode 100644 index 0000000000..c8a881db9e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCr4.Asm
+;
+; Abstract:
+;
+; AsmReadCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadCr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCr4 PROC
+ mov rax, cr4
+ ret
+AsmReadCr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCs.S b/OldMdePkg/Library/BaseLib/X64/ReadCs.S new file mode 100644 index 0000000000..677747b813 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCs.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadCs.S +# +# Abstract: +# +# AsmReadCs function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadCs ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadCs; +.align 16; +_AsmReadCs: + mov %cs, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadCs.asm b/OldMdePkg/Library/BaseLib/X64/ReadCs.asm new file mode 100644 index 0000000000..642ce5b169 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadCs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadCs.Asm
+;
+; Abstract:
+;
+; AsmReadCs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadCs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadCs PROC
+ mov eax, cs
+ ret
+AsmReadCs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr0.S b/OldMdePkg/Library/BaseLib/X64/ReadDr0.S new file mode 100644 index 0000000000..1b441c344d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr0.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr0.S +# +# Abstract: +# +# AsmReadDr0 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr0 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr0; +.align 16; +_AsmReadDr0: + mov %dr0, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr0.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr0.asm new file mode 100644 index 0000000000..7e0d6b714a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr0.Asm
+;
+; Abstract:
+;
+; AsmReadDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr0 PROC
+ mov rax, dr0
+ ret
+AsmReadDr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr1.S b/OldMdePkg/Library/BaseLib/X64/ReadDr1.S new file mode 100644 index 0000000000..5151a80d9c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr1.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr1.S +# +# Abstract: +# +# AsmReadDr1 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr1 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr1; +.align 16; +_AsmReadDr1: + mov %dr1, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr1.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr1.asm new file mode 100644 index 0000000000..22f11c4e0f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr1.Asm
+;
+; Abstract:
+;
+; AsmReadDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr1 PROC
+ mov rax, dr1
+ ret
+AsmReadDr1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr2.S b/OldMdePkg/Library/BaseLib/X64/ReadDr2.S new file mode 100644 index 0000000000..f4516afd4d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr2.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr2.S +# +# Abstract: +# +# AsmReadDr2 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr2 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr2; +.align 16; +_AsmReadDr2: + mov %dr2, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr2.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr2.asm new file mode 100644 index 0000000000..3b81605861 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr2.Asm
+;
+; Abstract:
+;
+; AsmReadDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr2 PROC
+ mov rax, dr2
+ ret
+AsmReadDr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr3.S b/OldMdePkg/Library/BaseLib/X64/ReadDr3.S new file mode 100644 index 0000000000..c5c679c96e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr3.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr3.S +# +# Abstract: +# +# AsmReadDr3 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr3 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr3; +.align 16; +_AsmReadDr3: + mov %dr3, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr3.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr3.asm new file mode 100644 index 0000000000..1968fd0d67 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr3.Asm
+;
+; Abstract:
+;
+; AsmReadDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr3 PROC
+ mov rax, dr3
+ ret
+AsmReadDr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr4.S b/OldMdePkg/Library/BaseLib/X64/ReadDr4.S new file mode 100644 index 0000000000..f98c9ed35d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr4.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr4.S +# +# Abstract: +# +# AsmReadDr4 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr4 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr4; +.align 16; +_AsmReadDr4: + #DB 0fh, 21h, 0e0h + mov %dr4, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr4.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr4.asm new file mode 100644 index 0000000000..2bed12928b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr4.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr4.Asm
+;
+; Abstract:
+;
+; AsmReadDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr4 PROC
+ ;
+ ; There's no obvious reason to access this register, since it's aliased to
+ ; DR7 when DE=0 or an exception generated when DE=1
+ ;
+ DB 0fh, 21h, 0e0h
+ ret
+AsmReadDr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr5.S b/OldMdePkg/Library/BaseLib/X64/ReadDr5.S new file mode 100644 index 0000000000..421f57a418 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr5.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr5.S +# +# Abstract: +# +# AsmReadDr5 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr5 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr5; +.align 16; +_AsmReadDr5: + mov %dr5, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr5.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr5.asm new file mode 100644 index 0000000000..3bee3a56ec --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr5.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr5.Asm
+;
+; Abstract:
+;
+; AsmReadDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr5 PROC
+ ;
+ ; There's no obvious reason to access this register, since it's aliased to
+ ; DR7 when DE=0 or an exception generated when DE=1
+ ;
+ DB 0fh, 21h, 0e8h
+ ret
+AsmReadDr5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr6.S b/OldMdePkg/Library/BaseLib/X64/ReadDr6.S new file mode 100644 index 0000000000..6a159d8762 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr6.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr6.S +# +# Abstract: +# +# AsmReadDr6 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr6 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr6; +.align 16; +_AsmReadDr6: + mov %dr6, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr6.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr6.asm new file mode 100644 index 0000000000..a3dafb9b9f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr6.Asm
+;
+; Abstract:
+;
+; AsmReadDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr6 PROC
+ mov rax, dr6
+ ret
+AsmReadDr6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr7.S b/OldMdePkg/Library/BaseLib/X64/ReadDr7.S new file mode 100644 index 0000000000..9ffb09d13a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr7.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDr7.S +# +# Abstract: +# +# AsmReadDr7 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadDr7 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDr7; +.align 16; +_AsmReadDr7: + mov %dr7, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDr7.asm b/OldMdePkg/Library/BaseLib/X64/ReadDr7.asm new file mode 100644 index 0000000000..0cff14b5c4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDr7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDr7.Asm
+;
+; Abstract:
+;
+; AsmReadDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadDr7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDr7 PROC
+ mov rax, dr7
+ ret
+AsmReadDr7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDs.S b/OldMdePkg/Library/BaseLib/X64/ReadDs.S new file mode 100644 index 0000000000..58bee11beb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDs.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadDs.S +# +# Abstract: +# +# AsmReadDs function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadDs ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadDs; +.align 16; +_AsmReadDs: + movl %ds, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadDs.asm b/OldMdePkg/Library/BaseLib/X64/ReadDs.asm new file mode 100644 index 0000000000..6f2629872b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadDs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadDs.Asm
+;
+; Abstract:
+;
+; AsmReadDs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadDs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadDs PROC
+ mov eax, ds
+ ret
+AsmReadDs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadEflags.S b/OldMdePkg/Library/BaseLib/X64/ReadEflags.S new file mode 100644 index 0000000000..e895387673 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadEflags.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadEflags.S +# +# Abstract: +# +# AsmReadEflags function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmReadEflags ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadEflags; +.align 16; +_AsmReadEflags: + pushfq + pop %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadEflags.asm b/OldMdePkg/Library/BaseLib/X64/ReadEflags.asm new file mode 100644 index 0000000000..174ae95887 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadEflags.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEflags.Asm
+;
+; Abstract:
+;
+; AsmReadEflags function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmReadEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEflags PROC
+ pushfq
+ pop rax
+ ret
+AsmReadEflags ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadEs.S b/OldMdePkg/Library/BaseLib/X64/ReadEs.S new file mode 100644 index 0000000000..93df650371 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadEs.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadEs.S +# +# Abstract: +# +# AsmReadEs function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadEs ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadEs; +.align 16; +_AsmReadEs: + mov %es, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadEs.asm b/OldMdePkg/Library/BaseLib/X64/ReadEs.asm new file mode 100644 index 0000000000..d5fe84d73f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadEs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadEs.Asm
+;
+; Abstract:
+;
+; AsmReadEs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadEs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadEs PROC
+ mov eax, es
+ ret
+AsmReadEs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadFs.S b/OldMdePkg/Library/BaseLib/X64/ReadFs.S new file mode 100644 index 0000000000..ff658e1248 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadFs.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadFs.S +# +# Abstract: +# +# AsmReadFs function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadFs ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadFs; +.align 16; +_AsmReadFs: + mov %fs, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadFs.asm b/OldMdePkg/Library/BaseLib/X64/ReadFs.asm new file mode 100644 index 0000000000..d44ee545af --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadFs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadFs.Asm
+;
+; Abstract:
+;
+; AsmReadFs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadFs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadFs PROC
+ mov eax, fs
+ ret
+AsmReadFs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadGdtr.S b/OldMdePkg/Library/BaseLib/X64/ReadGdtr.S new file mode 100644 index 0000000000..c271a02d78 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadGdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadGdtr.S +# +# Abstract: +# +# AsmReadGdtr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86ReadGdtr ( +# OUT IA32_DESCRIPTOR *Gdtr +# ); +#------------------------------------------------------------------------------ +.global _InternalX86ReadGdtr; +.align 16; +_InternalX86ReadGdtr: + sgdt (%rcx) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadGdtr.asm b/OldMdePkg/Library/BaseLib/X64/ReadGdtr.asm new file mode 100644 index 0000000000..0bc2949b54 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadGdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGdtr.Asm
+;
+; Abstract:
+;
+; AsmReadGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadGdtr (
+; OUT IA32_DESCRIPTOR *Gdtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadGdtr PROC
+ sgdt fword ptr [rcx]
+ ret
+InternalX86ReadGdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadGs.S b/OldMdePkg/Library/BaseLib/X64/ReadGs.S new file mode 100644 index 0000000000..f92776c35d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadGs.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadGs.S +# +# Abstract: +# +# AsmReadGs function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadGs ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadGs; +.align 16; +_AsmReadGs: + mov %gs, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadGs.asm b/OldMdePkg/Library/BaseLib/X64/ReadGs.asm new file mode 100644 index 0000000000..bc5de7691b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadGs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadGs.Asm
+;
+; Abstract:
+;
+; AsmReadGs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadGs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadGs PROC
+ mov eax, gs
+ ret
+AsmReadGs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadIdtr.S b/OldMdePkg/Library/BaseLib/X64/ReadIdtr.S new file mode 100644 index 0000000000..cd7c09e6b7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadIdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadIdtr.AS +# +# Abstract: +# +# AsmReadIdtr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86ReadIdtr ( +# OUT IA32_DESCRIPTOR *Idtr +# ); +#------------------------------------------------------------------------------ +.global _InternalX86ReadIdtr; +.align 16; +_InternalX86ReadIdtr: + sidt (%rcx) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadIdtr.asm b/OldMdePkg/Library/BaseLib/X64/ReadIdtr.asm new file mode 100644 index 0000000000..db684f3671 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadIdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadIdtr.Asm
+;
+; Abstract:
+;
+; AsmReadIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86ReadIdtr (
+; OUT IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86ReadIdtr PROC
+ sidt fword ptr [rcx]
+ ret
+InternalX86ReadIdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadLdtr.S b/OldMdePkg/Library/BaseLib/X64/ReadLdtr.S new file mode 100644 index 0000000000..fac8e25d74 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadLdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadLdtr.AS +# +# Abstract: +# +# AsmReadLdtr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadLdtr ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadLdtr; +.align 16; +_AsmReadLdtr: + sldt %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadLdtr.asm b/OldMdePkg/Library/BaseLib/X64/ReadLdtr.asm new file mode 100644 index 0000000000..3d6a2f8843 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadLdtr.Asm
+;
+; Abstract:
+;
+; AsmReadLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadLdtr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadLdtr PROC
+ sldt eax
+ ret
+AsmReadLdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm0.S b/OldMdePkg/Library/BaseLib/X64/ReadMm0.S new file mode 100644 index 0000000000..b5912ca0b4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm0.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm0.S +# +# Abstract: +# +# AsmReadMm0 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm0 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm0; +.align 16; +_AsmReadMm0: + #DB 48h, 0fh, 7eh, 0c0h + movd %mm0, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm0.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm0.asm new file mode 100644 index 0000000000..0ed5c8f8ae --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm0.Asm
+;
+; Abstract:
+;
+; AsmReadMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm0 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm0 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0c0h
+ ret
+AsmReadMm0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm1.S b/OldMdePkg/Library/BaseLib/X64/ReadMm1.S new file mode 100644 index 0000000000..1f26cd4483 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm1.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm1.S +# +# Abstract: +# +# AsmReadMm1 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm1 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm1; +.align 16; +_AsmReadMm1: + #DB 48h, 0fh, 7eh, 0c8h + movd %mm1, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm1.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm1.asm new file mode 100644 index 0000000000..e24fcb5f9d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm1.Asm
+;
+; Abstract:
+;
+; AsmReadMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm1 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm1 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0c8h
+ ret
+AsmReadMm1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm2.S b/OldMdePkg/Library/BaseLib/X64/ReadMm2.S new file mode 100644 index 0000000000..ef864af090 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm2.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm2.S +# +# Abstract: +# +# AsmReadMm2 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm2 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm2; +.align 16; +_AsmReadMm2: + #DB 48h, 0fh, 7eh, 0d0h + movd %mm2, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm2.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm2.asm new file mode 100644 index 0000000000..860326b375 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm2.Asm
+;
+; Abstract:
+;
+; AsmReadMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm2 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm2 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0d0h
+ ret
+AsmReadMm2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm3.S b/OldMdePkg/Library/BaseLib/X64/ReadMm3.S new file mode 100644 index 0000000000..bd76cb20a2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm3.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm3.S +# +# Abstract: +# +# AsmReadMm3 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm3 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm3; +.align 16; +_AsmReadMm3: + #DB 48h, 0fh, 7eh, 0d8h + movd %mm3, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm3.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm3.asm new file mode 100644 index 0000000000..aca6f3d2df --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm3.Asm
+;
+; Abstract:
+;
+; AsmReadMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm3 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm3 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0d8h
+ ret
+AsmReadMm3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm4.S b/OldMdePkg/Library/BaseLib/X64/ReadMm4.S new file mode 100644 index 0000000000..99d766887c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm4.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm4.AS +# +# Abstract: +# +# AsmReadMm4 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm4 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm4; +.align 16; +_AsmReadMm4: + #DB 48h, 0fh, 7eh, 0e0h + movd %mm4, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm4.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm4.asm new file mode 100644 index 0000000000..dd52f99436 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm4.Asm
+;
+; Abstract:
+;
+; AsmReadMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm4 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm4 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0e0h
+ ret
+AsmReadMm4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm5.S b/OldMdePkg/Library/BaseLib/X64/ReadMm5.S new file mode 100644 index 0000000000..7a01c53ca5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm5.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm5.S +# +# Abstract: +# +# AsmReadMm5 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm5 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm5; +.align 16; +_AsmReadMm5: + #DB 48h, 0fh, 7eh, 0e8h + movd %mm5, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm5.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm5.asm new file mode 100644 index 0000000000..1f30e4bed4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm5.Asm
+;
+; Abstract:
+;
+; AsmReadMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm5 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm5 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0e8h
+ ret
+AsmReadMm5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm6.S b/OldMdePkg/Library/BaseLib/X64/ReadMm6.S new file mode 100644 index 0000000000..0c7ea79858 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm6.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm6.S +# +# Abstract: +# +# AsmReadMm6 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm6 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm6; +.align 16; +_AsmReadMm6: + #DB 48h, 0fh, 7eh, 0f0h + movd %mm6, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm6.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm6.asm new file mode 100644 index 0000000000..4e1f2a824b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm6.Asm
+;
+; Abstract:
+;
+; AsmReadMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm6 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm6 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0f0h
+ ret
+AsmReadMm6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm7.S b/OldMdePkg/Library/BaseLib/X64/ReadMm7.S new file mode 100644 index 0000000000..68f1dbdd30 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm7.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMm7.S +# +# Abstract: +# +# AsmReadMm7 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMm7 ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMm7; +.align 16; +_AsmReadMm7: + #DB 48h, 0fh, 7eh, 0f8h + movd %mm7, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMm7.asm b/OldMdePkg/Library/BaseLib/X64/ReadMm7.asm new file mode 100644 index 0000000000..d871a9f8dc --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMm7.Asm
+;
+; Abstract:
+;
+; AsmReadMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMm7 (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadMm7 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 7eh, 0f8h
+ ret
+AsmReadMm7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMsr64.S b/OldMdePkg/Library/BaseLib/X64/ReadMsr64.S new file mode 100644 index 0000000000..ac101cd670 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMsr64.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadMsr64.S +# +# Abstract: +# +# AsmReadMsr64 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadMsr64 ( +# IN UINT32 Index +# ); +#------------------------------------------------------------------------------ +.global _AsmReadMsr64; +.align 16; +_AsmReadMsr64: + rdmsr # edx & eax are zero extended + shl $0x20, %rdx + or %rdx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMsr64.asm b/OldMdePkg/Library/BaseLib/X64/ReadMsr64.asm new file mode 100644 index 0000000000..580c0761a4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMsr64.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadMsr64.Asm
+;
+; Abstract:
+;
+; AsmReadMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadMsr64 (
+; IN UINT32 Index
+; );
+;------------------------------------------------------------------------------
+AsmReadMsr64 PROC
+ rdmsr ; edx & eax are zero extended
+ shl rdx, 20h
+ or rax, rdx
+ ret
+AsmReadMsr64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadMsr64.c b/OldMdePkg/Library/BaseLib/X64/ReadMsr64.c new file mode 100644 index 0000000000..15a573fc09 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadMsr64.c @@ -0,0 +1,31 @@ +/** @file
+ CpuBreakpoint function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+unsigned __int64 __readmsr (int register);
+
+#pragma intrinsic(__readmsr)
+
+
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ )
+{
+ return __readmsr (Index);
+}
+
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadPmc.S b/OldMdePkg/Library/BaseLib/X64/ReadPmc.S new file mode 100644 index 0000000000..115f6335c7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadPmc.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadPmc.S +# +# Abstract: +# +# AsmReadPmc function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadPmc ( +# IN UINT32 PmcIndex +# ); +#------------------------------------------------------------------------------ +.global _AsmReadPmc; +.align 16; +_AsmReadPmc: + rdpmc + shl $0x20, %rdx + or %rdx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadPmc.asm b/OldMdePkg/Library/BaseLib/X64/ReadPmc.asm new file mode 100644 index 0000000000..5ca60fa85f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadPmc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadPmc.Asm
+;
+; Abstract:
+;
+; AsmReadPmc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadPmc (
+; IN UINT32 PmcIndex
+; );
+;------------------------------------------------------------------------------
+AsmReadPmc PROC
+ rdpmc
+ shl rdx, 20h
+ or rax, rdx
+ ret
+AsmReadPmc ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadSs.S b/OldMdePkg/Library/BaseLib/X64/ReadSs.S new file mode 100644 index 0000000000..a93a7032cf --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadSs.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadSs.S +# +# Abstract: +# +# AsmReadSs function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadSs ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadSs; +.align 16; +_AsmReadSs: + movl %ss, %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadSs.asm b/OldMdePkg/Library/BaseLib/X64/ReadSs.asm new file mode 100644 index 0000000000..2c2be564ac --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadSs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadSs.Asm
+;
+; Abstract:
+;
+; AsmReadSs function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadSs (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadSs PROC
+ mov eax, ss
+ ret
+AsmReadSs ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadTr.S b/OldMdePkg/Library/BaseLib/X64/ReadTr.S new file mode 100644 index 0000000000..5e3146bf27 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadTr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadTr.S +# +# Abstract: +# +# AsmReadTr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT16 +# EFIAPI +# AsmReadTr ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadTr; +.align 16; +_AsmReadTr: + str %eax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadTr.asm b/OldMdePkg/Library/BaseLib/X64/ReadTr.asm new file mode 100644 index 0000000000..7cf8cdfd43 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadTr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTr.Asm
+;
+; Abstract:
+;
+; AsmReadTr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; AsmReadTr (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTr PROC
+ str eax
+ ret
+AsmReadTr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/ReadTsc.S b/OldMdePkg/Library/BaseLib/X64/ReadTsc.S new file mode 100644 index 0000000000..776ffc2265 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadTsc.S @@ -0,0 +1,38 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# ReadTsc.S +# +# Abstract: +# +# AsmReadTsc function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmReadTsc ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmReadTsc; +.align 16; +_AsmReadTsc: + rdtsc + shl $0x20, %rdx + or %rdx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/ReadTsc.asm b/OldMdePkg/Library/BaseLib/X64/ReadTsc.asm new file mode 100644 index 0000000000..7c45eebd54 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; ReadTsc.Asm
+;
+; Abstract:
+;
+; AsmReadTsc function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmReadTsc PROC
+ rdtsc
+ shl rdx, 20h
+ or rax, rdx
+ ret
+AsmReadTsc ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/SetJump.S b/OldMdePkg/Library/BaseLib/X64/SetJump.S new file mode 100644 index 0000000000..eaaa43bf98 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/SetJump.S @@ -0,0 +1,42 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# SetJump.S +# +# Abstract: +# +# Implementation of SetJump() on x86_64 +# +#------------------------------------------------------------------------------ + +.extern InternalAssertJumpBuffer; +.global _SetJump; +_SetJump: + push %rcx + add $0xffffffffffffffe0,%rsp + call _InternalAssertJumpBuffer + add $0x20,%rsp + pop %rcx + pop %rdx + mov %rbx,(%rcx) + mov %rsp,0x8(%rcx) + mov %rbp,0x10(%rcx) + mov %rdi,0x18(%rcx) + mov %rsi,0x20(%rcx) + mov %r12,0x28(%rcx) + mov %r13,0x30(%rcx) + mov %r14,0x38(%rcx) + mov %r15,0x40(%rcx) + mov %rdx,0x48(%rcx) + xor %rax,%rax + jmpq *%rdx diff --git a/OldMdePkg/Library/BaseLib/X64/SetJump.asm b/OldMdePkg/Library/BaseLib/X64/SetJump.asm new file mode 100644 index 0000000000..2ed581ea9d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/SetJump.asm @@ -0,0 +1,54 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SetJump.Asm
+;
+; Abstract:
+;
+; Implementation of SetJump() on x64.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+EXTERNDEF InternalAssertJumpBuffer:PROC
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; SetJump (
+; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+; );
+;------------------------------------------------------------------------------
+SetJump PROC
+ push rcx
+ add rsp, -20h
+ call InternalAssertJumpBuffer
+ add rsp, 20h
+ pop rcx
+ pop rdx
+ mov [rcx], rbx
+ mov [rcx + 8], rsp
+ mov [rcx + 10h], rbp
+ mov [rcx + 18h], rdi
+ mov [rcx + 20h], rsi
+ mov [rcx + 28h], r12
+ mov [rcx + 30h], r13
+ mov [rcx + 38h], r14
+ mov [rcx + 40h], r15
+ mov [rcx + 48h], rdx
+ xor rax, rax
+ jmp rdx
+SetJump ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/SwitchStack.S b/OldMdePkg/Library/BaseLib/X64/SwitchStack.S new file mode 100644 index 0000000000..85cdb4306d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/SwitchStack.S @@ -0,0 +1,44 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# SwitchStack.S +# +# Abstract: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# Routine Description: +# +# Routine for switching stacks with 1 parameter +# +# Arguments: +# +# (rdi) EntryPoint - Entry point with new stack. +# (rsi) Context1 - Parameter1 for entry point. +# (rdx) Context2 - Parameter2 for entry point. +# (rcx) NewStack - Pointer to new stack. +# +# Returns: +# +# None +# +#------------------------------------------------------------------------------ +.global _InternalSwitchStack; +_InternalSwitchStack: + mov %rcx, %rax + mov %rdx, %rcx + mov %r8, %rdx + lea -0x20(%r9), %rsp + call *%rax diff --git a/OldMdePkg/Library/BaseLib/X64/SwitchStack.asm b/OldMdePkg/Library/BaseLib/X64/SwitchStack.asm new file mode 100644 index 0000000000..53d1417f0b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/SwitchStack.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; SwitchStack.Asm
+;
+; Abstract:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; Routine Description:
+;
+; Routine for switching stacks with 1 parameter
+;
+; Arguments:
+;
+; (rcx) EntryPoint - Entry point with new stack.
+; (rdx) Context - Parameter for entry point.
+; (r8) Context2 - Parameter2 for entry point.
+; (r9) NewStack - Pointer to new stack.
+;
+; Returns:
+;
+; None
+;
+;------------------------------------------------------------------------------
+InternalSwitchStack PROC
+ mov rax, rcx
+ mov rcx, rdx
+ mov rdx, r8
+ lea rsp, [r9 - 20h]
+ call rax
+InternalSwitchStack ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/Thunk16.S b/OldMdePkg/Library/BaseLib/X64/Thunk16.S new file mode 100644 index 0000000000..e69de29bb2 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Thunk16.S diff --git a/OldMdePkg/Library/BaseLib/X64/Thunk16.asm b/OldMdePkg/Library/BaseLib/X64/Thunk16.asm new file mode 100644 index 0000000000..556a8b47e3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Thunk16.asm @@ -0,0 +1,284 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Thunk.asm
+;
+; Abstract:
+;
+; Real mode thunk
+;
+;------------------------------------------------------------------------------
+
+EXTERNDEF m16Start:BYTE
+EXTERNDEF m16Size:WORD
+EXTERNDEF mThunk16Attr:WORD
+EXTERNDEF m16Gdt:WORD
+EXTERNDEF m16GdtrBase:WORD
+EXTERNDEF mTransition:WORD
+
+IA32_REGS STRUC 4t
+_EDI DD ?
+_ESI DD ?
+_EBP DD ?
+_ESP DD ?
+_EBX DD ?
+_EDX DD ?
+_ECX DD ?
+_EAX DD ?
+_DS DW ?
+_ES DW ?
+_FS DW ?
+_GS DW ?
+_EFLAGS DQ ?
+_EIP DD ?
+_CS DW ?
+_SS DW ?
+IA32_REGS ENDS
+
+ .const
+
+m16Size DW InternalAsmThunk16 - m16Start
+mThunk16Attr DW _ThunkAttr - m16Start
+m16Gdt DW _NullSeg - m16Start
+m16GdtrBase DW _16GdtrBase - m16Start
+mTransition DW _EntryPoint - m16Start
+
+ .code
+
+m16Start LABEL BYTE
+
+SavedGdt LABEL FWORD
+ DW ?
+ DQ ?
+
+;------------------------------------------------------------------------------
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed
+; by user code. It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_BackFromUserCode PROC
+ ;
+ ; The order of saved registers on the stack matches the order they appears
+ ; in IA32_REGS structure. This facilitates wrapper function to extract them
+ ; into that structure.
+ ;
+ ; Some instructions for manipulation of segment registers have to be written
+ ; in opcode since 64-bit MASM prevents accesses to those registers.
+ ;
+ DB 16h ; push ss
+ DB 0eh ; push cs
+ DB 66h
+ call @Base ; push eip
+@Base:
+ DB 66h
+ push 0 ; reserved high order 32 bits of EFlags
+ pushf ; pushfd actually
+ cli ; disable interrupts
+ push gs
+ push fs
+ DB 6 ; push es
+ DB 1eh ; push ds
+ DB 66h, 60h ; pushad
+ DB 66h, 0bah ; mov edx, imm32
+_ThunkAttr DD ?
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15
+ jz @1
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h
+ cli ; disable interrupts
+ jnc @2
+@1:
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL
+ jz @2
+ in al, 92h
+ or al, 2
+ out 92h, al ; deactivate A20M#
+@2:
+ mov eax, ss
+ lea bp, [esp + sizeof (IA32_REGS)]
+ ;
+ ; rsi in the following 2 instructions is indeed bp in 16-bit code
+ ;
+ mov word ptr (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._ESP, bp
+ DB 66h
+ mov ebx, (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._EIP
+ shl ax, 4 ; shl eax, 4
+ add bp, ax ; add ebp, eax
+ mov ax, cs
+ shl ax, 4
+ lea ax, [eax + ebx + (@64BitCode - @Base)]
+ DB 66h, 2eh, 89h, 87h ; mov cs:[bx + (@64Eip - @Base)], eax
+ DW @64Eip - @Base
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr4 DD ?
+ mov cr4, rax
+ ;
+ ; rdi in the instruction below is indeed bx in 16-bit code
+ ;
+ DB 66h, 2eh ; 2eh is "cs:" segment override
+ lgdt fword ptr [rdi + (SavedGdt - @Base)]
+ DB 66h
+ mov ecx, 0c0000080h
+ rdmsr
+ or ah, 1
+ wrmsr
+ DB 66h, 0b8h ; mov eax, imm32
+SavedCr0 DD ?
+ mov cr0, rax
+ DB 66h, 0eah ; jmp far cs:@64Bit
+@64Eip DD ?
+SavedCs DW ?
+@64BitCode:
+ mov rsp, r8 ; restore stack
+ ret
+_BackFromUserCode ENDP
+
+_EntryPoint DD _ToUserCode - m16Start
+ DW CODE16
+_16Gdtr LABEL FWORD
+ DW GDT_SIZE - 1
+_16GdtrBase DQ _NullSeg
+_16Idtr FWORD (1 SHL 10) - 1
+
+;------------------------------------------------------------------------------
+; _ToUserCode() takes control in real mode before passing control to user code.
+; It will be shadowed to somewhere in memory below 1MB.
+;------------------------------------------------------------------------------
+_ToUserCode PROC
+ mov ss, edx ; set new segment selectors
+ mov ds, edx
+ mov es, edx
+ mov fs, edx
+ mov gs, edx
+ DB 66h
+ mov ecx, 0c0000080h
+ mov cr0, rax ; real mode starts at next instruction
+ rdmsr
+ and ah, NOT 1
+ wrmsr
+ mov cr4, rbp
+ mov ss, esi ; set up 16-bit stack segment
+ mov sp, bx ; set up 16-bit stack pointer
+ DB 66h ; make the following call 32-bit
+ call @Base ; push eip
+@Base:
+ pop bp ; ebp <- address of @Base
+ push [esp + sizeof (IA32_REGS) + 2]
+ lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code
+ push rax
+ retf ; execution begins at next instruction
+@RealMode:
+ DB 66h, 2eh ; CS and operand size override
+ lidt fword ptr [rsi + (_16Idtr - @Base)]
+ DB 66h, 61h ; popad
+ DB 1fh ; pop ds
+ DB 07h ; pop es
+ pop fs
+ pop gs
+ popf ; popfd
+ lea sp, [esp + 4] ; skip high order 32 bits of EFlags
+ DB 66h ; make the following retf 32-bit
+ retf ; transfer control to user code
+_ToUserCode ENDP
+
+CODE16 = _16Code - $
+DATA16 = _16Data - $
+DATA32 = _32Data - $
+
+_NullSeg DQ 0
+_16Code LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 9bh
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+_16Data LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 8fh ; 16-bit segment, 4GB limit
+ DB 0
+_32Data LABEL QWORD
+ DW -1
+ DW 0
+ DB 0
+ DB 93h
+ DB 0cfh ; 16-bit segment, 4GB limit
+ DB 0
+
+GDT_SIZE = $ - _NullSeg
+
+;------------------------------------------------------------------------------
+; IA32_REGISTER_SET *
+; EFIAPI
+; InternalAsmThunk16 (
+; IN IA32_REGISTER_SET *RegisterSet,
+; IN OUT VOID *Transition
+; );
+;------------------------------------------------------------------------------
+InternalAsmThunk16 PROC USES rbp rbx rsi rdi
+ mov r10d, ds ; r9 ~ r11 are not accessible in 16-bit
+ mov r11d, es ; so use them for saving seg registers
+ mov r9d, ss
+ push fs
+ push gs
+ mov rsi, rcx
+ movzx r8d, (IA32_REGS ptr [rsi])._SS
+ mov edi, (IA32_REGS ptr [rsi])._ESP
+ lea rdi, [edi - (sizeof (IA32_REGS) + 4)]
+ imul eax, r8d, 16 ; eax <- r8d(stack segment) * 16
+ mov ebx, edi ; ebx <- stack for 16-bit code
+ push sizeof (IA32_REGS) / 4
+ add edi, eax ; edi <- linear address of 16-bit stack
+ pop rcx
+ rep movsd ; copy RegSet
+ lea ecx, [rdx + (SavedCr4 - m16Start)]
+ mov eax, edx ; eax <- transition code address
+ and edx, 0fh
+ shl eax, 12 ; segment address in high order 16 bits
+ lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address
+ stosd ; [edi] <- return address of user code
+ sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]
+ sidt fword ptr [rsp + 38h] ; save IDT stack in argument space
+ mov rax, cr0
+ mov [rcx + (SavedCr0 - SavedCr4)], eax
+ and eax, 7ffffffeh ; clear PE, PG bits
+ mov rbp, cr4
+ mov [rcx], ebp ; save CR4 in SavedCr4
+ and ebp, 300h ; clear all but PCE and OSFXSR bits
+ mov esi, r8d ; esi <- 16-bit stack segment
+ DB 6ah, DATA32 ; push DATA32
+ pop rdx ; rdx <- 32-bit data segment selector
+ lgdt fword ptr [rcx + (_16Gdtr - SavedCr4)]
+ mov ss, edx
+ pushfq
+ lea edx, [rdx + DATA16 - DATA32]
+ lea r8, @RetFromRealMode
+ push r8
+ mov r8d, cs
+ mov [rcx + (SavedCs - SavedCr4)], r8w
+ mov r8, rsp
+ jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]
+@RetFromRealMode:
+ popfq
+ lidt fword ptr [rsp + 38h] ; restore protected mode IDTR
+ lea eax, [rbp - sizeof (IA32_REGS)]
+ pop gs
+ pop fs
+ mov ss, r9d
+ mov es, r11d
+ mov ds, r10d
+ ret
+InternalAsmThunk16 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/Wbinvd.S b/OldMdePkg/Library/BaseLib/X64/Wbinvd.S new file mode 100644 index 0000000000..a4b9704d2d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Wbinvd.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# Wbinvd.S +# +# Abstract: +# +# AsmWbinvd function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWbinvd ( +# VOID +# ); +#------------------------------------------------------------------------------ +.global _AsmWbinvd; +.align 16; +_AsmWbinvd: + wbinvd + ret diff --git a/OldMdePkg/Library/BaseLib/X64/Wbinvd.asm b/OldMdePkg/Library/BaseLib/X64/Wbinvd.asm new file mode 100644 index 0000000000..ca0cb252b3 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/Wbinvd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; Wbinvd.Asm
+;
+; Abstract:
+;
+; AsmWbinvd function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWbinvd (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmWbinvd PROC
+ wbinvd
+ ret
+AsmWbinvd ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr0.S b/OldMdePkg/Library/BaseLib/X64/WriteCr0.S new file mode 100644 index 0000000000..f77dc815bf --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr0.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteCr0.S +# +# Abstract: +# +# AsmWriteCr0 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteCr0 ( +# UINTN Cr0 +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteCr0; +_AsmWriteCr0: + mov %rcx,%cr0 + mov %rcx,%rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr0.asm b/OldMdePkg/Library/BaseLib/X64/WriteCr0.asm new file mode 100644 index 0000000000..caf1904d2e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr0.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr0.Asm
+;
+; Abstract:
+;
+; AsmWriteCr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr0 (
+; UINTN Cr0
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr0 PROC
+ mov cr0, rcx
+ mov rax, rcx
+ ret
+AsmWriteCr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr2.S b/OldMdePkg/Library/BaseLib/X64/WriteCr2.S new file mode 100644 index 0000000000..66821616e1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr2.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteCr2.S +# +# Abstract: +# +# AsmWriteCr2 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteCr2 ( +# UINTN Cr2 +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteCr2; +_AsmWriteCr0: + mov %rcx,%cr2 + mov %rcx,%rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr2.asm b/OldMdePkg/Library/BaseLib/X64/WriteCr2.asm new file mode 100644 index 0000000000..ee5b546262 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr2.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr2.Asm
+;
+; Abstract:
+;
+; AsmWriteCr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr2 (
+; UINTN Cr2
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr2 PROC
+ mov cr2, rcx
+ mov rax, rcx
+ ret
+AsmWriteCr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr3.S b/OldMdePkg/Library/BaseLib/X64/WriteCr3.S new file mode 100644 index 0000000000..880ed9737b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr3.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteCr3.S +# +# Abstract: +# +# AsmWriteCr3 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteCr3 ( +# UINTN Cr3 +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteCr3; +_AsmWriteCr3: + mov %rcx,%cr3 + mov %rcx,%rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr3.asm b/OldMdePkg/Library/BaseLib/X64/WriteCr3.asm new file mode 100644 index 0000000000..e63229820e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr3.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr3.Asm
+;
+; Abstract:
+;
+; AsmWriteCr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr3 (
+; UINTN Cr3
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr3 PROC
+ mov cr3, rcx
+ mov rax, rcx
+ ret
+AsmWriteCr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr4.S b/OldMdePkg/Library/BaseLib/X64/WriteCr4.S new file mode 100644 index 0000000000..046936352f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr4.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteCr4.S +# +# Abstract: +# +# AsmWriteCr4 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteCr4 ( +# UINTN Cr4 +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteCr4; +_AsmWriteCr4: + mov %rcx,%cr4 + mov %rcx,%rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteCr4.asm b/OldMdePkg/Library/BaseLib/X64/WriteCr4.asm new file mode 100644 index 0000000000..3e79fe23e4 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteCr4.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteCr4.Asm
+;
+; Abstract:
+;
+; AsmWriteCr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteCr4 (
+; UINTN Cr4
+; );
+;------------------------------------------------------------------------------
+AsmWriteCr4 PROC
+ mov cr4, rcx
+ mov rax, rcx
+ ret
+AsmWriteCr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr0.S b/OldMdePkg/Library/BaseLib/X64/WriteDr0.S new file mode 100644 index 0000000000..080e56aeb5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr0.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr0.S +# +# Abstract: +# +# AsmWriteDr0 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr0 ( +# UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr0; +.align 16; +_AsmWriteDr0: + mov %rcx, %dr0 + mov %rcx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr0.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr0.asm new file mode 100644 index 0000000000..a1131fead9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr0.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr0.Asm
+;
+; Abstract:
+;
+; AsmWriteDr0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr0 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr0 PROC
+ mov dr0, rcx
+ mov rax, rcx
+ ret
+AsmWriteDr0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr1.S b/OldMdePkg/Library/BaseLib/X64/WriteDr1.S new file mode 100644 index 0000000000..af61b68e88 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr1.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr1.S +# +# Abstract: +# +# AsmWriteDr1 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr1 ( +# UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr1; +.align 16; +_AsmWriteDr1: + mov %rcx, %dr1 + mov %rcx, rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr1.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr1.asm new file mode 100644 index 0000000000..366edb6ef8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr1.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr1.Asm
+;
+; Abstract:
+;
+; AsmWriteDr1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr1 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr1 PROC
+ mov dr1, rcx
+ mov rax, rcx
+ ret
+AsmWriteDr1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr2.S b/OldMdePkg/Library/BaseLib/X64/WriteDr2.S new file mode 100644 index 0000000000..a9e5369175 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr2.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr2.S +# +# Abstract: +# +# AsmWriteDr2 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr2 ( +# UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr2; +.align 16; +_AsmWriteDr2: + mov %rcx, %dr2 + mov %rcx, rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr2.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr2.asm new file mode 100644 index 0000000000..bde8e3d929 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr2.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr2.Asm
+;
+; Abstract:
+;
+; AsmWriteDr2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr2 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr2 PROC
+ mov dr2, rcx
+ mov rax, rcx
+ ret
+AsmWriteDr2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr3.S b/OldMdePkg/Library/BaseLib/X64/WriteDr3.S new file mode 100644 index 0000000000..04017cc886 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr3.S @@ -0,0 +1,37 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr3.S +# +# Abstract: +# +# AsmWriteDr3 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr3 ( +# UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr3; +.align 16; +_AsmWriteDr3: + mov %rcx, %dr3 + mov %rcx, rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr3.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr3.asm new file mode 100644 index 0000000000..65180a27d5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr3.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr3.Asm
+;
+; Abstract:
+;
+; AsmWriteDr3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr3 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr3 PROC
+ mov dr3, rcx
+ mov rax, rcx
+ ret
+AsmWriteDr3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr4.S b/OldMdePkg/Library/BaseLib/X64/WriteDr4.S new file mode 100644 index 0000000000..b6b4e7821c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr4.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr4.S +# +# Abstract: +# +# AsmWriteDr4 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr4 ( +# IN UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr4; +_AsmWriteDr4: + mov %rcx, %dr4 + mov %rcx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr4.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr4.asm new file mode 100644 index 0000000000..188a9d4ddc --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr4.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr4.Asm
+;
+; Abstract:
+;
+; AsmWriteDr4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr4 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr4 PROC
+ ;
+ ; There's no obvious reason to access this register, since it's aliased to
+ ; DR6 when DE=0 or an exception generated when DE=1
+ ;
+ DB 0fh, 23h, 0e1h
+ mov rax, rcx
+ ret
+AsmWriteDr4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr5.S b/OldMdePkg/Library/BaseLib/X64/WriteDr5.S new file mode 100644 index 0000000000..7539095890 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr5.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr5.S +# +# Abstract: +# +# AsmWriteDr5 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr5 ( +# IN UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr5; +_AsmWriteDr5: + mov %rcx, %dr5 + mov %rcx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr5.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr5.asm new file mode 100644 index 0000000000..86009c3287 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr5.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr5.Asm
+;
+; Abstract:
+;
+; AsmWriteDr5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr5 PROC
+ ;
+ ; There's no obvious reason to access this register, since it's aliased to
+ ; DR7 when DE=0 or an exception generated when DE=1
+ ;
+ DB 0fh, 23h, 0e9h
+ mov rax, rcx
+ ret
+AsmWriteDr5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr6.S b/OldMdePkg/Library/BaseLib/X64/WriteDr6.S new file mode 100644 index 0000000000..862726079e --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr6.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr6.S +# +# Abstract: +# +# AsmWriteDr6 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr6 ( +# IN UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr6; +_AsmWriteDr6: + mov %rcx, %dr6 + mov %rcx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr6.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr6.asm new file mode 100644 index 0000000000..f1ddae8bfc --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr6.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr6.Asm
+;
+; Abstract:
+;
+; AsmWriteDr6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr6 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr6 PROC
+ mov dr6, rcx
+ mov rax, rcx
+ ret
+AsmWriteDr6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr7.S b/OldMdePkg/Library/BaseLib/X64/WriteDr7.S new file mode 100644 index 0000000000..8699d9536f --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr7.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteDr7.S +# +# Abstract: +# +# AsmWriteDr7 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINTN +# EFIAPI +# AsmWriteDr7 ( +# IN UINTN Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteDr7; +_AsmWriteDr7: + mov %rcx, %dr7 + mov %rcx, %rax + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteDr7.asm b/OldMdePkg/Library/BaseLib/X64/WriteDr7.asm new file mode 100644 index 0000000000..6a0cbfa6ff --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteDr7.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteDr7.Asm
+;
+; Abstract:
+;
+; AsmWriteDr7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINTN
+; EFIAPI
+; AsmWriteDr7 (
+; IN UINTN Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteDr7 PROC
+ mov dr7, rcx
+ mov rax, rcx
+ ret
+AsmWriteDr7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteGdtr.S b/OldMdePkg/Library/BaseLib/X64/WriteGdtr.S new file mode 100644 index 0000000000..1e9d84b426 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteGdtr.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteGdtr.S +# +# Abstract: +# +# AsmWriteGdtr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86WriteGdtr ( +# IN CONST IA32_DESCRIPTOR *Idtr +# ); +#------------------------------------------------------------------------------ +.global _InternalX86WriteGdtr; +_InternalX86WriteGdtr: + lgdt (%rcx) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteGdtr.asm b/OldMdePkg/Library/BaseLib/X64/WriteGdtr.asm new file mode 100644 index 0000000000..fa99a499e7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteGdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteGdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteGdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteGdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteGdtr PROC
+ lgdt fword ptr [rcx]
+ ret
+InternalX86WriteGdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteIdtr.S b/OldMdePkg/Library/BaseLib/X64/WriteIdtr.S new file mode 100644 index 0000000000..feb085ff58 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteIdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteIdtr.S +# +# Abstract: +# +# AsmWriteIdtr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86WriteIdtr ( +# IN CONST IA32_DESCRIPTOR *Idtr +# ); +#------------------------------------------------------------------------------ +.global _InternalX86WriteIdtr; +.align 16; +_InternalX86WriteIdtr: + lidt (%rcx) + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteIdtr.asm b/OldMdePkg/Library/BaseLib/X64/WriteIdtr.asm new file mode 100644 index 0000000000..2f6c081ab6 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteIdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteIdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteIdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86WriteIdtr (
+; IN CONST IA32_DESCRIPTOR *Idtr
+; );
+;------------------------------------------------------------------------------
+InternalX86WriteIdtr PROC
+ lidt fword ptr [rcx]
+ ret
+InternalX86WriteIdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteLdtr.S b/OldMdePkg/Library/BaseLib/X64/WriteLdtr.S new file mode 100644 index 0000000000..c07ab831f9 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteLdtr.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteLdtr.S +# +# Abstract: +# +# AsmWriteLdtr function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteLdtr ( +# IN UINT16 Ldtr +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteLdtr; +.align 16; +_AsmWriteLdtr: + lldt %cx + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteLdtr.asm b/OldMdePkg/Library/BaseLib/X64/WriteLdtr.asm new file mode 100644 index 0000000000..d85ae38f29 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteLdtr.Asm
+;
+; Abstract:
+;
+; AsmWriteLdtr function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteLdtr (
+; IN UINT16 Ldtr
+; );
+;------------------------------------------------------------------------------
+AsmWriteLdtr PROC
+ lldt cx
+ ret
+AsmWriteLdtr ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm0.S b/OldMdePkg/Library/BaseLib/X64/WriteMm0.S new file mode 100644 index 0000000000..2d805a14dc --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm0.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm0.S +# +# Abstract: +# +# AsmWriteMm0 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm0 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm0; +_AsmWriteMm0: + movd %rcx, %xmm0 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm0.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm0.asm new file mode 100644 index 0000000000..7496362d86 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm0.Asm
+;
+; Abstract:
+;
+; AsmWriteMm0 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm0 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm0 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0c1h
+ ret
+AsmWriteMm0 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm1.S b/OldMdePkg/Library/BaseLib/X64/WriteMm1.S new file mode 100644 index 0000000000..ff8162e727 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm1.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm1.S +# +# Abstract: +# +# AsmWriteMm1 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm1 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm1; +_AsmWriteMm1: + movd %rcx, %mm1 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm1.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm1.asm new file mode 100644 index 0000000000..a00f551f8a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm1.Asm
+;
+; Abstract:
+;
+; AsmWriteMm1 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm1 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm1 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0c9h
+ ret
+AsmWriteMm1 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm2.S b/OldMdePkg/Library/BaseLib/X64/WriteMm2.S new file mode 100644 index 0000000000..a98e73650c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm2.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm2.S +# +# Abstract: +# +# AsmWriteMm2 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm2 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm2; +_AsmWriteMm2: + movd %rcx, %mm2 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm2.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm2.asm new file mode 100644 index 0000000000..01db79007d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm2.Asm
+;
+; Abstract:
+;
+; AsmWriteMm2 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm2 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm2 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0d1h
+ ret
+AsmWriteMm2 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm3.S b/OldMdePkg/Library/BaseLib/X64/WriteMm3.S new file mode 100644 index 0000000000..81561e3594 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm3.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm3.S +# +# Abstract: +# +# AsmWriteMm3 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm3 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm3; +_AsmWriteMm3: + movd %rcx, %mm3 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm3.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm3.asm new file mode 100644 index 0000000000..59464641eb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm3.Asm
+;
+; Abstract:
+;
+; AsmWriteMm3 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm3 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm3 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0d9h
+ ret
+AsmWriteMm3 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm4.S b/OldMdePkg/Library/BaseLib/X64/WriteMm4.S new file mode 100644 index 0000000000..124d946dde --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm4.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm4.S +# +# Abstract: +# +# AsmWriteMm4 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm4 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm4; +_AsmWriteMm4: + movd %rcx, %mm4 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm4.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm4.asm new file mode 100644 index 0000000000..6848dbf7ec --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm4.Asm
+;
+; Abstract:
+;
+; AsmWriteMm4 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm4 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm4 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0e1h
+ ret
+AsmWriteMm4 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm5.S b/OldMdePkg/Library/BaseLib/X64/WriteMm5.S new file mode 100644 index 0000000000..0935ddc0b1 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm5.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm5.S +# +# Abstract: +# +# AsmWriteMm5 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm5 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm5; +_AsmWriteMm5: + movd %rcx, %mm5 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm5.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm5.asm new file mode 100644 index 0000000000..fbe44ae078 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm5.Asm
+;
+; Abstract:
+;
+; AsmWriteMm5 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm5 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm5 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0e9h
+ ret
+AsmWriteMm5 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm6.S b/OldMdePkg/Library/BaseLib/X64/WriteMm6.S new file mode 100644 index 0000000000..02b50cf055 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm6.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm6.S +# +# Abstract: +# +# AsmWriteMm6 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm6 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm6; +_AsmWriteMm6: + movd %rcx, %mm6 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm6.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm6.asm new file mode 100644 index 0000000000..cd5938828d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm6.Asm
+;
+; Abstract:
+;
+; AsmWriteMm6 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm6 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm6 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0f1h
+ ret
+AsmWriteMm6 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm7.S b/OldMdePkg/Library/BaseLib/X64/WriteMm7.S new file mode 100644 index 0000000000..60292721e8 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm7.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMm7.S +# +# Abstract: +# +# AsmWriteMm7 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWriteMm7 ( +# IN UINT64 Value +# ); +#------------------------------------------------------------------------------ +.global _AsmWriteMm7; +_AsmWriteMm7: + movd %rcx, %mm7 + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMm7.asm b/OldMdePkg/Library/BaseLib/X64/WriteMm7.asm new file mode 100644 index 0000000000..9636a4cd8d --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMm7.Asm
+;
+; Abstract:
+;
+; AsmWriteMm7 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmWriteMm7 (
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMm7 PROC
+ ;
+ ; 64-bit MASM doesn't support MMX instructions, so use opcode here
+ ;
+ DB 48h, 0fh, 6eh, 0f9h
+ ret
+AsmWriteMm7 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMsr64.S b/OldMdePkg/Library/BaseLib/X64/WriteMsr64.S new file mode 100644 index 0000000000..88ff48bf26 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMsr64.S @@ -0,0 +1,40 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# WriteMsr64.S +# +# Abstract: +# +# AsmWriteMsr64 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# UINT64 +# EFIAPI +# AsmWriteMsr64 ( +# IN UINT32 Index, +# IN UINT64 Value +# ); +# TODO: +#------------------------------------------------------------------------------ +.global _AsmWriteMsr64; +.align 16; +_AsmWriteMsr64: + mov %rdx, %rax + shr $0x20, %rdx + wrmsr + ret diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMsr64.asm b/OldMdePkg/Library/BaseLib/X64/WriteMsr64.asm new file mode 100644 index 0000000000..b7704b8185 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMsr64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; WriteMsr64.Asm
+;
+; Abstract:
+;
+; AsmWriteMsr64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; AsmWriteMsr64 (
+; IN UINT32 Index,
+; IN UINT64 Value
+; );
+;------------------------------------------------------------------------------
+AsmWriteMsr64 PROC
+ mov rax, rdx ; meanwhile, rax <- return value
+ shr rdx, 20h ; edx:eax contains the value to write
+ wrmsr
+ ret
+AsmWriteMsr64 ENDP
+
+ END
diff --git a/OldMdePkg/Library/BaseLib/X64/WriteMsr64.c b/OldMdePkg/Library/BaseLib/X64/WriteMsr64.c new file mode 100644 index 0000000000..1d1e0bc332 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/X64/WriteMsr64.c @@ -0,0 +1,32 @@ +/** @file
+ CpuBreakpoint function.
+
+ Copyright (c) 2006 - 2007, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+//
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics
+//
+void __writemsr (unsigned long Register, unsigned __int64 Value);
+
+#pragma intrinsic(__writemsr)
+
+UINT64
+EFIAPI
+AsmWriteMsr64 (
+ IN UINT32 Index,
+ IN UINT64 Value
+ )
+{
+ __writemsr (Index, Value);
+ return Value;
+}
+
diff --git a/OldMdePkg/Library/BaseLib/x86DisablePaging32.c b/OldMdePkg/Library/BaseLib/x86DisablePaging32.c new file mode 100644 index 0000000000..417a7794bb --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86DisablePaging32.c @@ -0,0 +1,65 @@ +/** @file
+ IA-32/x64 AsmDisablePaging32()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86DisablePaging32.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit paged mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86DisablePaging64.c b/OldMdePkg/Library/BaseLib/x86DisablePaging64.c new file mode 100644 index 0000000000..18496522ca --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86DisablePaging64.c @@ -0,0 +1,62 @@ +/** @file
+ IA-32/x64 AsmDisablePaging64()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86DisablePaging64.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 64-bit paged mode, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging64 (
+ IN UINT16 Cs,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86EnablePaging32.c b/OldMdePkg/Library/BaseLib/x86EnablePaging32.c new file mode 100644 index 0000000000..f186146940 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86EnablePaging32.c @@ -0,0 +1,68 @@ +/** @file
+ IA-32/x64 AsmEnablePaging32()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86EnablePaging32.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ )
+{
+ ASSERT (EntryPoint != NULL);
+ ASSERT (NewStack != NULL);
+ InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86EnablePaging64.c b/OldMdePkg/Library/BaseLib/x86EnablePaging64.c new file mode 100644 index 0000000000..424568d0f7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86EnablePaging64.c @@ -0,0 +1,64 @@ +/** @file
+ IA-32/x64 AsmEnablePaging64()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86EnablePaging64.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode with flat
+ descriptors, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+ IN UINT16 Cs,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ )
+{
+ ASSERT (EntryPoint != 0);
+ ASSERT (NewStack != 0);
+ InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86FxRestore.c b/OldMdePkg/Library/BaseLib/x86FxRestore.c new file mode 100644 index 0000000000..70a0c24025 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86FxRestore.c @@ -0,0 +1,48 @@ +/** @file
+ IA-32/x64 AsmFxRestore()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86FxRestore.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Buffer was not saved with AsmFxSave(), then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+
+ //
+ // Check the flag recorded by AsmFxSave()
+ //
+ ASSERT (*(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) == 0xAA5555AA);
+
+ InternalX86FxRestore (Buffer);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86FxSave.c b/OldMdePkg/Library/BaseLib/x86FxSave.c new file mode 100644 index 0000000000..18c329195c --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86FxSave.c @@ -0,0 +1,47 @@ +/** @file
+ IA-32/x64 AsmFxSave()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86FxSave.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ )
+{
+ ASSERT (Buffer != NULL);
+ ASSERT (((UINTN)Buffer & 0xf) == 0);
+
+ InternalX86FxSave (Buffer);
+
+ //
+ // Mark one flag at end of Buffer, it will be check by AsmFxRestor()
+ //
+ *(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) = 0xAA5555AA;
+}
diff --git a/OldMdePkg/Library/BaseLib/x86GetInterruptState.c b/OldMdePkg/Library/BaseLib/x86GetInterruptState.c new file mode 100644 index 0000000000..2e06efbc83 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86GetInterruptState.c @@ -0,0 +1,39 @@ +/** @file
+ IA-32/x64 GetInterruptState()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86GetInterruptState.c
+
+**/
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ )
+{
+ IA32_EFLAGS32 EFlags;
+
+ EFlags.UintN = AsmReadEflags ();
+ return (BOOLEAN)(EFlags.Bits.IF == 1);
+}
+
+
diff --git a/OldMdePkg/Library/BaseLib/x86MemoryFence.c b/OldMdePkg/Library/BaseLib/x86MemoryFence.c new file mode 100644 index 0000000000..96b1bf26c5 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86MemoryFence.c @@ -0,0 +1,31 @@ +/** @file
+ IA-32/x64 MemoryFence().
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86MemoryFence.c
+
+**/
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ )
+{
+ return;
+}
diff --git a/OldMdePkg/Library/BaseLib/x86Msr.c b/OldMdePkg/Library/BaseLib/x86Msr.c new file mode 100644 index 0000000000..aa8e25b83a --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86Msr.c @@ -0,0 +1,649 @@ +/** @file
+ IA-32/x64 MSR functions.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Msr.c
+
+**/
+
+/**
+ Returns the lower 32-bits of a Machine Specific Register(MSR).
+
+ Reads and returns the lower 32-bits of the MSR specified by Index.
+ No parameter checking is performed on Index, and some Index values may cause
+ CPU exceptions. The caller must either guarantee that Index is valid, or the
+ caller must set up exception handlers to catch the exceptions. This function
+ is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The lower 32 bits of the MSR identified by Index.
+
+**/
+UINT32
+EFIAPI
+AsmReadMsr32 (
+ IN UINT32 Index
+ )
+{
+ return (UINT32)AsmReadMsr64 (Index);
+}
+
+/**
+ Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).
+
+ Writes the 32-bit value specified by Value to the MSR specified by Index. The
+ upper 32-bits of the MSR write are set to zero. The 32-bit value written to
+ the MSR is returned. No parameter checking is performed on Index or Value,
+ and some of these may cause CPU exceptions. The caller must either guarantee
+ that Index and Value are valid, or the caller must establish proper exception
+ handlers. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 32-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+AsmWriteMsr32 (
+ IN UINT32 Index,
+ IN UINT32 Value
+ )
+{
+ return (UINT32)AsmWriteMsr64 (Index, Value);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
+ writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the lower 32-bits of the read result and the value specified by
+ OrData, and writes the result to the 64-bit MSR specified by Index. The lower
+ 32-bits of the value written to the MSR is returned. No parameter checking is
+ performed on Index or OrData, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and OrData are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrOr32 (
+ IN UINT32 Index,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrOr64 (Index, OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
+ the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData, and
+ writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
+ the value written to the MSR is returned. No parameter checking is performed
+ on Index or AndData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index and AndData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAnd32 (
+ IN UINT32 Index,
+ IN UINT32 AndData
+ )
+{
+ return (UINT32)AsmMsrAnd64 (Index, AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
+ on the lower 32-bits, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData
+ preserving the upper 32-bits, performs a bitwise inclusive OR between the
+ result of the AND operation and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Address. The lower 32-bits of the value
+ written to the MSR is returned. No parameter checking is performed on Index,
+ AndData, or OrData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index, AndData, and OrData are valid, or the
+ caller must establish proper exception handlers. This function is only
+ available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAndThenOr32 (
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned. The caller must either guarantee that Index is valid, or the caller
+ must set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read from the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldRead32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination MSR are preserved. The lower 32-bits of the MSR written is
+ returned. Extra left bits in Value are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldWrite32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+{
+ ASSERT (EndBit < sizeof (Value) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The lower 32-bits of the value
+ written to the MSR are returned. Extra left bits in OrData are stripped. The
+ caller must either guarantee that Index and the data written is valid, or
+ the caller must set up exception handlers to catch the exceptions. This
+ function is only available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (OrData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The lower 32-bits of the value written to the
+ MSR are returned. Extra left bits in AndData are stripped. The caller must
+ either guarantee that Index and the data written is valid, or the caller must
+ set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAnd32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
+ bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ lower 32-bits of the value written to the MSR are returned. Extra left bits
+ in both AndData and OrData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAndThenOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+{
+ ASSERT (EndBit < sizeof (AndData) * 8);
+ ASSERT (StartBit <= EndBit);
+ return (UINT32)AsmMsrBitFieldAndThenOr64 (
+ Index,
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ );
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
+ back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. No parameter checking is performed on Index or OrData, and some of
+ these may cause CPU exceptions. The caller must either guarantee that Index
+ and OrData are valid, or the caller must establish proper exception handlers.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrOr64 (
+ IN UINT32 Index,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by OrData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned. No
+ parameter checking is performed on Index or OrData, and some of these may
+ cause CPU exceptions. The caller must either guarantee that Index and OrData
+ are valid, or the caller must establish proper exception handlers. This
+ function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAnd64 (
+ IN UINT32 Index,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);
+}
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
+ OR, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
+ result and the value specified by AndData, performs a bitwise inclusive OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit MSR specified by Index. The value written
+ to the MSR is returned. No parameter checking is performed on Index, AndData,
+ or OrData, and some of these may cause CPU exceptions. The caller must either
+ guarantee that Index, AndData, and OrData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAndThenOr64 (
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);
+}
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the 64-bit MSR. The bit field is specified by the
+ StartBit and the EndBit. The value of the bit field is returned. The caller
+ must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldRead64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+{
+ return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);
+}
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
+ the StartBit and the EndBit. All other bits in the destination MSR are
+ preserved. The MSR written is returned. Extra left bits in Value are
+ stripped. The caller must either guarantee that Index and the data written is
+ valid, or the caller must set up exception handlers to catch the exceptions.
+ This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldWrite64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
+ writes the result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. Extra left bits in OrData are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned.
+ Extra left bits in AndData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAnd64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)
+ );
+}
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
+ a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ value written to the MSR is returned. Extra left bits in both AndData and
+ OrData are stripped. The caller must either guarantee that Index and the data
+ written is valid, or the caller must set up exception handlers to catch the
+ exceptions. This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAndThenOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ )
+{
+ return AsmWriteMsr64 (
+ Index,
+ BitFieldAndThenOr64 (
+ AsmReadMsr64 (Index),
+ StartBit,
+ EndBit,
+ AndData,
+ OrData
+ )
+ );
+}
diff --git a/OldMdePkg/Library/BaseLib/x86ReadGdtr.c b/OldMdePkg/Library/BaseLib/x86ReadGdtr.c new file mode 100644 index 0000000000..20d41c0217 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86ReadGdtr.c @@ -0,0 +1,38 @@ +/** @file
+ IA-32/x64 AsmReadGdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86ReadGdtr.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86ReadGdtr (Gdtr);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86ReadIdtr.c b/OldMdePkg/Library/BaseLib/x86ReadIdtr.c new file mode 100644 index 0000000000..f902b0c11b --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86ReadIdtr.c @@ -0,0 +1,38 @@ +/** @file
+ IA-32/x64 AsmReadIdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86ReadIdtr.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86ReadIdtr (Idtr);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86Thunk.c b/OldMdePkg/Library/BaseLib/x86Thunk.c new file mode 100644 index 0000000000..c74962afc7 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86Thunk.c @@ -0,0 +1,243 @@ +/** @file
+ Real Mode Thunk Functions for IA32 and X64.
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86Thunk.c
+
+**/
+
+//
+// Byte packed structure for a segment descriptor in a GDT/LDT
+//
+typedef union {
+ struct {
+ UINT32 LimitLow:16;
+ UINT32 BaseLow:16;
+ UINT32 BaseMid:8;
+ UINT32 Type:4;
+ UINT32 S:1;
+ UINT32 DPL:2;
+ UINT32 P:1;
+ UINT32 LimitHigh:4;
+ UINT32 AVL:1;
+ UINT32 L:1;
+ UINT32 DB:1;
+ UINT32 G:1;
+ UINT32 BaseHigh:8;
+ } Bits;
+ UINT64 Uint64;
+} IA32_SEGMENT_DESCRIPTOR;
+
+extern CONST UINT8 m16Start;
+extern CONST UINT16 m16Size;
+extern CONST UINT16 mThunk16Attr;
+extern CONST UINT16 m16Gdt;
+extern CONST UINT16 m16GdtrBase;
+extern CONST UINT16 mTransition;
+
+/**
+ Invokes 16-bit code in big real mode and returns the updated register set.
+
+ This function transfers control to the 16-bit code specified by CS:EIP using
+ the stack specified by SS:ESP in RegisterSet. The updated registers are saved
+ on the real mode stack and the starting address of the save area is returned.
+
+ @param RegisterSet Values of registers before invocation of 16-bit code.
+ @param Transition Pointer to the transition code under 1MB.
+
+ @return The pointer to a IA32_REGISTER_SET structure containing the updated
+ register values.
+
+**/
+IA32_REGISTER_SET *
+EFIAPI
+InternalAsmThunk16 (
+ IN IA32_REGISTER_SET *RegisterSet,
+ IN OUT VOID *Transition
+ );
+
+/**
+ Retrieves the properties for 16-bit thunk functions.
+
+ Computes the size of the buffer and stack below 1MB required to use the
+ AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
+ buffer size is returned in RealModeBufferSize, and the stack size is returned
+ in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
+ then the actual minimum stack size is ExtraStackSize plus the maximum number
+ of bytes that need to be passed to the 16-bit real mode code.
+
+ If RealModeBufferSize is NULL, then ASSERT().
+ If ExtraStackSize is NULL, then ASSERT().
+
+ @param RealModeBufferSize A pointer to the size of the buffer below 1MB
+ required to use the 16-bit thunk functions.
+ @param ExtraStackSize A pointer to the extra size of stack below 1MB
+ that the 16-bit thunk functions require for
+ temporary storage in the transition to and from
+ 16-bit real mode.
+
+**/
+VOID
+EFIAPI
+AsmGetThunk16Properties (
+ OUT UINT32 *RealModeBufferSize,
+ OUT UINT32 *ExtraStackSize
+ )
+{
+ ASSERT (RealModeBufferSize != NULL);
+ ASSERT (ExtraStackSize != NULL);
+
+ *RealModeBufferSize = m16Size;
+
+ //
+ // Extra 4 bytes for return address, and another 4 bytes for mode transition
+ //
+ *ExtraStackSize = sizeof (IA32_DWORD_REGS) + 8;
+}
+
+/**
+ Prepares all structures a code required to use AsmThunk16().
+
+ Prepares all structures and code required to use AsmThunk16().
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareThunk16 (
+ OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ IA32_SEGMENT_DESCRIPTOR *RealModeGdt;
+
+ ASSERT (ThunkContext != NULL);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);
+ ASSERT (ThunkContext->RealModeBufferSize >= m16Size);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);
+
+ CopyMem (ThunkContext->RealModeBuffer, &m16Start, m16Size);
+
+ //
+ // Point RealModeGdt to the GDT to be used in transition
+ //
+ // RealModeGdt[0]: Reserved as NULL descriptor
+ // RealModeGdt[1]: Code Segment
+ // RealModeGdt[2]: Data Segment
+ // RealModeGdt[3]: Call Gate
+ //
+ RealModeGdt = (IA32_SEGMENT_DESCRIPTOR*)(
+ (UINTN)ThunkContext->RealModeBuffer + m16Gdt);
+
+ //
+ // Update Code & Data Segment Descriptor
+ //
+ RealModeGdt[1].Bits.BaseLow =
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer & ~0xf;
+ RealModeGdt[1].Bits.BaseMid =
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer >> 16;
+
+ //
+ // Update transition code entry point offset
+ //
+ *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mTransition) +=
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer & 0xf;
+
+ //
+ // Update Segment Limits for both Code and Data Segment Descriptors
+ //
+ if ((ThunkContext->ThunkAttributes & THUNK_ATTRIBUTE_BIG_REAL_MODE) == 0) {
+ //
+ // Set segment limits to 64KB
+ //
+ RealModeGdt[1].Bits.LimitHigh = 0;
+ RealModeGdt[1].Bits.G = 0;
+ RealModeGdt[2].Bits.LimitHigh = 0;
+ RealModeGdt[2].Bits.G = 0;
+ }
+
+ //
+ // Update GDTBASE for this thunk context
+ //
+ *(VOID**)((UINTN)ThunkContext->RealModeBuffer + m16GdtrBase) = RealModeGdt;
+
+ //
+ // Update Thunk Attributes
+ //
+ *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mThunk16Attr) =
+ ThunkContext->ThunkAttributes;
+}
+
+/**
+ Transfers control to a 16-bit real mode entry point and returns the results.
+
+ Transfers control to a 16-bit real mode entry point and returns the results.
+ AsmPrepareThunk16() must be called with ThunkContext before this function is
+ used. This function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+ If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ IA32_REGISTER_SET *UpdatedRegs;
+
+ ASSERT (ThunkContext != NULL);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);
+ ASSERT (ThunkContext->RealModeBufferSize >= m16Size);
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);
+
+ UpdatedRegs = InternalAsmThunk16 (
+ ThunkContext->RealModeState,
+ ThunkContext->RealModeBuffer
+ );
+
+ CopyMem (ThunkContext->RealModeState, UpdatedRegs, sizeof (*UpdatedRegs));
+}
+
+/**
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results.
+
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results. If the
+ caller only need to perform a single 16-bit real mode thunk, then this
+ service should be used. If the caller intends to make more than one 16-bit
+ real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
+ once and AsmThunk16() can be called for each 16-bit real mode thunk. This
+ function must be called with interrupts disabled.
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareAndThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ )
+{
+ AsmPrepareThunk16 (ThunkContext);
+ AsmThunk16 (ThunkContext);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86WriteGdtr.c b/OldMdePkg/Library/BaseLib/x86WriteGdtr.c new file mode 100644 index 0000000000..c3df563d57 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86WriteGdtr.c @@ -0,0 +1,38 @@ +/** @file
+ IA-32/x64 AsmWriteGdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86GetInterruptState.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ )
+{
+ ASSERT (Gdtr != NULL);
+ InternalX86WriteGdtr (Gdtr);
+}
diff --git a/OldMdePkg/Library/BaseLib/x86WriteIdtr.c b/OldMdePkg/Library/BaseLib/x86WriteIdtr.c new file mode 100644 index 0000000000..cfe6758584 --- /dev/null +++ b/OldMdePkg/Library/BaseLib/x86WriteIdtr.c @@ -0,0 +1,38 @@ +/** @file
+ IA-32/x64 AsmWriteIdtr()
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: x86WriteIdtr.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ )
+{
+ ASSERT (Idtr != NULL);
+ InternalX86WriteIdtr (Idtr);
+}
|