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authorjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2011-11-10 22:04:19 +0000
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2011-11-10 22:04:19 +0000
commit8016da21b56d5ab1da855037cd0f0e034e2404bf (patch)
treeca1007851ca05a7f3fbd6936f6f10edffd6f2e3b /OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h
parent09bb585cb2a9d182e4f15cdd0ab020b3b82ead8a (diff)
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OvmfPkg: Add CsmSupportLib
This library installs the legacy interrupt, region and platform support required for CSM support drivers. Signed-off-by: jljusten Reviewed-by: geekboy15a git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12681 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h')
-rw-r--r--OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h119
1 files changed, 119 insertions, 0 deletions
diff --git a/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h b/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h
new file mode 100644
index 0000000000..193e48bad2
--- /dev/null
+++ b/OvmfPkg/Csm/CsmSupportLib/LegacyInterrupt.h
@@ -0,0 +1,119 @@
+/** @file
+ Legacy Region Support
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are
+ licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _LEGACY_INTERRUPT_H_
+#define _LEGACY_INTERRUPT_H_
+
+#include <PiDxe.h>
+
+#include <Protocol/LegacyInterrupt.h>
+
+#include <Library/PciLib.h>
+#include <Library/DebugLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+
+#define LEGACY_INT_BUS 0
+#define LEGACY_INT_DEV 1
+#define LEGACY_INT_FUNC 0
+
+#define PIRQN 0x00 // PIRQ Null
+#define PIRQA 0x60
+#define PIRQB 0x61
+#define PIRQC 0x62
+#define PIRQD 0x63
+#define PIRQE 0x68
+#define PIRQF 0x69
+#define PIRQG 0x6A
+#define PIRQH 0x6B
+
+#define MAX_PIRQ_NUMBER 8
+
+/**
+ Return the number of PIRQs supported by this chipset.
+
+ @param[in] This Pointer to LegacyInterrupt Protocol
+ @param[out] NumberPirqs The pointer to return the max IRQ number supported
+
+ @retval EFI_SUCCESS Max PIRQs successfully returned
+
+**/
+EFI_STATUS
+EFIAPI
+GetNumberPirqs (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *NumberPirqs
+ );
+
+/**
+ Return PCI location of this device.
+ $PIR table requires this info.
+
+ @param[in] This - Protocol instance pointer.
+ @param[out] Bus - PCI Bus
+ @param[out] Device - PCI Device
+ @param[out] Function - PCI Function
+
+ @retval EFI_SUCCESS Bus/Device/Function returned
+
+**/
+EFI_STATUS
+EFIAPI
+GetLocation (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *Bus,
+ OUT UINT8 *Device,
+ OUT UINT8 *Function
+ );
+
+/**
+ Read the given PIRQ register
+
+ @param[in] This Protocol instance pointer
+ @param[in] PirqNumber The Pirq register 0 = A, 1 = B etc
+ @param[out] PirqData Value read
+
+ @retval EFI_SUCCESS Decoding change affected.
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number
+
+**/
+EFI_STATUS
+EFIAPI
+ReadPirq (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ OUT UINT8 *PirqData
+ );
+
+/**
+ Write the given PIRQ register
+
+ @param[in] This Protocol instance pointer
+ @param[in] PirqNumber The Pirq register 0 = A, 1 = B etc
+ @param[out] PirqData Value to write
+
+ @retval EFI_SUCCESS Decoding change affected.
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number
+
+**/
+EFI_STATUS
+EFIAPI
+WritePirq (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ IN UINT8 PirqData
+ );
+
+#endif
+