Add support for e1000 NICs to OVMF

1) Update README describing the QEMU version required for e1000, where to download the UEFI drivers for e1000, and how to enable network drivers in the platform firmware
2) Update DSC/FDF files NETWORK_ENABLE switch to enable e1000 and network driver support




git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10697 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 347 insertions, 0 deletions

diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf
new file mode 100644
index 0000000000..1fc7ffd744
--- /dev/null
+++ b/OvmfPkg/OvmfPkgX64.fdf
@@ -0,0 +1,347 @@
+## @file

+#  Open Virtual Machine Firmware: FDF

+#

+#  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+##

+

+################################################################################

+[FD.OVMF]

+BaseAddress   = 0xFFF00000

+Size          = 0x00100000

+ErasePolarity = 1

+BlockSize     = 0x1000

+NumBlocks     = 0x100

+

+0x00000000|0x000EE000

+FV = FVMAIN_COMPACT

+

+0x000EE000|0x12000

+FV = SECFV

+

+################################################################################

+

+[FD.MEMFD]

+BaseAddress   = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase

+Size          = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize

+ErasePolarity = 1

+BlockSize     = 0x10000

+NumBlocks     = 0x40

+

+0x0|0x400000

+FV = MAINFV

+

+################################################################################

+

+[FV.SECFV]

+BlockSize          = 0x1000

+FvAlignment        = 16

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+#

+# SEC Phase modules

+#

+# The code in this FV handles the initial firmware startup, and

+# decompresses the MAINFV which handles the majority of the boot sequence.

+#

+INF  OvmfPkg/Sec/SecMain.inf

+

+INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf

+

+################################################################################

+[FV.MAINFV]

+BlockSize          = 0x10000

+FvAlignment        = 16

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+#

+# Files to be placed in MAIN FV

+#

+# This firmware volume will have files placed in it uncompressed,

+# and then then entire firmware volume will be compressed in a

+# single compression operation in order to achieve better

+# overall compression.

+#

+

+APRIORI PEI {

+  INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+}

+

+#

+#  PEI Phase modules

+#

+INF  MdeModulePkg/Core/Pei/PeiMain.inf

+INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf

+INF  OvmfPkg/PlatformPei/PlatformPei.inf

+INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf

+

+FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {

+  SECTION FV_IMAGE = DXEFV

+}

+

+################################################################################

+

+[FV.DXEFV]

+BlockSize          = 0x10000

+FvAlignment        = 16

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+APRIORI DXE {

+  INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

+}

+

+#

+# DXE Phase modules

+#

+INF  MdeModulePkg/Core/Dxe/DxeMain.inf

+

+INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf

+INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

+

+INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

+INF  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf

+INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

+INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf

+INF  UefiCpuPkg/CpuDxe/CpuDxe.inf

+INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

+INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf

+INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

+INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf

+INF  MdeModulePkg/Universal/Metronome/Metronome.inf

+INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf

+

+INF  OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf

+INF  OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf

+INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf

+INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf

+INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

+INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf

+INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

+INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf

+INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

+INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf

+INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf

+INF  MdeModulePkg/Universal/PrintDxe/PrintDxe.inf

+INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf

+INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

+INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf

+INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf

+INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf

+INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf

+INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

+INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf

+

+INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf

+

+INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf

+INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf

+

+INF  RuleOverride = BINARY FatBinPkg/EnhancedFatDxe/Fat.inf

+INF  RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf

+

+FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {

+  SECTION RAW = MdeModulePkg/Logo/Logo.bmp

+}

+

+#

+# Network modules

+#

+!if $(NETWORK_ENABLE)

+  FILE DRIVER = A5C9C8B3-5ABB-4be2-8CA6-2FF06F405D04 {

+    SECTION PE32 = Intel3.5/EFIX64/E3507X2.EFI

+  }

+  INF  MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf

+  INF  MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf

+  INF  MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf

+  INF  MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf

+  INF  MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf

+  INF  MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf

+  INF  MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf

+  INF  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf

+  INF  MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf

+  INF  MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf

+  INF  MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf

+  INF  MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf

+  INF  MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf

+!endif

+

+################################################################################

+

+[FV.FVMAIN_COMPACT]

+FvAlignment        = 16

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {

+   SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {

+     SECTION FV_IMAGE = MAINFV

+   }

+ }

+

+################################################################################

+

+[Rule.Common.SEC]

+  FILE SEC = $(NAMED_GUID) {

+    PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING ="$(MODULE_NAME)" Optional

+    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.PEI_CORE]

+  FILE PEI_CORE = $(NAMED_GUID) {

+    PE32     PE32   Align=32    $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING ="$(MODULE_NAME)" Optional

+    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.PEIM]

+  FILE PEIM = $(NAMED_GUID) {

+     PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex

+     PE32      PE32   Align=32           $(INF_OUTPUT)/$(MODULE_NAME).efi

+     UI       STRING="$(MODULE_NAME)" Optional

+     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_CORE]

+  FILE DXE_CORE = $(NAMED_GUID) {

+    PE32     PE32           $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex

+    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_RUNTIME_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex

+    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      $(INF_OUTPUT)/$(MODULE_NAME).depex

+    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_DRIVER.BINARY]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX DXE_DEPEX Optional      |.depex

+    PE32      PE32                    |.efi

+    UI        STRING="$(MODULE_NAME)" Optional

+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+  

+[Rule.Common.UEFI_APPLICATION]

+  FILE APPLICATION = $(NAMED_GUID) {

+    PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_APPLICATION.BINARY]

+  FILE APPLICATION = $(NAMED_GUID) {

+    PE32      PE32                    |.efi

+    UI        STRING="$(MODULE_NAME)" Optional

+    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+  

+[Rule.Common.USER_DEFINED.ACPITABLE]

+  FILE FREEFORM = $(NAMED_GUID) {

+    RAW ACPI               |.acpi

+    RAW ASL                |.aml

+  }

+

+[Rule.Common.SEC.RESET_VECTOR]

+  FILE RAW = $(NAMED_GUID) {

+    RAW RAW                |.raw

+  }

+

+[OptionRom.CirrusLogic5446]

+INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {

+    PCI_DEVICE_ID  = 0x00B8

+  }