diff options
| author | Laszlo Ersek <lersek@redhat.com> | 2016-05-09 22:39:44 +0200 |
|---|---|---|
| committer | Laszlo Ersek <lersek@redhat.com> | 2016-05-17 20:48:41 +0200 |
| commit | c4df7fd01ff46cce6baa0afcc0f32f60bd2b5ace (patch) | |
| tree | 4e67c5add83d855fd39f1a7b29dbfc22faab0fba /OvmfPkg/PlatformPei/Platform.c | |
| parent | 1466b76f938501269d1c95f068b6d4938acec22d (diff) | |
| download | edk2-c4df7fd01ff46cce6baa0afcc0f32f60bd2b5ace.tar.gz edk2-c4df7fd01ff46cce6baa0afcc0f32f60bd2b5ace.tar.bz2 edk2-c4df7fd01ff46cce6baa0afcc0f32f60bd2b5ace.zip | |
OvmfPkg/PlatformPei: set PCI IO port aperture dynamically
Make PcdPciIoBase and PcdPciIoSize dynamic PCDs, and set them in
MemMapInitialization(), where we produce our EFI_RESOURCE_IO descriptor
HOB. (The PCD is consumed by the core PciHostBridgeDxe driver, through our
PciHostBridgeLib instance.)
Take special care to keep the GCD IO space map unchanged on all platforms
OVMF runs on.
Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Diffstat (limited to 'OvmfPkg/PlatformPei/Platform.c')
| -rw-r--r-- | OvmfPkg/PlatformPei/Platform.c | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index a5654a5118..b03b577013 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -156,6 +156,12 @@ MemMapInitialization ( VOID
)
{
+ UINT64 PciIoBase;
+ UINT64 PciIoSize;
+
+ PciIoBase = 0xC000;
+ PciIoSize = 0x4000;
+
//
// Create Memory Type Information HOB
//
@@ -166,17 +172,6 @@ MemMapInitialization ( );
//
- // Add PCI IO Port space available for PCI resource allocations.
- //
- BuildResourceDescriptorHob (
- EFI_RESOURCE_IO,
- EFI_RESOURCE_ATTRIBUTE_PRESENT |
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
- PcdGet64 (PcdPciIoBase),
- PcdGet64 (PcdPciIoSize)
- );
-
- //
// Video memory + Legacy BIOS region
//
AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
@@ -250,6 +245,19 @@ MemMapInitialization ( }
AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);
}
+
+ //
+ // Add PCI IO Port space available for PCI resource allocations.
+ //
+ BuildResourceDescriptorHob (
+ EFI_RESOURCE_IO,
+ EFI_RESOURCE_ATTRIBUTE_PRESENT |
+ EFI_RESOURCE_ATTRIBUTE_INITIALIZED,
+ PciIoBase,
+ PciIoSize
+ );
+ PcdSet64 (PcdPciIoBase, PciIoBase);
+ PcdSet64 (PcdPciIoSize, PciIoSize);
}
EFI_STATUS
|