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author | Min Xu <min.m.xu@intel.com> | 2022-03-07 21:54:30 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-04-02 08:15:12 +0000 |
commit | e51032624574bb5c79ce27005415ee2369533f53 (patch) | |
tree | 5422d3f7dde8fa0a10e2326385ec01d4813658f5 /OvmfPkg/PlatformPei/Platform.c | |
parent | f3801cf26c255828ee405177652ed6e9cc588d88 (diff) | |
download | edk2-e51032624574bb5c79ce27005415ee2369533f53.tar.gz edk2-e51032624574bb5c79ce27005415ee2369533f53.tar.bz2 edk2-e51032624574bb5c79ce27005415ee2369533f53.zip |
OvmfPkg/PlatformPei: Refactor InitializeRamRegions
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863
InitializeRamRegions is refactored into 3 calls:
- PlatformQemuInitializeRam
- SevInitializeRam
- PlatformQemuInitializeRamForS3
SevInitializeRam is not in PlatformInitLib. Because in the first stage
PlatformInitLib only support the basic platform featues.
PlatformQemuInitializeRamForS3 wraps the code which was previously in
InitializeRamRegions (many code in 2 if-checks).
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sebastien Boeuf <sebastien.boeuf@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Diffstat (limited to 'OvmfPkg/PlatformPei/Platform.c')
-rw-r--r-- | OvmfPkg/PlatformPei/Platform.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 1275c9187e..f89d14493e 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -79,7 +79,7 @@ MemMapInitialization ( return;
}
- TopOfLowRam = GetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ TopOfLowRam = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
PciExBarBase = 0;
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
|