OvmfPkg/PlatformPei: Refactor MiscInitialization

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863

In MiscInitialization Microvm looks a little weird. Other platforms
call PcdSet16S to set the PcdOvmfHostBridgePciDevId with the value same
as PlatformInfoHob->HostBridgeDevId. But Microvm doesn't follow this
way. In switch-case 0xffff is Microvm, but set with
MICROVM_PSEUDO_DEVICE_ID. So we have to add a new function
( MiscInitializationForMicrovm ) for Microvm and delete the code in
MiscInitialization.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sebastien Boeuf <sebastien.boeuf@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>

1 files changed, 36 insertions, 10 deletions

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index 80eb4cc9ad..af9e72cd7a 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -305,6 +305,36 @@ MicrovmInitialization (
 }

 

 VOID

+MiscInitializationForMicrovm (

+  IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob

+  )

+{

+  RETURN_STATUS  PcdStatus;

+

+  ASSERT (PlatformInfoHob->HostBridgeDevId == 0xffff);

+

+  DEBUG ((DEBUG_INFO, "%a: microvm\n", __FUNCTION__));

+  //

+  // Disable A20 Mask

+  //

+  IoOr8 (0x92, BIT1);

+

+  //

+  // Build the CPU HOB with guest RAM size dependent address width and 16-bits

+  // of IO space. (Side note: unlike other HOBs, the CPU HOB is needed during

+  // S3 resume as well, so we build it unconditionally.)

+  //

+  BuildCpuHob (PlatformInfoHob->PhysMemAddressWidth, 16);

+

+  MicrovmInitialization ();

+  PcdStatus = PcdSet16S (

+                PcdOvmfHostBridgePciDevId,

+                MICROVM_PSEUDO_DEVICE_ID

+                );

+  ASSERT_RETURN_ERROR (PcdStatus);

+}

+

+VOID

 MiscInitialization (

   IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob

   )

@@ -349,15 +379,6 @@ MiscInitialization (
       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);

       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;

       break;

-    case 0xffff: /* microvm */

-      DEBUG ((DEBUG_INFO, "%a: microvm\n", __FUNCTION__));

-      MicrovmInitialization ();

-      PcdStatus = PcdSet16S (

-                    PcdOvmfHostBridgePciDevId,

-                    MICROVM_PSEUDO_DEVICE_ID

-                    );

-      ASSERT_RETURN_ERROR (PcdStatus);

-      return;

     case CLOUDHV_DEVICE_ID:

       DEBUG ((DEBUG_INFO, "%a: Cloud Hypervisor host bridge\n", __FUNCTION__));

       PcdStatus = PcdSet16S (

@@ -762,7 +783,12 @@ InitializePlatform (
 

   InstallClearCacheCallback ();

   AmdSevInitialize ();

-  MiscInitialization (&mPlatformInfoHob);

+  if (mPlatformInfoHob.HostBridgeDevId == 0xffff) {

+    MiscInitializationForMicrovm (&mPlatformInfoHob);

+  } else {

+    MiscInitialization (&mPlatformInfoHob);

+  }

+

   InstallFeatureControlCallback ();

 

   return EFI_SUCCESS;