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author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-12-16 23:29:15 +0000 |
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committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-12-16 23:29:15 +0000 |
commit | 7a55c43b072ec2192d35df5e44cf37eb8be06555 (patch) | |
tree | 0ffb3051583b198fa8b07a670a0fed8906221dad /OvmfPkg/ResetVector/DebugDisabled.asm | |
parent | 8861fc792ce90cb7ab18a91bd3d6596d77ee0170 (diff) | |
download | edk2-7a55c43b072ec2192d35df5e44cf37eb8be06555.tar.gz edk2-7a55c43b072ec2192d35df5e44cf37eb8be06555.tar.bz2 edk2-7a55c43b072ec2192d35df5e44cf37eb8be06555.zip |
OVMF ResetVector: Modify interface with SEC module
Previously it was:
ESI/RSI - SEC Core entry point
EDI/RDI - PEI Core entry point
EBP/RBP - Start of BFV
Now it is:
RAX/EAX Initial value of the EAX register
(BIST: Built-in Self Test)
DI 'BP': boot-strap processor, or
'AP': application processor
RBP/EBP Address of Boot Firmware Volume (BFV)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9571 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/ResetVector/DebugDisabled.asm')
-rw-r--r-- | OvmfPkg/ResetVector/DebugDisabled.asm | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/OvmfPkg/ResetVector/DebugDisabled.asm b/OvmfPkg/ResetVector/DebugDisabled.asm new file mode 100644 index 0000000000..78389f4e45 --- /dev/null +++ b/OvmfPkg/ResetVector/DebugDisabled.asm @@ -0,0 +1,26 @@ +;------------------------------------------------------------------------------
+; @file
+; Debug disabled
+;
+; Copyright (c) 2009, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+BITS 16
+
+%macro debugInitialize 0
+ ;
+ ; No initialization is required
+ ;
+%endmacro
+
+%macro debugShowPostCode 1
+%endmacro
+
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