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| author | Jordan Justen <jordan.l.justen@intel.com> | 2013-09-24 18:23:20 +0000 |
|---|---|---|
| committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-09-24 18:23:20 +0000 |
| commit | c90e37b503d4e79dbebbd49f9bfc3c6c14ffb67d (patch) | |
| tree | 10d35aaf20f624bd410bef20f3869ed6bfd8a70a /OvmfPkg/ResetVector/Ia32 | |
| parent | a63f2e245099ac9ab17046322ab6e13f84bb053c (diff) | |
| download | edk2-c90e37b503d4e79dbebbd49f9bfc3c6c14ffb67d.tar.gz edk2-c90e37b503d4e79dbebbd49f9bfc3c6c14ffb67d.tar.bz2 edk2-c90e37b503d4e79dbebbd49f9bfc3c6c14ffb67d.zip | |
OvmfPkg: Add platform specific reset vector code for X64
KVM has a bug that prevents using page tables in the ROM if the ROM
region utilizes the KVM READONLY memory feature. Therefore, we
avoid using page tables stored in the ROM.
Since OVMF doesn't require memory initialization, we just build
page table entries in RAM at 0x80000 very early in the OVMF boot
process. This address is just after the 'temp RAM' which is set
up by the SEC module.
Currently we only set up 4GB of page tables for OVMF's PEI,
but DxeIpl will build identity mapped page tables that cover all
of the available processor physical address space.
Reported-by: Gary Ching-Pang Lin <glin@suse.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14715 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/ResetVector/Ia32')
| -rw-r--r-- | OvmfPkg/ResetVector/Ia32/PageTables64.asm | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm new file mode 100644 index 0000000000..5ebf211fbc --- /dev/null +++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm @@ -0,0 +1,93 @@ +;------------------------------------------------------------------------------
+; @file
+; Sets the CR3 register for 64-bit paging
+;
+; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+BITS 32
+
+%define PAGE_PRESENT 0x01
+%define PAGE_READ_WRITE 0x02
+%define PAGE_USER_SUPERVISOR 0x04
+%define PAGE_WRITE_THROUGH 0x08
+%define PAGE_CACHE_DISABLE 0x010
+%define PAGE_ACCESSED 0x020
+%define PAGE_DIRTY 0x040
+%define PAGE_PAT 0x080
+%define PAGE_GLOBAL 0x0100
+%define PAGE_2M_MBO 0x080
+%define PAGE_2M_PAT 0x01000
+
+%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \
+ PAGE_CACHE_DISABLE + \
+ PAGE_ACCESSED + \
+ PAGE_DIRTY + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+%define PAGE_PDP_ATTR (PAGE_CACHE_DISABLE + \
+ PAGE_ACCESSED + \
+ PAGE_READ_WRITE + \
+ PAGE_PRESENT)
+
+
+;
+; Modified: EAX, ECX
+;
+SetCr3ForPageTables64:
+
+ ;
+ ; For OVMF, build some initial page tables at 0x80000. This is just
+ ; after the early stack/temp RAM.
+ ;
+ ; At the end of PEI, the pages tables will be rebuilt into a
+ ; more permanent location by DxeIpl.
+ ;
+
+ mov ecx, 6 * 0x1000 / 4
+ xor eax, eax
+clearPageTablesMemoryLoop:
+ mov dword[ecx * 4 + 0x80000 - 4], eax
+ loop clearPageTablesMemoryLoop
+
+ ;
+ ; Top level Page Directory Pointers (1 * 512GB entry)
+ ;
+ mov dword[0x80000], 0x81000 + PAGE_PDP_ATTR
+
+ ;
+ ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)
+ ;
+ mov dword[0x81000], 0x82000 + PAGE_PDP_ATTR
+ mov dword[0x81008], 0x83000 + PAGE_PDP_ATTR
+ mov dword[0x81010], 0x84000 + PAGE_PDP_ATTR
+ mov dword[0x81018], 0x85000 + PAGE_PDP_ATTR
+
+ ;
+ ; Page Table Entries (2048 * 2MB entries => 4GB)
+ ;
+ mov ecx, 0x800
+pageTableEntriesLoop:
+ mov eax, ecx
+ dec eax
+ shl eax, 21
+ add eax, PAGE_2M_PDE_ATTR
+ mov [ecx * 8 + 0x82000 - 8], eax
+ loop pageTableEntriesLoop
+
+ ;
+ ; Set CR3 now that the paging structures are available
+ ;
+ mov eax, 0x80000
+ mov cr3, eax
+
+ OneTimeCallRet SetCr3ForPageTables64
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