OvmfPkg: Create a GHCB page for use during Sec phase

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198

A GHCB page is needed during the Sec phase, so this new page must be
created. Since the #VC exception handler routines assume that a per-CPU
variable area is immediately after the GHCB, this per-CPU variable area
must also be created. Since the GHCB must be marked as an un-encrypted,
or shared, page, an additional pagetable page is required to break down
the 2MB region where the GHCB page lives into 4K pagetable entries.

Create a new entry in the OVMF memory layout for the new page table
page and for the SEC GHCB and per-CPU variable pages. After breaking down
the 2MB page, update the GHCB page table entry to remove the encryption
mask.

The GHCB page will be used by the SEC #VC exception handler. The #VC
exception handler will fill in the necessary fields of the GHCB and exit
to the hypervisor using the VMGEXIT instruction. The hypervisor then
accesses the GHCB in order to perform the requested function.

Four new fixed PCDs are needed to support the SEC GHCB page:
  - PcdOvmfSecGhcbBase  UINT32 value that is the base address of the
                        GHCB used during the SEC phase.
  - PcdOvmfSecGhcbSize  UINT32 value that is the size, in bytes, of the
                        GHCB area used during the SEC phase.

  - PcdOvmfSecGhcbPageTableBase  UINT32 value that is address of a page
                        table page used to break down the 2MB page into
                        512 4K pages.
  - PcdOvmfSecGhcbPageTableSize  UINT32 value that is the size, in bytes,
                        of the page table page.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

3 files changed, 98 insertions, 0 deletions

diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
index abad009f20..9f86ddf6f0 100644
--- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm
+++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm
@@ -21,6 +21,11 @@ BITS    32
 %define PAGE_2M_MBO            0x080

 %define PAGE_2M_PAT          0x01000

 

+%define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \

+                          PAGE_DIRTY + \

+                          PAGE_READ_WRITE + \

+                          PAGE_PRESENT)

+

 %define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \

                           PAGE_ACCESSED + \

                           PAGE_DIRTY + \

@@ -75,6 +80,37 @@ NoSev:
 SevExit:

     OneTimeCallRet CheckSevFeature

 

+; Check if Secure Encrypted Virtualization - Encrypted State (SEV-ES) feature

+; is enabled.

+;

+; Modified:  EAX, EBX, ECX

+;

+; If SEV-ES is enabled then EAX will be non-zero.

+; If SEV-ES is disabled then EAX will be zero.

+;

+CheckSevEsFeature:

+    xor       eax, eax

+

+    ; SEV-ES can't be enabled if SEV isn't, so first check the encryption

+    ; mask.

+    test      edx, edx

+    jz        NoSevEs

+

+    ; Save current value of encryption mask

+    mov       ebx, edx

+

+    ; Check if SEV-ES is enabled

+    ;  MSR_0xC0010131 - Bit 1 (SEV-ES enabled)

+    mov       ecx, 0xc0010131

+    rdmsr

+    and       eax, 2

+

+    ; Restore encryption mask

+    mov       edx, ebx

+

+NoSevEs:

+    OneTimeCallRet CheckSevEsFeature

+

 ;

 ; Modified:  EAX, EBX, ECX, EDX

 ;

@@ -139,6 +175,46 @@ pageTableEntriesLoop:
     mov     [(ecx * 8 + PT_ADDR (0x2000 - 8)) + 4], edx

     loop    pageTableEntriesLoop

 

+    OneTimeCall   CheckSevEsFeature

+    test    eax, eax

+    jz      SetCr3

+

+    ;

+    ; The initial GHCB will live at GHCB_BASE and needs to be un-encrypted.

+    ; This requires the 2MB page for this range be broken down into 512 4KB

+    ; pages.  All will be marked encrypted, except for the GHCB.

+    ;

+    mov     ecx, (GHCB_BASE >> 21)

+    mov     eax, GHCB_PT_ADDR + PAGE_PDP_ATTR

+    mov     [ecx * 8 + PT_ADDR (0x2000)], eax

+

+    ;

+    ; Page Table Entries (512 * 4KB entries => 2MB)

+    ;

+    mov     ecx, 512

+pageTableEntries4kLoop:

+    mov     eax, ecx

+    dec     eax

+    shl     eax, 12

+    add     eax, GHCB_BASE & 0xFFE0_0000

+    add     eax, PAGE_4K_PDE_ATTR

+    mov     [ecx * 8 + GHCB_PT_ADDR - 8], eax

+    mov     [(ecx * 8 + GHCB_PT_ADDR - 8) + 4], edx

+    loop    pageTableEntries4kLoop

+

+    ;

+    ; Clear the encryption bit from the GHCB entry

+    ;

+    mov     ecx, (GHCB_BASE & 0x1F_FFFF) >> 12

+    mov     [ecx * 8 + GHCB_PT_ADDR + 4], strict dword 0

+

+    mov     ecx, GHCB_SIZE / 4

+    xor     eax, eax

+clearGhcbMemoryLoop:

+    mov     dword[ecx * 4 + GHCB_BASE - 4], eax

+    loop    clearGhcbMemoryLoop

+

+SetCr3:

     ;

     ; Set CR3 now that the paging structures are available

     ;

diff --git a/OvmfPkg/ResetVector/ResetVector.inf b/OvmfPkg/ResetVector/ResetVector.inf
index b0ddfa5832..483fd90fe7 100644
--- a/OvmfPkg/ResetVector/ResetVector.inf
+++ b/OvmfPkg/ResetVector/ResetVector.inf
@@ -26,6 +26,7 @@
 [Packages]

   OvmfPkg/OvmfPkg.dec

   MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

   UefiCpuPkg/UefiCpuPkg.dec

 

 [BuildOptions]

@@ -33,5 +34,9 @@
    *_*_X64_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/

 

 [Pcd]

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize

   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase

   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize

diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb b/OvmfPkg/ResetVector/ResetVector.nasmb
index 75cfe16654..bfb77e4391 100644
--- a/OvmfPkg/ResetVector/ResetVector.nasmb
+++ b/OvmfPkg/ResetVector/ResetVector.nasmb
@@ -53,8 +53,25 @@
     %error "This implementation inherently depends on PcdOvmfSecPageTablesSize"

   %endif

 

+  %if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) != 0x1000)

+    %error "This implementation inherently depends on PcdOvmfSecGhcbPageTableSize"

+  %endif

+

+  %if (FixedPcdGet32 (PcdOvmfSecGhcbSize) != 0x2000)

+    %error "This implementation inherently depends on PcdOvmfSecGhcbSize"

+  %endif

+

+  %if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) != \

+       ((FixedPcdGet32 (PcdOvmfSecGhcbBase) + FixedPcdGet32 (PcdOvmfSecGhcbSize) - 1) >> 21))

+    %error "This implementation inherently depends on PcdOvmfSecGhcbBase not straddling a 2MB boundary"

+  %endif

+

   %define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))

 %include "Ia32/Flat32ToFlat64.asm"

+

+  %define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBase))

+  %define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase))

+  %define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize))

 %include "Ia32/PageTables64.asm"

 %endif