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author | Gerd Hoffmann <kraxel@redhat.com> | 2024-03-01 08:43:57 +0100 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-03-01 18:47:27 +0000 |
commit | e3bd782373d87872c359939462a66d9bc2f2a252 (patch) | |
tree | 3742dfa150870686d86132022b69113b85ef059b /OvmfPkg/ResetVector | |
parent | b7a97bfac52819d37310106e467623b0ed4a8f87 (diff) | |
download | edk2-e3bd782373d87872c359939462a66d9bc2f2a252.tar.gz edk2-e3bd782373d87872c359939462a66d9bc2f2a252.tar.bz2 edk2-e3bd782373d87872c359939462a66d9bc2f2a252.zip |
OvmfPkg/ResetVector: split SEV and non-CoCo workflows
Use separate control flows for SEV and non-CoCo cases.
SevClearPageEncMaskForGhcbPage and GetSevCBitMaskAbove31 will now only
be called when running in SEV mode, so the SEV check in these functions
is not needed any more.
No functional change.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20240301074402.98625-6-kraxel@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Oliver Steffen <osteffen@redhat.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
[lersek@redhat.com: turn the "Cc:" message headers from Gerd's on-list
posting into "Cc:" tags in the commit message, in order to pacify
"PatchCheck.py"]
Diffstat (limited to 'OvmfPkg/ResetVector')
-rw-r--r-- | OvmfPkg/ResetVector/Ia32/AmdSev.asm | 14 | ||||
-rw-r--r-- | OvmfPkg/ResetVector/Ia32/PageTables64.asm | 17 |
2 files changed, 15 insertions, 16 deletions
diff --git a/OvmfPkg/ResetVector/Ia32/AmdSev.asm b/OvmfPkg/ResetVector/Ia32/AmdSev.asm index 043c88a7ab..23e4c5ebbe 100644 --- a/OvmfPkg/ResetVector/Ia32/AmdSev.asm +++ b/OvmfPkg/ResetVector/Ia32/AmdSev.asm @@ -154,10 +154,6 @@ SevEsUnexpectedRespTerminate: ; If SEV-ES is enabled then initialize and make the GHCB page shared
SevClearPageEncMaskForGhcbPage:
- ; Check if SEV is enabled
- cmp byte[WORK_AREA_GUEST_TYPE], 1
- jnz SevClearPageEncMaskForGhcbPageExit
-
; Check if SEV-ES is enabled
mov ecx, 1
bt [SEV_ES_WORK_AREA_STATUS_MSR], ecx
@@ -195,20 +191,12 @@ pageTableEntries4kLoop: SevClearPageEncMaskForGhcbPageExit:
OneTimeCallRet SevClearPageEncMaskForGhcbPage
-; Check if SEV is enabled, and get the C-bit mask above 31.
+; Get the C-bit mask above 31.
; Modified: EDX
;
; The value is returned in the EDX
GetSevCBitMaskAbove31:
- xor edx, edx
-
- ; Check if SEV is enabled
- cmp byte[WORK_AREA_GUEST_TYPE], 1
- jnz GetSevCBitMaskAbove31Exit
-
mov edx, dword[SEV_ES_WORK_AREA_ENC_MASK + 4]
-
-GetSevCBitMaskAbove31Exit:
OneTimeCallRet GetSevCBitMaskAbove31
%endif
diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm b/OvmfPkg/ResetVector/Ia32/PageTables64.asm index 166e80293c..84a7b4efc0 100644 --- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm +++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm @@ -118,15 +118,26 @@ SetCr3ForPageTables64: ; Check whether the SEV is active and populate the SevEsWorkArea
OneTimeCall CheckSevFeatures
+ cmp byte[WORK_AREA_GUEST_TYPE], 1
+ jz SevInit
+ ;
+ ; normal (non-CoCo) workflow
+ ;
+ ClearOvmfPageTables
+ CreatePageTables4Level 0
+ jmp SetCr3
+
+SevInit:
+ ;
+ ; SEV workflow
+ ;
+ ClearOvmfPageTables
; If SEV is enabled, the C-bit position is always above 31.
; The mask will be saved in the EDX and applied during the
; the page table build below.
OneTimeCall GetSevCBitMaskAbove31
-
- ClearOvmfPageTables
CreatePageTables4Level edx
-
; Clear the C-bit from the GHCB page if the SEV-ES is enabled.
OneTimeCall SevClearPageEncMaskForGhcbPage
jmp SetCr3
|