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| author | Laszlo Ersek <lersek@redhat.com> | 2017-07-04 14:27:19 +0200 |
|---|---|---|
| committer | Laszlo Ersek <lersek@redhat.com> | 2017-07-05 22:29:23 +0200 |
| commit | 6812bb7bb5a66f6877bed67fa61ed67679611f67 (patch) | |
| tree | cba165d9ad2299e330b54bef6a1fa56adffc83dc /OvmfPkg/SmmAccess | |
| parent | 031e4ce262873a59a7df6dc7869540a947795f3b (diff) | |
| download | edk2-6812bb7bb5a66f6877bed67fa61ed67679611f67.tar.gz edk2-6812bb7bb5a66f6877bed67fa61ed67679611f67.tar.bz2 edk2-6812bb7bb5a66f6877bed67fa61ed67679611f67.zip | |
OvmfPkg/SmmAccess: support extended TSEG size
In SmmAccessPeiEntryPoint(), map TSEG megabyte counts different from 1, 2
and 8 to the MCH_ESMRAMC_TSEG_EXT bit pattern (introduced in the previous
patch), for the ESMRAMC.TSEG_SZ bit-field register. (Suggested by Jordan.)
In SmramAccessGetCapabilities() -- backing both
PEI_SMM_ACCESS_PPI.GetCapabilities() and
EFI_SMM_ACCESS2_PROTOCOL.GetCapabilities() --, map the
MCH_ESMRAMC_TSEG_EXT bit pattern found in the ESMRAMC.TSEG_SZ bit-field
register to a byte count of (mQ35TsegMbytes * SIZE_1MB).
(MCH_ESMRAMC_TSEG_EXT is the only possible pattern if none of
MCH_ESMRAMC_TSEG_1MB, MCH_ESMRAMC_TSEG_2MB, and MCH_ESMRAMC_TSEG_8MB
match.)
The new code paths are not exercised just yet; for that, PlatformPei is
going to have to set PcdQ35TsegMbytes (and consequently, SmramInternal's
"mQ35TsegMbytes") to a value different from 1, 2, and 8.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'OvmfPkg/SmmAccess')
| -rw-r--r-- | OvmfPkg/SmmAccess/SmmAccessPei.c | 3 | ||||
| -rw-r--r-- | OvmfPkg/SmmAccess/SmramInternal.c | 4 |
2 files changed, 5 insertions, 2 deletions
diff --git a/OvmfPkg/SmmAccess/SmmAccessPei.c b/OvmfPkg/SmmAccess/SmmAccessPei.c index a3631a1b9d..21119f80ee 100644 --- a/OvmfPkg/SmmAccess/SmmAccessPei.c +++ b/OvmfPkg/SmmAccess/SmmAccessPei.c @@ -330,7 +330,8 @@ SmmAccessPeiEntryPoint ( EsmramcVal &= ~(UINT32)MCH_ESMRAMC_TSEG_MASK;
EsmramcVal |= mQ35TsegMbytes == 8 ? MCH_ESMRAMC_TSEG_8MB :
mQ35TsegMbytes == 2 ? MCH_ESMRAMC_TSEG_2MB :
- MCH_ESMRAMC_TSEG_1MB;
+ mQ35TsegMbytes == 1 ? MCH_ESMRAMC_TSEG_1MB :
+ MCH_ESMRAMC_TSEG_EXT;
EsmramcVal |= MCH_ESMRAMC_T_EN;
PciWrite8 (DRAMC_REGISTER_Q35 (MCH_ESMRAMC), EsmramcVal);
diff --git a/OvmfPkg/SmmAccess/SmramInternal.c b/OvmfPkg/SmmAccess/SmramInternal.c index 9918a45148..18c42d2904 100644 --- a/OvmfPkg/SmmAccess/SmramInternal.c +++ b/OvmfPkg/SmmAccess/SmramInternal.c @@ -198,7 +198,9 @@ SmramAccessGetCapabilities ( SmramMap[DescIdxMain].PhysicalSize =
(TsegSizeBits == MCH_ESMRAMC_TSEG_8MB ? SIZE_8MB :
TsegSizeBits == MCH_ESMRAMC_TSEG_2MB ? SIZE_2MB :
- SIZE_1MB) - SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
+ TsegSizeBits == MCH_ESMRAMC_TSEG_1MB ? SIZE_1MB :
+ mQ35TsegMbytes * SIZE_1MB) -
+ SmramMap[DescIdxSmmS3ResumeState].PhysicalSize;
SmramMap[DescIdxMain].RegionState = CommonRegionState;
return EFI_SUCCESS;
|