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authorChasel, Chiu <chasel.chiu@intel.com>2018-12-07 21:18:42 +0800
committerChasel, Chiu <chasel.chiu@intel.com>2019-01-17 07:37:16 +0800
commit3837e2e0384035d18d15dd810a7c4c1b0235858a (patch)
tree8189f27d3fe84e71c54a9b06281b5bb1a148ff36 /OvmfPkg/Tcg
parent66cffa652512505c7d05ff7f623393efbb1d40ec (diff)
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IntelFsp2Pkg: Add FspmArchConfigPpi to support Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1381 In Dispatch mode FSP may consume PPI directly so creating FSPM_ARCH_CONFIG_PPI to align with FSPM_ARCH_UPD. Also Keeps new structure size 8 bytes alignment as other structures. Test: Verified on internal platform to boot with this PPI installed successfully. Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
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