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| author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-09-12 07:18:50 +0000 |
|---|---|---|
| committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-09-12 07:18:50 +0000 |
| commit | a1eff44b5ef7ef4cd96ecc54960dcfb18a455fb8 (patch) | |
| tree | e2ae8ba9a4b2b9d5747b697955fb63ede9ba7e4f /OvmfPkg | |
| parent | 830067bfa29358963dda22df935fefe7323f60b0 (diff) | |
| download | edk2-a1eff44b5ef7ef4cd96ecc54960dcfb18a455fb8.tar.gz edk2-a1eff44b5ef7ef4cd96ecc54960dcfb18a455fb8.tar.bz2 edk2-a1eff44b5ef7ef4cd96ecc54960dcfb18a455fb8.zip | |
OvmfPkg: fix the mask for accessing the PIIX4 PMBA [15:6] bitfield
The Index Register Base Address bitfield is selected by the binary mask
00000000 00000000 11111111 11000000, 0xFFC0; fix the typo.
Reported-by: Gleb Natapov <gleb@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13720 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg')
| -rw-r--r-- | OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c | 2 | ||||
| -rw-r--r-- | OvmfPkg/PlatformPei/Platform.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c index 027912e0f7..8f4a5b3d1e 100644 --- a/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c +++ b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c @@ -60,7 +60,7 @@ AcpiTimerLibConstructor ( mPmba = PcdGet16 (PcdAcpiPmBaseAddress);
PciAndThenOr32 (PCI_LIB_ADDRESS (0,Device,3,0x40),
- (UINT32) ~0xfc0, mPmba);
+ (UINT32) ~0xFFC0, mPmba);
PciOr8 (PCI_LIB_ADDRESS (0,Device,3,0x04), 0x01);
}
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index d91f113693..589c5c3804 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -230,7 +230,7 @@ MiscInitialization ( //
// Set the PM I/O base address to 0x400
//
- PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xfc0, 0x400);
+ PciAndThenOr32 (PCI_LIB_ADDRESS (0, 1, 3, 0x40), (UINT32) ~0xFFC0, 0x400);
}
}
|