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authorLaszlo Ersek <lersek@redhat.com>2019-09-20 13:36:56 +0200
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-02-05 12:59:32 +0000
commite0ed7a9b15fa777b216ee1af01502b5dc93da1b1 (patch)
tree581f908693985ca7bc55fe155ffe4728b4b2ff0d /OvmfPkg
parent04ff9d663b1a18b8aed0d3f8553ab6fc8cc62c02 (diff)
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OvmfPkg/PlatformPei: factor out Q35BoardVerification()
Before adding another SMM-related, and therefore Q35-only, dynamically detectable feature, extract the current board type check from Q35TsegMbytesInitialization() to a standalone function. Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Message-Id: <20200129214412.2361-5-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'OvmfPkg')
-rw-r--r--OvmfPkg/PlatformPei/MemDetect.c13
-rw-r--r--OvmfPkg/PlatformPei/Platform.c23
2 files changed, 24 insertions, 12 deletions
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index d451989f31..58b171fba1 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -53,18 +53,7 @@ Q35TsegMbytesInitialization (
UINT16 ExtendedTsegMbytes;
RETURN_STATUS PcdStatus;
- if (mHostBridgeDevId != INTEL_Q35_MCH_DEVICE_ID) {
- DEBUG ((
- DEBUG_ERROR,
- "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "
- "only DID=0x%04x (Q35) is supported\n",
- __FUNCTION__,
- mHostBridgeDevId,
- INTEL_Q35_MCH_DEVICE_ID
- ));
- ASSERT (FALSE);
- CpuDeadLoop ();
- }
+ ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);
//
// Check if QEMU offers an extended TSEG.
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index e5e8581752..510d6d7477 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -566,6 +566,28 @@ S3Verification (
}
+VOID
+Q35BoardVerification (
+ VOID
+ )
+{
+ if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
+ return;
+ }
+
+ DEBUG ((
+ DEBUG_ERROR,
+ "%a: no TSEG (SMRAM) on host bridge DID=0x%04x; "
+ "only DID=0x%04x (Q35) is supported\n",
+ __FUNCTION__,
+ mHostBridgeDevId,
+ INTEL_Q35_MCH_DEVICE_ID
+ ));
+ ASSERT (FALSE);
+ CpuDeadLoop ();
+}
+
+
/**
Fetch the boot CPU count and the possible CPU count from QEMU, and expose
them to UefiCpuPkg modules. Set the mMaxCpuCount variable.
@@ -768,6 +790,7 @@ InitializePlatform (
MaxCpuCountInitialization ();
if (FeaturePcdGet (PcdSmmSmramRequire)) {
+ Q35BoardVerification ();
Q35TsegMbytesInitialization ();
}