PcAtChipsetPkg: Clean up source files

1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>

3 files changed, 13 insertions, 13 deletions

diff --git a/PcAtChipsetPkg/Include/Library/IoApicLib.h b/PcAtChipsetPkg/Include/Library/IoApicLib.h
index c3eb0ce4b3..c109b17a8d 100644
--- a/PcAtChipsetPkg/Include/Library/IoApicLib.h
+++ b/PcAtChipsetPkg/Include/Library/IoApicLib.h
@@ -4,7 +4,7 @@
   I/O APIC library assumes I/O APIC is enabled. It does not

   handles cases where I/O APIC is disabled.

 

-  Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -21,7 +21,7 @@
   Read a 32-bit I/O APIC register.

 

   If Index is >= 0x100, then ASSERT().

-  

+

   @param  Index  Specifies the I/O APIC register to read.

 

   @return  The 32-bit value read from the I/O APIC register specified by Index.

@@ -36,7 +36,7 @@ IoApicRead (
   Write a 32-bit I/O APIC register.

 

   If Index is >= 0x100, then ASSERT().

-  

+

   @param  Index  Specifies the I/O APIC register to write.

   @param  Value  Specifies the value to write to the I/O APIC register specified by Index.

 

@@ -52,8 +52,8 @@ IoApicWrite (
 /**

   Set the interrupt mask of an I/O APIC interrupt.

 

-  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). 

-  

+  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().

+

   @param  Irq     Specifies the I/O APIC interrupt to enable or disable.

   @param  Enable  If TRUE, then enable the I/O APIC interrupt specified by Irq.

                   If FALSE, then disable the I/O APIC interrupt specified by Irq.

@@ -67,13 +67,13 @@ IoApicEnableInterrupt (
 

 /**

   Configures an I/O APIC interrupt.

-  

+

   Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical

-  mode to the Local APIC of the currntly executing CPU.  The default state of the 

+  mode to the Local APIC of the currntly executing CPU.  The default state of the

   entry is for the interrupt to be disabled (masked).  IoApicEnableInterrupts() must

   be used to enable(unmask) the I/O APIC Interrupt.

 

-  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). 

+  If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().

   If Vector >= 0x100, then ASSERT().

   If DeliveryMode is not supported, then ASSERT().

 

diff --git a/PcAtChipsetPkg/Include/Register/Hpet.h b/PcAtChipsetPkg/Include/Register/Hpet.h
index 2933767b5e..75e0dec4fa 100644
--- a/PcAtChipsetPkg/Include/Register/Hpet.h
+++ b/PcAtChipsetPkg/Include/Register/Hpet.h
@@ -1,8 +1,8 @@
 /** @file

-  HPET register definitions from the IA-PC HPET (High Precision Event Timers) 

+  HPET register definitions from the IA-PC HPET (High Precision Event Timers)

   Specification, Revision 1.0a, October 2004.

 

-  Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

diff --git a/PcAtChipsetPkg/Include/Register/IoApic.h b/PcAtChipsetPkg/Include/Register/IoApic.h
index d6e73be92b..2928ff2e96 100644
--- a/PcAtChipsetPkg/Include/Register/IoApic.h
+++ b/PcAtChipsetPkg/Include/Register/IoApic.h
@@ -1,8 +1,8 @@
 /** @file

-  I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt 

+  I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt

   Controller (IOAPIC), 1996.

-  

-  Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>

+

+  Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at