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authorSheng Wei <w.sheng@intel.com>2020-12-07 16:34:44 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2020-12-15 11:18:52 +0000
commit5c3cdebf95bfa32c611b8e72921277401bc90fec (patch)
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MdePkg/include: Add DMAR SATC Table Definition
SoC Integrated Address Translation Cache (SATC) reporting structure is one of the Remapping Structure, which is imported since Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture Specification v3.2. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3109 Signed-off-by: Sheng Wei <w.sheng@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jenny Huang <jenny.huang@intel.com> Cc: Kowalewski Robert <robert.kowalewski@intel.com> Cc: Feng Roger <roger.feng@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
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