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| author | Star Zeng <star.zeng@intel.com> | 2019-03-14 10:10:21 +0800 |
|---|---|---|
| committer | Star Zeng <star.zeng@intel.com> | 2019-03-18 09:14:15 +0800 |
| commit | 34b162d078aa59d55059f08a0f15dd114e7b7db4 (patch) | |
| tree | 542b7b24bda10db58313468a95fdf60793904b3a /SecurityPkg/SecurityPkg.uni | |
| parent | c49f298d28cb90c332f8d495a6dfb355bc4014f0 (diff) | |
| download | edk2-34b162d078aa59d55059f08a0f15dd114e7b7db4.tar.gz edk2-34b162d078aa59d55059f08a0f15dd114e7b7db4.tar.bz2 edk2-34b162d078aa59d55059f08a0f15dd114e7b7db4.zip | |
UefiCpuPkg/CpuCommonFeaturesLib: Aesni.c uses BIT0 and BIT1 reversedly
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1621
According to Intel SDM as below, the BIT0 should be treated as
lock bit, and BIT1 should be treated as disable(1)/enable(0) bit.
"11b: AES instructions are not available until next
RESET.
Otherwise, AES instructions are available.
If the configuration is not 01b, AES
instructions can be mis-configured if a privileged agent
unintentionally writes 11b"
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Chandana Kumar <chandana.c.kumar@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'SecurityPkg/SecurityPkg.uni')
0 files changed, 0 insertions, 0 deletions